MUL (R32) - Port Usage

With blocking instructions for port '0':

Code:

   0:	66 45 8d 0e          	lea    r9w,[r14]
   4:	66 45 8d 16          	lea    r10w,[r14]
   8:	66 45 8d 1e          	lea    r11w,[r14]
   c:	66 45 8d 26          	lea    r12w,[r14]
  10:	66 41 8d 1e          	lea    bx,[r14]
  14:	66 41 8d 0e          	lea    cx,[r14]
  18:	66 45 8d 0e          	lea    r9w,[r14]
  1c:	66 45 8d 16          	lea    r10w,[r14]
  20:	66 45 8d 1e          	lea    r11w,[r14]
  24:	66 45 8d 26          	lea    r12w,[r14]
  28:	41 f7 e0             	mul    r8d

Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 10.0
- Reference cycles: 10.0
- UOPS_PORT_0: 10.0

With blocking instructions for port '1':

Code:

   0:	66 0f 58 c1          	addpd  xmm0,xmm1
   4:	66 0f 58 d1          	addpd  xmm2,xmm1
   8:	66 0f 58 d9          	addpd  xmm3,xmm1
   c:	66 0f 58 e1          	addpd  xmm4,xmm1
  10:	66 0f 58 e9          	addpd  xmm5,xmm1
  14:	66 0f 58 f1          	addpd  xmm6,xmm1
  18:	66 0f 58 f9          	addpd  xmm7,xmm1
  1c:	66 44 0f 58 c1       	addpd  xmm8,xmm1
  21:	66 44 0f 58 c9       	addpd  xmm9,xmm1
  26:	66 44 0f 58 d1       	addpd  xmm10,xmm1
  2b:	41 f7 e0             	mul    r8d

Init:

MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
MOVUPD XMM1, [R14];
MOVUPD XMM2, [R14];
MOVUPD XMM3, [R14];
MOVUPD XMM4, [R14];
MOVUPD XMM5, [R14];
MOVUPD XMM6, [R14];
MOVUPD XMM7, [R14];
MOVUPD XMM8, [R14];
MOVUPD XMM9, [R14];
MOVUPD XMM10, [R14];
MOVUPD XMM11, [R14];
MOVUPD XMM12, [R14]

Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 11.04
- Reference cycles: 11.04
- UOPS_PORT_1: 11.02

⇨ One μop that can only use port '1'

With blocking instructions for port '5':

Code:

   0:	f3 0f 16 c1          	movshdup xmm0,xmm1
   4:	f3 0f 16 d1          	movshdup xmm2,xmm1
   8:	f3 0f 16 d9          	movshdup xmm3,xmm1
   c:	f3 0f 16 e1          	movshdup xmm4,xmm1
  10:	f3 0f 16 e9          	movshdup xmm5,xmm1
  14:	f3 0f 16 f1          	movshdup xmm6,xmm1
  18:	f3 0f 16 f9          	movshdup xmm7,xmm1
  1c:	f3 44 0f 16 c1       	movshdup xmm8,xmm1
  21:	f3 44 0f 16 c9       	movshdup xmm9,xmm1
  26:	f3 44 0f 16 d1       	movshdup xmm10,xmm1
  2b:	41 f7 e0             	mul    r8d

Init:

MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM1, [R14]

Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 9.99
- Reference cycles: 9.97
- UOPS_PORT_5: 9.96

With blocking instructions for ports {'0', '5'}:

Code:

   0:	41 0f 6e c1          	movd   mm0,r9d
   4:	41 0f 6e c9          	movd   mm1,r9d
   8:	41 0f 6e d1          	movd   mm2,r9d
   c:	41 0f 6e d9          	movd   mm3,r9d
  10:	41 0f 6e e1          	movd   mm4,r9d
  14:	41 0f 6e e9          	movd   mm5,r9d
  18:	41 0f 6e f1          	movd   mm6,r9d
  1c:	41 0f 6e f9          	movd   mm7,r9d
  20:	41 0f 6e c1          	movd   mm0,r9d
  24:	41 0f 6e c9          	movd   mm1,r9d
  28:	41 0f 6e d1          	movd   mm2,r9d
  2c:	41 0f 6e d9          	movd   mm3,r9d
  30:	41 0f 6e e1          	movd   mm4,r9d
  34:	41 0f 6e e9          	movd   mm5,r9d
  38:	41 0f 6e f1          	movd   mm6,r9d
  3c:	41 0f 6e f9          	movd   mm7,r9d
  40:	41 f7 e0             	mul    r8d

Show nanoBench command
Results:
- Instructions retired: 17.0
- Core cycles: 8.48
- Reference cycles: 8.45
- UOPS_PORT_0: 8.56
- UOPS_PORT_5: 8.44

⇨ One μop that can only use ports {'0', '5'}

With blocking instructions for ports {'0', '1', '5'}:

Code:

   0:	66 0f 55 c1          	andnpd xmm0,xmm1
   4:	66 0f 55 d1          	andnpd xmm2,xmm1
   8:	66 0f 55 d9          	andnpd xmm3,xmm1
   c:	66 0f 55 e1          	andnpd xmm4,xmm1
  10:	66 0f 55 e9          	andnpd xmm5,xmm1
  14:	66 0f 55 f1          	andnpd xmm6,xmm1
  18:	66 0f 55 f9          	andnpd xmm7,xmm1
  1c:	66 44 0f 55 c1       	andnpd xmm8,xmm1
  21:	66 44 0f 55 c9       	andnpd xmm9,xmm1
  26:	66 44 0f 55 d1       	andnpd xmm10,xmm1
  2b:	66 44 0f 55 d9       	andnpd xmm11,xmm1
  30:	66 44 0f 55 e1       	andnpd xmm12,xmm1
  35:	66 0f 55 c1          	andnpd xmm0,xmm1
  39:	66 0f 55 d1          	andnpd xmm2,xmm1
  3d:	66 0f 55 d9          	andnpd xmm3,xmm1
  41:	66 0f 55 e1          	andnpd xmm4,xmm1
  45:	66 0f 55 e9          	andnpd xmm5,xmm1
  49:	66 0f 55 f1          	andnpd xmm6,xmm1
  4d:	66 0f 55 f9          	andnpd xmm7,xmm1
  51:	66 44 0f 55 c1       	andnpd xmm8,xmm1
  56:	66 44 0f 55 c9       	andnpd xmm9,xmm1
  5b:	66 44 0f 55 d1       	andnpd xmm10,xmm1
  60:	66 44 0f 55 d9       	andnpd xmm11,xmm1
  65:	66 44 0f 55 e1       	andnpd xmm12,xmm1
  6a:	41 f7 e0             	mul    r8d

Init:

PXOR XMM0, XMM0;
PXOR XMM1, XMM1;
PXOR XMM2, XMM2;
PXOR XMM3, XMM3;
PXOR XMM4, XMM4;
PXOR XMM5, XMM5;
PXOR XMM6, XMM6;
PXOR XMM7, XMM7;
PXOR XMM8, XMM8;
PXOR XMM9, XMM9;
PXOR XMM10, XMM10;
PXOR XMM11, XMM11;
PXOR XMM12, XMM12

Show nanoBench command
Results:
- Instructions retired: 25.0
- Core cycles: 24.98
- Reference cycles: 24.91
- UOPS_PORT_0: 4.85
- UOPS_PORT_1: 10.56
- UOPS_PORT_5: 11.59

⇨ One μop that can only use ports {'0', '1', '5'}