MOVUPS (XMM, M128) - Port Usage

With blocking instructions for port '0':

Code:

   0:	66 45 8d 06          	lea    r8w,[r14]
   4:	66 45 8d 0e          	lea    r9w,[r14]
   8:	66 45 8d 16          	lea    r10w,[r14]
   c:	66 45 8d 1e          	lea    r11w,[r14]
  10:	66 45 8d 26          	lea    r12w,[r14]
  14:	66 41 8d 1e          	lea    bx,[r14]
  18:	66 41 8d 0e          	lea    cx,[r14]
  1c:	66 41 8d 16          	lea    dx,[r14]
  20:	66 45 8d 06          	lea    r8w,[r14]
  24:	66 45 8d 0e          	lea    r9w,[r14]
  28:	41 0f 10 06          	movups xmm0,XMMWORD PTR [r14]

Init:

MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX

Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 11.02
- Reference cycles: 11.0
- UOPS_PORT_0: 11.0

⇨ One μop that can only use port '0'

With blocking instructions for port '1':

Code:

   0:	66 0f 58 ca          	addpd  xmm1,xmm2
   4:	66 0f 58 da          	addpd  xmm3,xmm2
   8:	66 0f 58 e2          	addpd  xmm4,xmm2
   c:	66 0f 58 ea          	addpd  xmm5,xmm2
  10:	66 0f 58 f2          	addpd  xmm6,xmm2
  14:	66 0f 58 fa          	addpd  xmm7,xmm2
  18:	66 44 0f 58 c2       	addpd  xmm8,xmm2
  1d:	66 44 0f 58 ca       	addpd  xmm9,xmm2
  22:	66 44 0f 58 d2       	addpd  xmm10,xmm2
  27:	66 44 0f 58 da       	addpd  xmm11,xmm2
  2c:	41 0f 10 06          	movups xmm0,XMMWORD PTR [r14]

Init:

MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM1, [R14];
MOVUPD XMM2, [R14];
MOVUPD XMM3, [R14];
MOVUPD XMM4, [R14];
MOVUPD XMM5, [R14];
MOVUPD XMM6, [R14];
MOVUPD XMM7, [R14];
MOVUPD XMM8, [R14];
MOVUPD XMM9, [R14];
MOVUPD XMM10, [R14];
MOVUPD XMM11, [R14];
MOVUPD XMM12, [R14]

Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 11.9
- Reference cycles: 11.88
- UOPS_PORT_1: 11.02

⇨ One μop that can only use port '1'

With blocking instructions for port '2':

Code:

   0:	66 45 8b 46 40       	mov    r8w,WORD PTR [r14+0x40]
   5:	66 45 8b 4e 42       	mov    r9w,WORD PTR [r14+0x42]
   a:	66 45 8b 56 44       	mov    r10w,WORD PTR [r14+0x44]
   f:	66 45 8b 5e 46       	mov    r11w,WORD PTR [r14+0x46]
  14:	66 45 8b 66 48       	mov    r12w,WORD PTR [r14+0x48]
  19:	66 41 8b 5e 4a       	mov    bx,WORD PTR [r14+0x4a]
  1e:	66 41 8b 4e 4c       	mov    cx,WORD PTR [r14+0x4c]
  23:	66 41 8b 56 4e       	mov    dx,WORD PTR [r14+0x4e]
  28:	66 45 8b 46 40       	mov    r8w,WORD PTR [r14+0x40]
  2d:	66 45 8b 4e 42       	mov    r9w,WORD PTR [r14+0x42]
  32:	41 0f 10 06          	movups xmm0,XMMWORD PTR [r14]

Init:

MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX

Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 12.01
- Reference cycles: 12.0
- UOPS_PORT_2: 12.0

⇨ 2 μops that can only use port '2'

With an indexed addressing mode

With blocking instructions for port '0':

Code:

   0:	66 45 8d 06          	lea    r8w,[r14]
   4:	66 45 8d 0e          	lea    r9w,[r14]
   8:	66 45 8d 16          	lea    r10w,[r14]
   c:	66 45 8d 1e          	lea    r11w,[r14]
  10:	66 45 8d 26          	lea    r12w,[r14]
  14:	66 41 8d 1e          	lea    bx,[r14]
  18:	66 41 8d 0e          	lea    cx,[r14]
  1c:	66 41 8d 16          	lea    dx,[r14]
  20:	66 45 8d 06          	lea    r8w,[r14]
  24:	66 45 8d 0e          	lea    r9w,[r14]
  28:	43 0f 10 04 2e       	movups xmm0,XMMWORD PTR [r14+r13*1]

Init:

MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
XOR R13, R13

Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 11.02
- Reference cycles: 10.99
- UOPS_PORT_0: 11.0

⇨ One μop that can only use port '0'

With blocking instructions for port '1':

Code:

   0:	66 0f 58 ca          	addpd  xmm1,xmm2
   4:	66 0f 58 da          	addpd  xmm3,xmm2
   8:	66 0f 58 e2          	addpd  xmm4,xmm2
   c:	66 0f 58 ea          	addpd  xmm5,xmm2
  10:	66 0f 58 f2          	addpd  xmm6,xmm2
  14:	66 0f 58 fa          	addpd  xmm7,xmm2
  18:	66 44 0f 58 c2       	addpd  xmm8,xmm2
  1d:	66 44 0f 58 ca       	addpd  xmm9,xmm2
  22:	66 44 0f 58 d2       	addpd  xmm10,xmm2
  27:	66 44 0f 58 da       	addpd  xmm11,xmm2
  2c:	43 0f 10 04 2e       	movups xmm0,XMMWORD PTR [r14+r13*1]

Init:

MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM1, [R14];
MOVUPD XMM2, [R14];
MOVUPD XMM3, [R14];
MOVUPD XMM4, [R14];
MOVUPD XMM5, [R14];
MOVUPD XMM6, [R14];
MOVUPD XMM7, [R14];
MOVUPD XMM8, [R14];
MOVUPD XMM9, [R14];
MOVUPD XMM10, [R14];
MOVUPD XMM11, [R14];
MOVUPD XMM12, [R14];
XOR R13, R13

Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 11.91
- Reference cycles: 11.91
- UOPS_PORT_1: 11.02

⇨ One μop that can only use port '1'

With blocking instructions for port '2':

Code:

   0:	66 45 8b 46 40       	mov    r8w,WORD PTR [r14+0x40]
   5:	66 45 8b 4e 42       	mov    r9w,WORD PTR [r14+0x42]
   a:	66 45 8b 56 44       	mov    r10w,WORD PTR [r14+0x44]
   f:	66 45 8b 5e 46       	mov    r11w,WORD PTR [r14+0x46]
  14:	66 45 8b 66 48       	mov    r12w,WORD PTR [r14+0x48]
  19:	66 41 8b 5e 4a       	mov    bx,WORD PTR [r14+0x4a]
  1e:	66 41 8b 4e 4c       	mov    cx,WORD PTR [r14+0x4c]
  23:	66 41 8b 56 4e       	mov    dx,WORD PTR [r14+0x4e]
  28:	66 45 8b 46 40       	mov    r8w,WORD PTR [r14+0x40]
  2d:	66 45 8b 4e 42       	mov    r9w,WORD PTR [r14+0x42]
  32:	43 0f 10 04 2e       	movups xmm0,XMMWORD PTR [r14+r13*1]

Init:

MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
XOR R13, R13

Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 12.01
- Reference cycles: 12.01
- UOPS_PORT_2: 12.0

⇨ 2 μops that can only use port '2'