INC_LOCK (M32) - Port Usage

With blocking instructions for port '2':

Code:

   0:	66 45 8b 46 40       	mov    r8w,WORD PTR [r14+0x40]
   5:	66 45 8b 4e 42       	mov    r9w,WORD PTR [r14+0x42]
   a:	66 45 8b 56 44       	mov    r10w,WORD PTR [r14+0x44]
   f:	66 45 8b 5e 46       	mov    r11w,WORD PTR [r14+0x46]
  14:	66 45 8b 66 48       	mov    r12w,WORD PTR [r14+0x48]
  19:	66 41 8b 5e 4a       	mov    bx,WORD PTR [r14+0x4a]
  1e:	66 41 8b 4e 4c       	mov    cx,WORD PTR [r14+0x4c]
  23:	66 41 8b 56 4e       	mov    dx,WORD PTR [r14+0x4e]
  28:	66 45 8b 46 40       	mov    r8w,WORD PTR [r14+0x40]
  2d:	66 45 8b 4e 42       	mov    r9w,WORD PTR [r14+0x42]
  32:	66 45 8b 56 44       	mov    r10w,WORD PTR [r14+0x44]
  37:	66 45 8b 5e 46       	mov    r11w,WORD PTR [r14+0x46]
  3c:	66 45 8b 66 48       	mov    r12w,WORD PTR [r14+0x48]
  41:	66 41 8b 5e 4a       	mov    bx,WORD PTR [r14+0x4a]
  46:	66 41 8b 4e 4c       	mov    cx,WORD PTR [r14+0x4c]
  4b:	66 41 8b 56 4e       	mov    dx,WORD PTR [r14+0x4e]
  50:	66 45 8b 46 40       	mov    r8w,WORD PTR [r14+0x40]
  55:	66 45 8b 4e 42       	mov    r9w,WORD PTR [r14+0x42]
  5a:	66 45 8b 56 44       	mov    r10w,WORD PTR [r14+0x44]
  5f:	66 45 8b 5e 46       	mov    r11w,WORD PTR [r14+0x46]
  64:	66 45 8b 66 48       	mov    r12w,WORD PTR [r14+0x48]
  69:	66 41 8b 5e 4a       	mov    bx,WORD PTR [r14+0x4a]
  6e:	66 41 8b 4e 4c       	mov    cx,WORD PTR [r14+0x4c]
  73:	66 41 8b 56 4e       	mov    dx,WORD PTR [r14+0x4e]
  78:	66 45 8b 46 40       	mov    r8w,WORD PTR [r14+0x40]
  7d:	66 45 8b 4e 42       	mov    r9w,WORD PTR [r14+0x42]
  82:	66 45 8b 56 44       	mov    r10w,WORD PTR [r14+0x44]
  87:	66 45 8b 5e 46       	mov    r11w,WORD PTR [r14+0x46]
  8c:	66 45 8b 66 48       	mov    r12w,WORD PTR [r14+0x48]
  91:	66 41 8b 5e 4a       	mov    bx,WORD PTR [r14+0x4a]
  96:	66 41 8b 4e 4c       	mov    cx,WORD PTR [r14+0x4c]
  9b:	66 41 8b 56 4e       	mov    dx,WORD PTR [r14+0x4e]
  a0:	66 45 8b 46 40       	mov    r8w,WORD PTR [r14+0x40]
  a5:	66 45 8b 4e 42       	mov    r9w,WORD PTR [r14+0x42]
  aa:	66 45 8b 56 44       	mov    r10w,WORD PTR [r14+0x44]
  af:	66 45 8b 5e 46       	mov    r11w,WORD PTR [r14+0x46]
  b4:	66 45 8b 66 48       	mov    r12w,WORD PTR [r14+0x48]
  b9:	66 41 8b 5e 4a       	mov    bx,WORD PTR [r14+0x4a]
  be:	66 41 8b 4e 4c       	mov    cx,WORD PTR [r14+0x4c]
  c3:	66 41 8b 56 4e       	mov    dx,WORD PTR [r14+0x4e]
  c8:	f0 41 ff 06          	lock inc DWORD PTR [r14]

Show nanoBench command
Results:
- Instructions retired: 41.0
- Core cycles: 64.76
- Reference cycles: 64.8
- UOPS_PORT_2: 41.0

⇨ One μop that can only use port '2'

With blocking instructions for port '3':

Code:

   0:	4d 89 46 40          	mov    QWORD PTR [r14+0x40],r8
   4:	4d 89 46 48          	mov    QWORD PTR [r14+0x48],r8
   8:	4d 89 46 50          	mov    QWORD PTR [r14+0x50],r8
   c:	4d 89 46 58          	mov    QWORD PTR [r14+0x58],r8
  10:	4d 89 46 60          	mov    QWORD PTR [r14+0x60],r8
  14:	4d 89 46 68          	mov    QWORD PTR [r14+0x68],r8
  18:	4d 89 46 70          	mov    QWORD PTR [r14+0x70],r8
  1c:	4d 89 46 78          	mov    QWORD PTR [r14+0x78],r8
  20:	4d 89 86 80 00 00 00 	mov    QWORD PTR [r14+0x80],r8
  27:	4d 89 86 88 00 00 00 	mov    QWORD PTR [r14+0x88],r8
  2e:	4d 89 86 90 00 00 00 	mov    QWORD PTR [r14+0x90],r8
  35:	4d 89 86 98 00 00 00 	mov    QWORD PTR [r14+0x98],r8
  3c:	4d 89 86 a0 00 00 00 	mov    QWORD PTR [r14+0xa0],r8
  43:	4d 89 86 a8 00 00 00 	mov    QWORD PTR [r14+0xa8],r8
  4a:	4d 89 86 b0 00 00 00 	mov    QWORD PTR [r14+0xb0],r8
  51:	4d 89 86 b8 00 00 00 	mov    QWORD PTR [r14+0xb8],r8
  58:	4d 89 46 40          	mov    QWORD PTR [r14+0x40],r8
  5c:	4d 89 46 48          	mov    QWORD PTR [r14+0x48],r8
  60:	4d 89 46 50          	mov    QWORD PTR [r14+0x50],r8
  64:	4d 89 46 58          	mov    QWORD PTR [r14+0x58],r8
  68:	4d 89 46 60          	mov    QWORD PTR [r14+0x60],r8
  6c:	4d 89 46 68          	mov    QWORD PTR [r14+0x68],r8
  70:	4d 89 46 70          	mov    QWORD PTR [r14+0x70],r8
  74:	4d 89 46 78          	mov    QWORD PTR [r14+0x78],r8
  78:	4d 89 86 80 00 00 00 	mov    QWORD PTR [r14+0x80],r8
  7f:	4d 89 86 88 00 00 00 	mov    QWORD PTR [r14+0x88],r8
  86:	4d 89 86 90 00 00 00 	mov    QWORD PTR [r14+0x90],r8
  8d:	4d 89 86 98 00 00 00 	mov    QWORD PTR [r14+0x98],r8
  94:	4d 89 86 a0 00 00 00 	mov    QWORD PTR [r14+0xa0],r8
  9b:	4d 89 86 a8 00 00 00 	mov    QWORD PTR [r14+0xa8],r8
  a2:	4d 89 86 b0 00 00 00 	mov    QWORD PTR [r14+0xb0],r8
  a9:	4d 89 86 b8 00 00 00 	mov    QWORD PTR [r14+0xb8],r8
  b0:	4d 89 46 40          	mov    QWORD PTR [r14+0x40],r8
  b4:	4d 89 46 48          	mov    QWORD PTR [r14+0x48],r8
  b8:	4d 89 46 50          	mov    QWORD PTR [r14+0x50],r8
  bc:	4d 89 46 58          	mov    QWORD PTR [r14+0x58],r8
  c0:	4d 89 46 60          	mov    QWORD PTR [r14+0x60],r8
  c4:	4d 89 46 68          	mov    QWORD PTR [r14+0x68],r8
  c8:	4d 89 46 70          	mov    QWORD PTR [r14+0x70],r8
  cc:	4d 89 46 78          	mov    QWORD PTR [r14+0x78],r8
  d0:	f0 41 ff 06          	lock inc DWORD PTR [r14]

Show nanoBench command
Results:
- Instructions retired: 41.0
- Core cycles: 72.64
- Reference cycles: 72.69
- UOPS_PORT_3: 42.0

⇨ 2 μops that can only use port '3'

With blocking instructions for port '4':

Code:

   0:	4d 89 46 40          	mov    QWORD PTR [r14+0x40],r8
   4:	4d 89 46 48          	mov    QWORD PTR [r14+0x48],r8
   8:	4d 89 46 50          	mov    QWORD PTR [r14+0x50],r8
   c:	4d 89 46 58          	mov    QWORD PTR [r14+0x58],r8
  10:	4d 89 46 60          	mov    QWORD PTR [r14+0x60],r8
  14:	4d 89 46 68          	mov    QWORD PTR [r14+0x68],r8
  18:	4d 89 46 70          	mov    QWORD PTR [r14+0x70],r8
  1c:	4d 89 46 78          	mov    QWORD PTR [r14+0x78],r8
  20:	4d 89 86 80 00 00 00 	mov    QWORD PTR [r14+0x80],r8
  27:	4d 89 86 88 00 00 00 	mov    QWORD PTR [r14+0x88],r8
  2e:	4d 89 86 90 00 00 00 	mov    QWORD PTR [r14+0x90],r8
  35:	4d 89 86 98 00 00 00 	mov    QWORD PTR [r14+0x98],r8
  3c:	4d 89 86 a0 00 00 00 	mov    QWORD PTR [r14+0xa0],r8
  43:	4d 89 86 a8 00 00 00 	mov    QWORD PTR [r14+0xa8],r8
  4a:	4d 89 86 b0 00 00 00 	mov    QWORD PTR [r14+0xb0],r8
  51:	4d 89 86 b8 00 00 00 	mov    QWORD PTR [r14+0xb8],r8
  58:	4d 89 46 40          	mov    QWORD PTR [r14+0x40],r8
  5c:	4d 89 46 48          	mov    QWORD PTR [r14+0x48],r8
  60:	4d 89 46 50          	mov    QWORD PTR [r14+0x50],r8
  64:	4d 89 46 58          	mov    QWORD PTR [r14+0x58],r8
  68:	4d 89 46 60          	mov    QWORD PTR [r14+0x60],r8
  6c:	4d 89 46 68          	mov    QWORD PTR [r14+0x68],r8
  70:	4d 89 46 70          	mov    QWORD PTR [r14+0x70],r8
  74:	4d 89 46 78          	mov    QWORD PTR [r14+0x78],r8
  78:	4d 89 86 80 00 00 00 	mov    QWORD PTR [r14+0x80],r8
  7f:	4d 89 86 88 00 00 00 	mov    QWORD PTR [r14+0x88],r8
  86:	4d 89 86 90 00 00 00 	mov    QWORD PTR [r14+0x90],r8
  8d:	4d 89 86 98 00 00 00 	mov    QWORD PTR [r14+0x98],r8
  94:	4d 89 86 a0 00 00 00 	mov    QWORD PTR [r14+0xa0],r8
  9b:	4d 89 86 a8 00 00 00 	mov    QWORD PTR [r14+0xa8],r8
  a2:	4d 89 86 b0 00 00 00 	mov    QWORD PTR [r14+0xb0],r8
  a9:	4d 89 86 b8 00 00 00 	mov    QWORD PTR [r14+0xb8],r8
  b0:	4d 89 46 40          	mov    QWORD PTR [r14+0x40],r8
  b4:	4d 89 46 48          	mov    QWORD PTR [r14+0x48],r8
  b8:	4d 89 46 50          	mov    QWORD PTR [r14+0x50],r8
  bc:	4d 89 46 58          	mov    QWORD PTR [r14+0x58],r8
  c0:	4d 89 46 60          	mov    QWORD PTR [r14+0x60],r8
  c4:	4d 89 46 68          	mov    QWORD PTR [r14+0x68],r8
  c8:	4d 89 46 70          	mov    QWORD PTR [r14+0x70],r8
  cc:	4d 89 46 78          	mov    QWORD PTR [r14+0x78],r8
  d0:	f0 41 ff 06          	lock inc DWORD PTR [r14]

Show nanoBench command
Results:
- Instructions retired: 41.0
- Core cycles: 72.64
- Reference cycles: 72.64
- UOPS_PORT_4: 42.0

⇨ One μop that can only use port '4'

With blocking instructions for port '5':

Code:

   0:	f3 0f 16 c1          	movshdup xmm0,xmm1
   4:	f3 0f 16 d1          	movshdup xmm2,xmm1
   8:	f3 0f 16 d9          	movshdup xmm3,xmm1
   c:	f3 0f 16 e1          	movshdup xmm4,xmm1
  10:	f3 0f 16 e9          	movshdup xmm5,xmm1
  14:	f3 0f 16 f1          	movshdup xmm6,xmm1
  18:	f3 0f 16 f9          	movshdup xmm7,xmm1
  1c:	f3 44 0f 16 c1       	movshdup xmm8,xmm1
  21:	f3 44 0f 16 c9       	movshdup xmm9,xmm1
  26:	f3 44 0f 16 d1       	movshdup xmm10,xmm1
  2b:	f3 44 0f 16 d9       	movshdup xmm11,xmm1
  30:	f3 44 0f 16 e1       	movshdup xmm12,xmm1
  35:	f3 0f 16 c1          	movshdup xmm0,xmm1
  39:	f3 0f 16 d1          	movshdup xmm2,xmm1
  3d:	f3 0f 16 d9          	movshdup xmm3,xmm1
  41:	f3 0f 16 e1          	movshdup xmm4,xmm1
  45:	f3 0f 16 e9          	movshdup xmm5,xmm1
  49:	f3 0f 16 f1          	movshdup xmm6,xmm1
  4d:	f3 0f 16 f9          	movshdup xmm7,xmm1
  51:	f3 44 0f 16 c1       	movshdup xmm8,xmm1
  56:	f3 44 0f 16 c9       	movshdup xmm9,xmm1
  5b:	f3 44 0f 16 d1       	movshdup xmm10,xmm1
  60:	f3 44 0f 16 d9       	movshdup xmm11,xmm1
  65:	f3 44 0f 16 e1       	movshdup xmm12,xmm1
  6a:	f3 0f 16 c1          	movshdup xmm0,xmm1
  6e:	f3 0f 16 d1          	movshdup xmm2,xmm1
  72:	f3 0f 16 d9          	movshdup xmm3,xmm1
  76:	f3 0f 16 e1          	movshdup xmm4,xmm1
  7a:	f3 0f 16 e9          	movshdup xmm5,xmm1
  7e:	f3 0f 16 f1          	movshdup xmm6,xmm1
  82:	f3 0f 16 f9          	movshdup xmm7,xmm1
  86:	f3 44 0f 16 c1       	movshdup xmm8,xmm1
  8b:	f3 44 0f 16 c9       	movshdup xmm9,xmm1
  90:	f3 44 0f 16 d1       	movshdup xmm10,xmm1
  95:	f3 44 0f 16 d9       	movshdup xmm11,xmm1
  9a:	f3 44 0f 16 e1       	movshdup xmm12,xmm1
  9f:	f3 0f 16 c1          	movshdup xmm0,xmm1
  a3:	f3 0f 16 d1          	movshdup xmm2,xmm1
  a7:	f3 0f 16 d9          	movshdup xmm3,xmm1
  ab:	f3 0f 16 e1          	movshdup xmm4,xmm1
  af:	f0 41 ff 06          	lock inc DWORD PTR [r14]

Init:

MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM1, [R14]

Show nanoBench command
Results:
- Instructions retired: 41.0
- Core cycles: 41.76
- Reference cycles: 41.81
- UOPS_PORT_5: 40.88

⇨ One μop that can only use port '5'

With blocking instructions for ports {'0', '5'}:

Code:

   0:	41 0f 6e c0          	movd   mm0,r8d
   4:	41 0f 6e c8          	movd   mm1,r8d
   8:	41 0f 6e d0          	movd   mm2,r8d
   c:	41 0f 6e d8          	movd   mm3,r8d
  10:	41 0f 6e e0          	movd   mm4,r8d
  14:	41 0f 6e e8          	movd   mm5,r8d
  18:	41 0f 6e f0          	movd   mm6,r8d
  1c:	41 0f 6e f8          	movd   mm7,r8d
  20:	41 0f 6e c0          	movd   mm0,r8d
  24:	41 0f 6e c8          	movd   mm1,r8d
  28:	41 0f 6e d0          	movd   mm2,r8d
  2c:	41 0f 6e d8          	movd   mm3,r8d
  30:	41 0f 6e e0          	movd   mm4,r8d
  34:	41 0f 6e e8          	movd   mm5,r8d
  38:	41 0f 6e f0          	movd   mm6,r8d
  3c:	41 0f 6e f8          	movd   mm7,r8d
  40:	41 0f 6e c0          	movd   mm0,r8d
  44:	41 0f 6e c8          	movd   mm1,r8d
  48:	41 0f 6e d0          	movd   mm2,r8d
  4c:	41 0f 6e d8          	movd   mm3,r8d
  50:	41 0f 6e e0          	movd   mm4,r8d
  54:	41 0f 6e e8          	movd   mm5,r8d
  58:	41 0f 6e f0          	movd   mm6,r8d
  5c:	41 0f 6e f8          	movd   mm7,r8d
  60:	41 0f 6e c0          	movd   mm0,r8d
  64:	41 0f 6e c8          	movd   mm1,r8d
  68:	41 0f 6e d0          	movd   mm2,r8d
  6c:	41 0f 6e d8          	movd   mm3,r8d
  70:	41 0f 6e e0          	movd   mm4,r8d
  74:	41 0f 6e e8          	movd   mm5,r8d
  78:	41 0f 6e f0          	movd   mm6,r8d
  7c:	41 0f 6e f8          	movd   mm7,r8d
  80:	41 0f 6e c0          	movd   mm0,r8d
  84:	41 0f 6e c8          	movd   mm1,r8d
  88:	41 0f 6e d0          	movd   mm2,r8d
  8c:	41 0f 6e d8          	movd   mm3,r8d
  90:	41 0f 6e e0          	movd   mm4,r8d
  94:	41 0f 6e e8          	movd   mm5,r8d
  98:	41 0f 6e f0          	movd   mm6,r8d
  9c:	41 0f 6e f8          	movd   mm7,r8d
  a0:	41 0f 6e c0          	movd   mm0,r8d
  a4:	41 0f 6e c8          	movd   mm1,r8d
  a8:	41 0f 6e d0          	movd   mm2,r8d
  ac:	41 0f 6e d8          	movd   mm3,r8d
  b0:	41 0f 6e e0          	movd   mm4,r8d
  b4:	41 0f 6e e8          	movd   mm5,r8d
  b8:	41 0f 6e f0          	movd   mm6,r8d
  bc:	41 0f 6e f8          	movd   mm7,r8d
  c0:	41 0f 6e c0          	movd   mm0,r8d
  c4:	41 0f 6e c8          	movd   mm1,r8d
  c8:	41 0f 6e d0          	movd   mm2,r8d
  cc:	41 0f 6e d8          	movd   mm3,r8d
  d0:	41 0f 6e e0          	movd   mm4,r8d
  d4:	41 0f 6e e8          	movd   mm5,r8d
  d8:	41 0f 6e f0          	movd   mm6,r8d
  dc:	41 0f 6e f8          	movd   mm7,r8d
  e0:	41 0f 6e c0          	movd   mm0,r8d
  e4:	41 0f 6e c8          	movd   mm1,r8d
  e8:	41 0f 6e d0          	movd   mm2,r8d
  ec:	41 0f 6e d8          	movd   mm3,r8d
  f0:	41 0f 6e e0          	movd   mm4,r8d
  f4:	41 0f 6e e8          	movd   mm5,r8d
  f8:	41 0f 6e f0          	movd   mm6,r8d
  fc:	41 0f 6e f8          	movd   mm7,r8d
 100:	41 0f 6e c0          	movd   mm0,r8d
 104:	41 0f 6e c8          	movd   mm1,r8d
 108:	41 0f 6e d0          	movd   mm2,r8d
 10c:	41 0f 6e d8          	movd   mm3,r8d
 110:	41 0f 6e e0          	movd   mm4,r8d
 114:	41 0f 6e e8          	movd   mm5,r8d
 118:	41 0f 6e f0          	movd   mm6,r8d
 11c:	41 0f 6e f8          	movd   mm7,r8d
 120:	41 0f 6e c0          	movd   mm0,r8d
 124:	41 0f 6e c8          	movd   mm1,r8d
 128:	41 0f 6e d0          	movd   mm2,r8d
 12c:	41 0f 6e d8          	movd   mm3,r8d
 130:	41 0f 6e e0          	movd   mm4,r8d
 134:	41 0f 6e e8          	movd   mm5,r8d
 138:	41 0f 6e f0          	movd   mm6,r8d
 13c:	41 0f 6e f8          	movd   mm7,r8d
 140:	f0 41 ff 06          	lock inc DWORD PTR [r14]

Show nanoBench command
Results:
- Instructions retired: 81.0
- Core cycles: 42.67
- Reference cycles: 42.33
- UOPS_PORT_0: 41.25
- UOPS_PORT_5: 40.75

⇨ One μop that can only use ports {'0', '5'}

With blocking instructions for ports {'0', '1', '5'}:

Code:

   0:	66 0f 55 c1          	andnpd xmm0,xmm1
   4:	66 0f 55 d1          	andnpd xmm2,xmm1
   8:	66 0f 55 d9          	andnpd xmm3,xmm1
   c:	66 0f 55 e1          	andnpd xmm4,xmm1
  10:	66 0f 55 e9          	andnpd xmm5,xmm1
  14:	66 0f 55 f1          	andnpd xmm6,xmm1
  18:	66 0f 55 f9          	andnpd xmm7,xmm1
  1c:	66 44 0f 55 c1       	andnpd xmm8,xmm1
  21:	66 44 0f 55 c9       	andnpd xmm9,xmm1
  26:	66 44 0f 55 d1       	andnpd xmm10,xmm1
  2b:	66 44 0f 55 d9       	andnpd xmm11,xmm1
  30:	66 44 0f 55 e1       	andnpd xmm12,xmm1
  35:	66 0f 55 c1          	andnpd xmm0,xmm1
  39:	66 0f 55 d1          	andnpd xmm2,xmm1
  3d:	66 0f 55 d9          	andnpd xmm3,xmm1
  41:	66 0f 55 e1          	andnpd xmm4,xmm1
  45:	66 0f 55 e9          	andnpd xmm5,xmm1
  49:	66 0f 55 f1          	andnpd xmm6,xmm1
  4d:	66 0f 55 f9          	andnpd xmm7,xmm1
  51:	66 44 0f 55 c1       	andnpd xmm8,xmm1
  56:	66 44 0f 55 c9       	andnpd xmm9,xmm1
  5b:	66 44 0f 55 d1       	andnpd xmm10,xmm1
  60:	66 44 0f 55 d9       	andnpd xmm11,xmm1
  65:	66 44 0f 55 e1       	andnpd xmm12,xmm1
  6a:	66 0f 55 c1          	andnpd xmm0,xmm1
  6e:	66 0f 55 d1          	andnpd xmm2,xmm1
  72:	66 0f 55 d9          	andnpd xmm3,xmm1
  76:	66 0f 55 e1          	andnpd xmm4,xmm1
  7a:	66 0f 55 e9          	andnpd xmm5,xmm1
  7e:	66 0f 55 f1          	andnpd xmm6,xmm1
  82:	66 0f 55 f9          	andnpd xmm7,xmm1
  86:	66 44 0f 55 c1       	andnpd xmm8,xmm1
  8b:	66 44 0f 55 c9       	andnpd xmm9,xmm1
  90:	66 44 0f 55 d1       	andnpd xmm10,xmm1
  95:	66 44 0f 55 d9       	andnpd xmm11,xmm1
  9a:	66 44 0f 55 e1       	andnpd xmm12,xmm1
  9f:	66 0f 55 c1          	andnpd xmm0,xmm1
  a3:	66 0f 55 d1          	andnpd xmm2,xmm1
  a7:	66 0f 55 d9          	andnpd xmm3,xmm1
  ab:	66 0f 55 e1          	andnpd xmm4,xmm1
  af:	66 0f 55 e9          	andnpd xmm5,xmm1
  b3:	66 0f 55 f1          	andnpd xmm6,xmm1
  b7:	66 0f 55 f9          	andnpd xmm7,xmm1
  bb:	66 44 0f 55 c1       	andnpd xmm8,xmm1
  c0:	66 44 0f 55 c9       	andnpd xmm9,xmm1
  c5:	66 44 0f 55 d1       	andnpd xmm10,xmm1
  ca:	66 44 0f 55 d9       	andnpd xmm11,xmm1
  cf:	66 44 0f 55 e1       	andnpd xmm12,xmm1
  d4:	66 0f 55 c1          	andnpd xmm0,xmm1
  d8:	66 0f 55 d1          	andnpd xmm2,xmm1
  dc:	66 0f 55 d9          	andnpd xmm3,xmm1
  e0:	66 0f 55 e1          	andnpd xmm4,xmm1
  e4:	66 0f 55 e9          	andnpd xmm5,xmm1
  e8:	66 0f 55 f1          	andnpd xmm6,xmm1
  ec:	66 0f 55 f9          	andnpd xmm7,xmm1
  f0:	66 44 0f 55 c1       	andnpd xmm8,xmm1
  f5:	66 44 0f 55 c9       	andnpd xmm9,xmm1
  fa:	66 44 0f 55 d1       	andnpd xmm10,xmm1
  ff:	66 44 0f 55 d9       	andnpd xmm11,xmm1
 104:	66 44 0f 55 e1       	andnpd xmm12,xmm1
 109:	66 0f 55 c1          	andnpd xmm0,xmm1
 10d:	66 0f 55 d1          	andnpd xmm2,xmm1
 111:	66 0f 55 d9          	andnpd xmm3,xmm1
 115:	66 0f 55 e1          	andnpd xmm4,xmm1
 119:	66 0f 55 e9          	andnpd xmm5,xmm1
 11d:	66 0f 55 f1          	andnpd xmm6,xmm1
 121:	66 0f 55 f9          	andnpd xmm7,xmm1
 125:	66 44 0f 55 c1       	andnpd xmm8,xmm1
 12a:	66 44 0f 55 c9       	andnpd xmm9,xmm1
 12f:	66 44 0f 55 d1       	andnpd xmm10,xmm1
 134:	66 44 0f 55 d9       	andnpd xmm11,xmm1
 139:	66 44 0f 55 e1       	andnpd xmm12,xmm1
 13e:	66 0f 55 c1          	andnpd xmm0,xmm1
 142:	66 0f 55 d1          	andnpd xmm2,xmm1
 146:	66 0f 55 d9          	andnpd xmm3,xmm1
 14a:	66 0f 55 e1          	andnpd xmm4,xmm1
 14e:	66 0f 55 e9          	andnpd xmm5,xmm1
 152:	66 0f 55 f1          	andnpd xmm6,xmm1
 156:	66 0f 55 f9          	andnpd xmm7,xmm1
 15a:	66 44 0f 55 c1       	andnpd xmm8,xmm1
 15f:	66 44 0f 55 c9       	andnpd xmm9,xmm1
 164:	66 44 0f 55 d1       	andnpd xmm10,xmm1
 169:	66 44 0f 55 d9       	andnpd xmm11,xmm1
 16e:	66 44 0f 55 e1       	andnpd xmm12,xmm1
 173:	66 0f 55 c1          	andnpd xmm0,xmm1
 177:	66 0f 55 d1          	andnpd xmm2,xmm1
 17b:	66 0f 55 d9          	andnpd xmm3,xmm1
 17f:	66 0f 55 e1          	andnpd xmm4,xmm1
 183:	66 0f 55 e9          	andnpd xmm5,xmm1
 187:	66 0f 55 f1          	andnpd xmm6,xmm1
 18b:	66 0f 55 f9          	andnpd xmm7,xmm1
 18f:	66 44 0f 55 c1       	andnpd xmm8,xmm1
 194:	66 44 0f 55 c9       	andnpd xmm9,xmm1
 199:	66 44 0f 55 d1       	andnpd xmm10,xmm1
 19e:	66 44 0f 55 d9       	andnpd xmm11,xmm1
 1a3:	66 44 0f 55 e1       	andnpd xmm12,xmm1
 1a8:	66 0f 55 c1          	andnpd xmm0,xmm1
 1ac:	66 0f 55 d1          	andnpd xmm2,xmm1
 1b0:	66 0f 55 d9          	andnpd xmm3,xmm1
 1b4:	66 0f 55 e1          	andnpd xmm4,xmm1
 1b8:	f0 41 ff 06          	lock inc DWORD PTR [r14]

Init:

PXOR XMM0, XMM0;
PXOR XMM1, XMM1;
PXOR XMM2, XMM2;
PXOR XMM3, XMM3;
PXOR XMM4, XMM4;
PXOR XMM5, XMM5;
PXOR XMM6, XMM6;
PXOR XMM7, XMM7;
PXOR XMM8, XMM8;
PXOR XMM9, XMM9;
PXOR XMM10, XMM10;
PXOR XMM11, XMM11;
PXOR XMM12, XMM12

Show nanoBench command
Results:
- Instructions retired: 101.0
- Core cycles: 103.7
- Reference cycles: 103.73
- UOPS_PORT_0: 14.0
- UOPS_PORT_1: 42.4
- UOPS_PORT_5: 46.6

⇨ One μop that can only use ports {'0', '1', '5'}

With an indexed addressing mode

With blocking instructions for port '2':

Code:

   0:	66 45 8b 46 40       	mov    r8w,WORD PTR [r14+0x40]
   5:	66 45 8b 4e 42       	mov    r9w,WORD PTR [r14+0x42]
   a:	66 45 8b 56 44       	mov    r10w,WORD PTR [r14+0x44]
   f:	66 45 8b 5e 46       	mov    r11w,WORD PTR [r14+0x46]
  14:	66 45 8b 66 48       	mov    r12w,WORD PTR [r14+0x48]
  19:	66 41 8b 5e 4a       	mov    bx,WORD PTR [r14+0x4a]
  1e:	66 41 8b 4e 4c       	mov    cx,WORD PTR [r14+0x4c]
  23:	66 41 8b 56 4e       	mov    dx,WORD PTR [r14+0x4e]
  28:	66 45 8b 46 40       	mov    r8w,WORD PTR [r14+0x40]
  2d:	66 45 8b 4e 42       	mov    r9w,WORD PTR [r14+0x42]
  32:	66 45 8b 56 44       	mov    r10w,WORD PTR [r14+0x44]
  37:	66 45 8b 5e 46       	mov    r11w,WORD PTR [r14+0x46]
  3c:	66 45 8b 66 48       	mov    r12w,WORD PTR [r14+0x48]
  41:	66 41 8b 5e 4a       	mov    bx,WORD PTR [r14+0x4a]
  46:	66 41 8b 4e 4c       	mov    cx,WORD PTR [r14+0x4c]
  4b:	66 41 8b 56 4e       	mov    dx,WORD PTR [r14+0x4e]
  50:	66 45 8b 46 40       	mov    r8w,WORD PTR [r14+0x40]
  55:	66 45 8b 4e 42       	mov    r9w,WORD PTR [r14+0x42]
  5a:	66 45 8b 56 44       	mov    r10w,WORD PTR [r14+0x44]
  5f:	66 45 8b 5e 46       	mov    r11w,WORD PTR [r14+0x46]
  64:	66 45 8b 66 48       	mov    r12w,WORD PTR [r14+0x48]
  69:	66 41 8b 5e 4a       	mov    bx,WORD PTR [r14+0x4a]
  6e:	66 41 8b 4e 4c       	mov    cx,WORD PTR [r14+0x4c]
  73:	66 41 8b 56 4e       	mov    dx,WORD PTR [r14+0x4e]
  78:	66 45 8b 46 40       	mov    r8w,WORD PTR [r14+0x40]
  7d:	66 45 8b 4e 42       	mov    r9w,WORD PTR [r14+0x42]
  82:	66 45 8b 56 44       	mov    r10w,WORD PTR [r14+0x44]
  87:	66 45 8b 5e 46       	mov    r11w,WORD PTR [r14+0x46]
  8c:	66 45 8b 66 48       	mov    r12w,WORD PTR [r14+0x48]
  91:	66 41 8b 5e 4a       	mov    bx,WORD PTR [r14+0x4a]
  96:	66 41 8b 4e 4c       	mov    cx,WORD PTR [r14+0x4c]
  9b:	66 41 8b 56 4e       	mov    dx,WORD PTR [r14+0x4e]
  a0:	66 45 8b 46 40       	mov    r8w,WORD PTR [r14+0x40]
  a5:	66 45 8b 4e 42       	mov    r9w,WORD PTR [r14+0x42]
  aa:	66 45 8b 56 44       	mov    r10w,WORD PTR [r14+0x44]
  af:	66 45 8b 5e 46       	mov    r11w,WORD PTR [r14+0x46]
  b4:	66 45 8b 66 48       	mov    r12w,WORD PTR [r14+0x48]
  b9:	66 41 8b 5e 4a       	mov    bx,WORD PTR [r14+0x4a]
  be:	66 41 8b 4e 4c       	mov    cx,WORD PTR [r14+0x4c]
  c3:	66 41 8b 56 4e       	mov    dx,WORD PTR [r14+0x4e]
  c8:	f0 43 ff 04 2e       	lock inc DWORD PTR [r14+r13*1]

Init:
```
XOR R13, R13
```
Show nanoBench command
Results:
- Instructions retired: 41.0
- Core cycles: 64.76
- Reference cycles: 64.85
- UOPS_PORT_2: 41.0

⇨ One μop that can only use port '2'

With blocking instructions for port '3':

Code:

   0:	4d 89 46 40          	mov    QWORD PTR [r14+0x40],r8
   4:	4d 89 46 48          	mov    QWORD PTR [r14+0x48],r8
   8:	4d 89 46 50          	mov    QWORD PTR [r14+0x50],r8
   c:	4d 89 46 58          	mov    QWORD PTR [r14+0x58],r8
  10:	4d 89 46 60          	mov    QWORD PTR [r14+0x60],r8
  14:	4d 89 46 68          	mov    QWORD PTR [r14+0x68],r8
  18:	4d 89 46 70          	mov    QWORD PTR [r14+0x70],r8
  1c:	4d 89 46 78          	mov    QWORD PTR [r14+0x78],r8
  20:	4d 89 86 80 00 00 00 	mov    QWORD PTR [r14+0x80],r8
  27:	4d 89 86 88 00 00 00 	mov    QWORD PTR [r14+0x88],r8
  2e:	4d 89 86 90 00 00 00 	mov    QWORD PTR [r14+0x90],r8
  35:	4d 89 86 98 00 00 00 	mov    QWORD PTR [r14+0x98],r8
  3c:	4d 89 86 a0 00 00 00 	mov    QWORD PTR [r14+0xa0],r8
  43:	4d 89 86 a8 00 00 00 	mov    QWORD PTR [r14+0xa8],r8
  4a:	4d 89 86 b0 00 00 00 	mov    QWORD PTR [r14+0xb0],r8
  51:	4d 89 86 b8 00 00 00 	mov    QWORD PTR [r14+0xb8],r8
  58:	4d 89 46 40          	mov    QWORD PTR [r14+0x40],r8
  5c:	4d 89 46 48          	mov    QWORD PTR [r14+0x48],r8
  60:	4d 89 46 50          	mov    QWORD PTR [r14+0x50],r8
  64:	4d 89 46 58          	mov    QWORD PTR [r14+0x58],r8
  68:	4d 89 46 60          	mov    QWORD PTR [r14+0x60],r8
  6c:	4d 89 46 68          	mov    QWORD PTR [r14+0x68],r8
  70:	4d 89 46 70          	mov    QWORD PTR [r14+0x70],r8
  74:	4d 89 46 78          	mov    QWORD PTR [r14+0x78],r8
  78:	4d 89 86 80 00 00 00 	mov    QWORD PTR [r14+0x80],r8
  7f:	4d 89 86 88 00 00 00 	mov    QWORD PTR [r14+0x88],r8
  86:	4d 89 86 90 00 00 00 	mov    QWORD PTR [r14+0x90],r8
  8d:	4d 89 86 98 00 00 00 	mov    QWORD PTR [r14+0x98],r8
  94:	4d 89 86 a0 00 00 00 	mov    QWORD PTR [r14+0xa0],r8
  9b:	4d 89 86 a8 00 00 00 	mov    QWORD PTR [r14+0xa8],r8
  a2:	4d 89 86 b0 00 00 00 	mov    QWORD PTR [r14+0xb0],r8
  a9:	4d 89 86 b8 00 00 00 	mov    QWORD PTR [r14+0xb8],r8
  b0:	4d 89 46 40          	mov    QWORD PTR [r14+0x40],r8
  b4:	4d 89 46 48          	mov    QWORD PTR [r14+0x48],r8
  b8:	4d 89 46 50          	mov    QWORD PTR [r14+0x50],r8
  bc:	4d 89 46 58          	mov    QWORD PTR [r14+0x58],r8
  c0:	4d 89 46 60          	mov    QWORD PTR [r14+0x60],r8
  c4:	4d 89 46 68          	mov    QWORD PTR [r14+0x68],r8
  c8:	4d 89 46 70          	mov    QWORD PTR [r14+0x70],r8
  cc:	4d 89 46 78          	mov    QWORD PTR [r14+0x78],r8
  d0:	f0 43 ff 04 2e       	lock inc DWORD PTR [r14+r13*1]

Init:
```
XOR R13, R13
```
Show nanoBench command
Results:
- Instructions retired: 41.0
- Core cycles: 72.64
- Reference cycles: 72.75
- UOPS_PORT_3: 42.0

⇨ 2 μops that can only use port '3'

With blocking instructions for port '4':

Code:

   0:	4d 89 46 40          	mov    QWORD PTR [r14+0x40],r8
   4:	4d 89 46 48          	mov    QWORD PTR [r14+0x48],r8
   8:	4d 89 46 50          	mov    QWORD PTR [r14+0x50],r8
   c:	4d 89 46 58          	mov    QWORD PTR [r14+0x58],r8
  10:	4d 89 46 60          	mov    QWORD PTR [r14+0x60],r8
  14:	4d 89 46 68          	mov    QWORD PTR [r14+0x68],r8
  18:	4d 89 46 70          	mov    QWORD PTR [r14+0x70],r8
  1c:	4d 89 46 78          	mov    QWORD PTR [r14+0x78],r8
  20:	4d 89 86 80 00 00 00 	mov    QWORD PTR [r14+0x80],r8
  27:	4d 89 86 88 00 00 00 	mov    QWORD PTR [r14+0x88],r8
  2e:	4d 89 86 90 00 00 00 	mov    QWORD PTR [r14+0x90],r8
  35:	4d 89 86 98 00 00 00 	mov    QWORD PTR [r14+0x98],r8
  3c:	4d 89 86 a0 00 00 00 	mov    QWORD PTR [r14+0xa0],r8
  43:	4d 89 86 a8 00 00 00 	mov    QWORD PTR [r14+0xa8],r8
  4a:	4d 89 86 b0 00 00 00 	mov    QWORD PTR [r14+0xb0],r8
  51:	4d 89 86 b8 00 00 00 	mov    QWORD PTR [r14+0xb8],r8
  58:	4d 89 46 40          	mov    QWORD PTR [r14+0x40],r8
  5c:	4d 89 46 48          	mov    QWORD PTR [r14+0x48],r8
  60:	4d 89 46 50          	mov    QWORD PTR [r14+0x50],r8
  64:	4d 89 46 58          	mov    QWORD PTR [r14+0x58],r8
  68:	4d 89 46 60          	mov    QWORD PTR [r14+0x60],r8
  6c:	4d 89 46 68          	mov    QWORD PTR [r14+0x68],r8
  70:	4d 89 46 70          	mov    QWORD PTR [r14+0x70],r8
  74:	4d 89 46 78          	mov    QWORD PTR [r14+0x78],r8
  78:	4d 89 86 80 00 00 00 	mov    QWORD PTR [r14+0x80],r8
  7f:	4d 89 86 88 00 00 00 	mov    QWORD PTR [r14+0x88],r8
  86:	4d 89 86 90 00 00 00 	mov    QWORD PTR [r14+0x90],r8
  8d:	4d 89 86 98 00 00 00 	mov    QWORD PTR [r14+0x98],r8
  94:	4d 89 86 a0 00 00 00 	mov    QWORD PTR [r14+0xa0],r8
  9b:	4d 89 86 a8 00 00 00 	mov    QWORD PTR [r14+0xa8],r8
  a2:	4d 89 86 b0 00 00 00 	mov    QWORD PTR [r14+0xb0],r8
  a9:	4d 89 86 b8 00 00 00 	mov    QWORD PTR [r14+0xb8],r8
  b0:	4d 89 46 40          	mov    QWORD PTR [r14+0x40],r8
  b4:	4d 89 46 48          	mov    QWORD PTR [r14+0x48],r8
  b8:	4d 89 46 50          	mov    QWORD PTR [r14+0x50],r8
  bc:	4d 89 46 58          	mov    QWORD PTR [r14+0x58],r8
  c0:	4d 89 46 60          	mov    QWORD PTR [r14+0x60],r8
  c4:	4d 89 46 68          	mov    QWORD PTR [r14+0x68],r8
  c8:	4d 89 46 70          	mov    QWORD PTR [r14+0x70],r8
  cc:	4d 89 46 78          	mov    QWORD PTR [r14+0x78],r8
  d0:	f0 43 ff 04 2e       	lock inc DWORD PTR [r14+r13*1]

Init:
```
XOR R13, R13
```
Show nanoBench command
Results:
- Instructions retired: 41.0
- Core cycles: 72.64
- Reference cycles: 72.75
- UOPS_PORT_4: 42.0

⇨ One μop that can only use port '4'

With blocking instructions for port '5':

Code:

   0:	f3 0f 16 c1          	movshdup xmm0,xmm1
   4:	f3 0f 16 d1          	movshdup xmm2,xmm1
   8:	f3 0f 16 d9          	movshdup xmm3,xmm1
   c:	f3 0f 16 e1          	movshdup xmm4,xmm1
  10:	f3 0f 16 e9          	movshdup xmm5,xmm1
  14:	f3 0f 16 f1          	movshdup xmm6,xmm1
  18:	f3 0f 16 f9          	movshdup xmm7,xmm1
  1c:	f3 44 0f 16 c1       	movshdup xmm8,xmm1
  21:	f3 44 0f 16 c9       	movshdup xmm9,xmm1
  26:	f3 44 0f 16 d1       	movshdup xmm10,xmm1
  2b:	f3 44 0f 16 d9       	movshdup xmm11,xmm1
  30:	f3 44 0f 16 e1       	movshdup xmm12,xmm1
  35:	f3 0f 16 c1          	movshdup xmm0,xmm1
  39:	f3 0f 16 d1          	movshdup xmm2,xmm1
  3d:	f3 0f 16 d9          	movshdup xmm3,xmm1
  41:	f3 0f 16 e1          	movshdup xmm4,xmm1
  45:	f3 0f 16 e9          	movshdup xmm5,xmm1
  49:	f3 0f 16 f1          	movshdup xmm6,xmm1
  4d:	f3 0f 16 f9          	movshdup xmm7,xmm1
  51:	f3 44 0f 16 c1       	movshdup xmm8,xmm1
  56:	f3 44 0f 16 c9       	movshdup xmm9,xmm1
  5b:	f3 44 0f 16 d1       	movshdup xmm10,xmm1
  60:	f3 44 0f 16 d9       	movshdup xmm11,xmm1
  65:	f3 44 0f 16 e1       	movshdup xmm12,xmm1
  6a:	f3 0f 16 c1          	movshdup xmm0,xmm1
  6e:	f3 0f 16 d1          	movshdup xmm2,xmm1
  72:	f3 0f 16 d9          	movshdup xmm3,xmm1
  76:	f3 0f 16 e1          	movshdup xmm4,xmm1
  7a:	f3 0f 16 e9          	movshdup xmm5,xmm1
  7e:	f3 0f 16 f1          	movshdup xmm6,xmm1
  82:	f3 0f 16 f9          	movshdup xmm7,xmm1
  86:	f3 44 0f 16 c1       	movshdup xmm8,xmm1
  8b:	f3 44 0f 16 c9       	movshdup xmm9,xmm1
  90:	f3 44 0f 16 d1       	movshdup xmm10,xmm1
  95:	f3 44 0f 16 d9       	movshdup xmm11,xmm1
  9a:	f3 44 0f 16 e1       	movshdup xmm12,xmm1
  9f:	f3 0f 16 c1          	movshdup xmm0,xmm1
  a3:	f3 0f 16 d1          	movshdup xmm2,xmm1
  a7:	f3 0f 16 d9          	movshdup xmm3,xmm1
  ab:	f3 0f 16 e1          	movshdup xmm4,xmm1
  af:	f0 43 ff 04 2e       	lock inc DWORD PTR [r14+r13*1]

Init:

MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM1, [R14];
XOR R13, R13

Show nanoBench command
Results:
- Instructions retired: 41.0
- Core cycles: 41.76
- Reference cycles: 41.81
- UOPS_PORT_5: 40.88

⇨ One μop that can only use port '5'

With blocking instructions for ports {'0', '5'}:

Code:

   0:	41 0f 6e c0          	movd   mm0,r8d
   4:	41 0f 6e c8          	movd   mm1,r8d
   8:	41 0f 6e d0          	movd   mm2,r8d
   c:	41 0f 6e d8          	movd   mm3,r8d
  10:	41 0f 6e e0          	movd   mm4,r8d
  14:	41 0f 6e e8          	movd   mm5,r8d
  18:	41 0f 6e f0          	movd   mm6,r8d
  1c:	41 0f 6e f8          	movd   mm7,r8d
  20:	41 0f 6e c0          	movd   mm0,r8d
  24:	41 0f 6e c8          	movd   mm1,r8d
  28:	41 0f 6e d0          	movd   mm2,r8d
  2c:	41 0f 6e d8          	movd   mm3,r8d
  30:	41 0f 6e e0          	movd   mm4,r8d
  34:	41 0f 6e e8          	movd   mm5,r8d
  38:	41 0f 6e f0          	movd   mm6,r8d
  3c:	41 0f 6e f8          	movd   mm7,r8d
  40:	41 0f 6e c0          	movd   mm0,r8d
  44:	41 0f 6e c8          	movd   mm1,r8d
  48:	41 0f 6e d0          	movd   mm2,r8d
  4c:	41 0f 6e d8          	movd   mm3,r8d
  50:	41 0f 6e e0          	movd   mm4,r8d
  54:	41 0f 6e e8          	movd   mm5,r8d
  58:	41 0f 6e f0          	movd   mm6,r8d
  5c:	41 0f 6e f8          	movd   mm7,r8d
  60:	41 0f 6e c0          	movd   mm0,r8d
  64:	41 0f 6e c8          	movd   mm1,r8d
  68:	41 0f 6e d0          	movd   mm2,r8d
  6c:	41 0f 6e d8          	movd   mm3,r8d
  70:	41 0f 6e e0          	movd   mm4,r8d
  74:	41 0f 6e e8          	movd   mm5,r8d
  78:	41 0f 6e f0          	movd   mm6,r8d
  7c:	41 0f 6e f8          	movd   mm7,r8d
  80:	41 0f 6e c0          	movd   mm0,r8d
  84:	41 0f 6e c8          	movd   mm1,r8d
  88:	41 0f 6e d0          	movd   mm2,r8d
  8c:	41 0f 6e d8          	movd   mm3,r8d
  90:	41 0f 6e e0          	movd   mm4,r8d
  94:	41 0f 6e e8          	movd   mm5,r8d
  98:	41 0f 6e f0          	movd   mm6,r8d
  9c:	41 0f 6e f8          	movd   mm7,r8d
  a0:	41 0f 6e c0          	movd   mm0,r8d
  a4:	41 0f 6e c8          	movd   mm1,r8d
  a8:	41 0f 6e d0          	movd   mm2,r8d
  ac:	41 0f 6e d8          	movd   mm3,r8d
  b0:	41 0f 6e e0          	movd   mm4,r8d
  b4:	41 0f 6e e8          	movd   mm5,r8d
  b8:	41 0f 6e f0          	movd   mm6,r8d
  bc:	41 0f 6e f8          	movd   mm7,r8d
  c0:	41 0f 6e c0          	movd   mm0,r8d
  c4:	41 0f 6e c8          	movd   mm1,r8d
  c8:	41 0f 6e d0          	movd   mm2,r8d
  cc:	41 0f 6e d8          	movd   mm3,r8d
  d0:	41 0f 6e e0          	movd   mm4,r8d
  d4:	41 0f 6e e8          	movd   mm5,r8d
  d8:	41 0f 6e f0          	movd   mm6,r8d
  dc:	41 0f 6e f8          	movd   mm7,r8d
  e0:	41 0f 6e c0          	movd   mm0,r8d
  e4:	41 0f 6e c8          	movd   mm1,r8d
  e8:	41 0f 6e d0          	movd   mm2,r8d
  ec:	41 0f 6e d8          	movd   mm3,r8d
  f0:	41 0f 6e e0          	movd   mm4,r8d
  f4:	41 0f 6e e8          	movd   mm5,r8d
  f8:	41 0f 6e f0          	movd   mm6,r8d
  fc:	41 0f 6e f8          	movd   mm7,r8d
 100:	41 0f 6e c0          	movd   mm0,r8d
 104:	41 0f 6e c8          	movd   mm1,r8d
 108:	41 0f 6e d0          	movd   mm2,r8d
 10c:	41 0f 6e d8          	movd   mm3,r8d
 110:	41 0f 6e e0          	movd   mm4,r8d
 114:	41 0f 6e e8          	movd   mm5,r8d
 118:	41 0f 6e f0          	movd   mm6,r8d
 11c:	41 0f 6e f8          	movd   mm7,r8d
 120:	41 0f 6e c0          	movd   mm0,r8d
 124:	41 0f 6e c8          	movd   mm1,r8d
 128:	41 0f 6e d0          	movd   mm2,r8d
 12c:	41 0f 6e d8          	movd   mm3,r8d
 130:	41 0f 6e e0          	movd   mm4,r8d
 134:	41 0f 6e e8          	movd   mm5,r8d
 138:	41 0f 6e f0          	movd   mm6,r8d
 13c:	41 0f 6e f8          	movd   mm7,r8d
 140:	f0 43 ff 04 2e       	lock inc DWORD PTR [r14+r13*1]

Init:
```
XOR R13, R13
```
Show nanoBench command
Results:
- Instructions retired: 81.0
- Core cycles: 42.67
- Reference cycles: 42.89
- UOPS_PORT_0: 41.25
- UOPS_PORT_5: 40.75

⇨ One μop that can only use ports {'0', '5'}

With blocking instructions for ports {'0', '1', '5'}:

Code:

   0:	66 0f 55 c1          	andnpd xmm0,xmm1
   4:	66 0f 55 d1          	andnpd xmm2,xmm1
   8:	66 0f 55 d9          	andnpd xmm3,xmm1
   c:	66 0f 55 e1          	andnpd xmm4,xmm1
  10:	66 0f 55 e9          	andnpd xmm5,xmm1
  14:	66 0f 55 f1          	andnpd xmm6,xmm1
  18:	66 0f 55 f9          	andnpd xmm7,xmm1
  1c:	66 44 0f 55 c1       	andnpd xmm8,xmm1
  21:	66 44 0f 55 c9       	andnpd xmm9,xmm1
  26:	66 44 0f 55 d1       	andnpd xmm10,xmm1
  2b:	66 44 0f 55 d9       	andnpd xmm11,xmm1
  30:	66 44 0f 55 e1       	andnpd xmm12,xmm1
  35:	66 0f 55 c1          	andnpd xmm0,xmm1
  39:	66 0f 55 d1          	andnpd xmm2,xmm1
  3d:	66 0f 55 d9          	andnpd xmm3,xmm1
  41:	66 0f 55 e1          	andnpd xmm4,xmm1
  45:	66 0f 55 e9          	andnpd xmm5,xmm1
  49:	66 0f 55 f1          	andnpd xmm6,xmm1
  4d:	66 0f 55 f9          	andnpd xmm7,xmm1
  51:	66 44 0f 55 c1       	andnpd xmm8,xmm1
  56:	66 44 0f 55 c9       	andnpd xmm9,xmm1
  5b:	66 44 0f 55 d1       	andnpd xmm10,xmm1
  60:	66 44 0f 55 d9       	andnpd xmm11,xmm1
  65:	66 44 0f 55 e1       	andnpd xmm12,xmm1
  6a:	66 0f 55 c1          	andnpd xmm0,xmm1
  6e:	66 0f 55 d1          	andnpd xmm2,xmm1
  72:	66 0f 55 d9          	andnpd xmm3,xmm1
  76:	66 0f 55 e1          	andnpd xmm4,xmm1
  7a:	66 0f 55 e9          	andnpd xmm5,xmm1
  7e:	66 0f 55 f1          	andnpd xmm6,xmm1
  82:	66 0f 55 f9          	andnpd xmm7,xmm1
  86:	66 44 0f 55 c1       	andnpd xmm8,xmm1
  8b:	66 44 0f 55 c9       	andnpd xmm9,xmm1
  90:	66 44 0f 55 d1       	andnpd xmm10,xmm1
  95:	66 44 0f 55 d9       	andnpd xmm11,xmm1
  9a:	66 44 0f 55 e1       	andnpd xmm12,xmm1
  9f:	66 0f 55 c1          	andnpd xmm0,xmm1
  a3:	66 0f 55 d1          	andnpd xmm2,xmm1
  a7:	66 0f 55 d9          	andnpd xmm3,xmm1
  ab:	66 0f 55 e1          	andnpd xmm4,xmm1
  af:	66 0f 55 e9          	andnpd xmm5,xmm1
  b3:	66 0f 55 f1          	andnpd xmm6,xmm1
  b7:	66 0f 55 f9          	andnpd xmm7,xmm1
  bb:	66 44 0f 55 c1       	andnpd xmm8,xmm1
  c0:	66 44 0f 55 c9       	andnpd xmm9,xmm1
  c5:	66 44 0f 55 d1       	andnpd xmm10,xmm1
  ca:	66 44 0f 55 d9       	andnpd xmm11,xmm1
  cf:	66 44 0f 55 e1       	andnpd xmm12,xmm1
  d4:	66 0f 55 c1          	andnpd xmm0,xmm1
  d8:	66 0f 55 d1          	andnpd xmm2,xmm1
  dc:	66 0f 55 d9          	andnpd xmm3,xmm1
  e0:	66 0f 55 e1          	andnpd xmm4,xmm1
  e4:	66 0f 55 e9          	andnpd xmm5,xmm1
  e8:	66 0f 55 f1          	andnpd xmm6,xmm1
  ec:	66 0f 55 f9          	andnpd xmm7,xmm1
  f0:	66 44 0f 55 c1       	andnpd xmm8,xmm1
  f5:	66 44 0f 55 c9       	andnpd xmm9,xmm1
  fa:	66 44 0f 55 d1       	andnpd xmm10,xmm1
  ff:	66 44 0f 55 d9       	andnpd xmm11,xmm1
 104:	66 44 0f 55 e1       	andnpd xmm12,xmm1
 109:	66 0f 55 c1          	andnpd xmm0,xmm1
 10d:	66 0f 55 d1          	andnpd xmm2,xmm1
 111:	66 0f 55 d9          	andnpd xmm3,xmm1
 115:	66 0f 55 e1          	andnpd xmm4,xmm1
 119:	66 0f 55 e9          	andnpd xmm5,xmm1
 11d:	66 0f 55 f1          	andnpd xmm6,xmm1
 121:	66 0f 55 f9          	andnpd xmm7,xmm1
 125:	66 44 0f 55 c1       	andnpd xmm8,xmm1
 12a:	66 44 0f 55 c9       	andnpd xmm9,xmm1
 12f:	66 44 0f 55 d1       	andnpd xmm10,xmm1
 134:	66 44 0f 55 d9       	andnpd xmm11,xmm1
 139:	66 44 0f 55 e1       	andnpd xmm12,xmm1
 13e:	66 0f 55 c1          	andnpd xmm0,xmm1
 142:	66 0f 55 d1          	andnpd xmm2,xmm1
 146:	66 0f 55 d9          	andnpd xmm3,xmm1
 14a:	66 0f 55 e1          	andnpd xmm4,xmm1
 14e:	66 0f 55 e9          	andnpd xmm5,xmm1
 152:	66 0f 55 f1          	andnpd xmm6,xmm1
 156:	66 0f 55 f9          	andnpd xmm7,xmm1
 15a:	66 44 0f 55 c1       	andnpd xmm8,xmm1
 15f:	66 44 0f 55 c9       	andnpd xmm9,xmm1
 164:	66 44 0f 55 d1       	andnpd xmm10,xmm1
 169:	66 44 0f 55 d9       	andnpd xmm11,xmm1
 16e:	66 44 0f 55 e1       	andnpd xmm12,xmm1
 173:	66 0f 55 c1          	andnpd xmm0,xmm1
 177:	66 0f 55 d1          	andnpd xmm2,xmm1
 17b:	66 0f 55 d9          	andnpd xmm3,xmm1
 17f:	66 0f 55 e1          	andnpd xmm4,xmm1
 183:	66 0f 55 e9          	andnpd xmm5,xmm1
 187:	66 0f 55 f1          	andnpd xmm6,xmm1
 18b:	66 0f 55 f9          	andnpd xmm7,xmm1
 18f:	66 44 0f 55 c1       	andnpd xmm8,xmm1
 194:	66 44 0f 55 c9       	andnpd xmm9,xmm1
 199:	66 44 0f 55 d1       	andnpd xmm10,xmm1
 19e:	66 44 0f 55 d9       	andnpd xmm11,xmm1
 1a3:	66 44 0f 55 e1       	andnpd xmm12,xmm1
 1a8:	66 0f 55 c1          	andnpd xmm0,xmm1
 1ac:	66 0f 55 d1          	andnpd xmm2,xmm1
 1b0:	66 0f 55 d9          	andnpd xmm3,xmm1
 1b4:	66 0f 55 e1          	andnpd xmm4,xmm1
 1b8:	f0 43 ff 04 2e       	lock inc DWORD PTR [r14+r13*1]

Init:

PXOR XMM0, XMM0;
PXOR XMM1, XMM1;
PXOR XMM2, XMM2;
PXOR XMM3, XMM3;
PXOR XMM4, XMM4;
PXOR XMM5, XMM5;
PXOR XMM6, XMM6;
PXOR XMM7, XMM7;
PXOR XMM8, XMM8;
PXOR XMM9, XMM9;
PXOR XMM10, XMM10;
PXOR XMM11, XMM11;
PXOR XMM12, XMM12;
XOR R13, R13

Show nanoBench command
Results:
- Instructions retired: 101.0
- Core cycles: 103.7
- Reference cycles: 103.73
- UOPS_PORT_0: 14.0
- UOPS_PORT_1: 42.4
- UOPS_PORT_5: 46.6

⇨ One μop that can only use ports {'0', '1', '5'}