DIV (R32) - Port Usage

With blocking instructions for port '0':

Code:

   0:	66 45 8d 06          	lea    r8w,[r14]
   4:	66 45 8d 0e          	lea    r9w,[r14]
   8:	66 45 8d 16          	lea    r10w,[r14]
   c:	66 45 8d 1e          	lea    r11w,[r14]
  10:	66 45 8d 26          	lea    r12w,[r14]
  14:	66 41 8d 0e          	lea    cx,[r14]
  18:	66 45 8d 06          	lea    r8w,[r14]
  1c:	66 45 8d 0e          	lea    r9w,[r14]
  20:	66 45 8d 16          	lea    r10w,[r14]
  24:	66 45 8d 1e          	lea    r11w,[r14]
  28:	66 45 8d 26          	lea    r12w,[r14]
  2c:	66 41 8d 0e          	lea    cx,[r14]
  30:	66 45 8d 06          	lea    r8w,[r14]
  34:	66 45 8d 0e          	lea    r9w,[r14]
  38:	66 45 8d 16          	lea    r10w,[r14]
  3c:	66 45 8d 1e          	lea    r11w,[r14]
  40:	66 45 8d 26          	lea    r12w,[r14]
  44:	66 41 8d 0e          	lea    cx,[r14]
  48:	66 45 8d 06          	lea    r8w,[r14]
  4c:	66 45 8d 0e          	lea    r9w,[r14]
  50:	66 45 8d 16          	lea    r10w,[r14]
  54:	66 45 8d 1e          	lea    r11w,[r14]
  58:	66 45 8d 26          	lea    r12w,[r14]
  5c:	66 41 8d 0e          	lea    cx,[r14]
  60:	48 c7 c0 00 00 00 00 	mov    rax,0x0
  67:	48 c7 c2 00 00 00 00 	mov    rdx,0x0
  6e:	f7 f3                	div    ebx

Init:
```
MOV EBX, 1;
MOV RAX, 0;
MOV RDX, 0
```
Show nanoBench command
Results:
- Instructions retired: 27.0
- Core cycles: 25.66
- Reference cycles: 25.76
- UOPS_PORT_0: 25.05

⇨ One μop that can only use port '0'

With blocking instructions for port '1':

Code:

   0:	66 0f 58 c1          	addpd  xmm0,xmm1
   4:	66 0f 58 d1          	addpd  xmm2,xmm1
   8:	66 0f 58 d9          	addpd  xmm3,xmm1
   c:	66 0f 58 e1          	addpd  xmm4,xmm1
  10:	66 0f 58 e9          	addpd  xmm5,xmm1
  14:	66 0f 58 f1          	addpd  xmm6,xmm1
  18:	66 0f 58 f9          	addpd  xmm7,xmm1
  1c:	66 44 0f 58 c1       	addpd  xmm8,xmm1
  21:	66 44 0f 58 c9       	addpd  xmm9,xmm1
  26:	66 44 0f 58 d1       	addpd  xmm10,xmm1
  2b:	66 44 0f 58 d9       	addpd  xmm11,xmm1
  30:	66 44 0f 58 e1       	addpd  xmm12,xmm1
  35:	66 0f 58 c1          	addpd  xmm0,xmm1
  39:	66 0f 58 d1          	addpd  xmm2,xmm1
  3d:	66 0f 58 d9          	addpd  xmm3,xmm1
  41:	66 0f 58 e1          	addpd  xmm4,xmm1
  45:	66 0f 58 e9          	addpd  xmm5,xmm1
  49:	66 0f 58 f1          	addpd  xmm6,xmm1
  4d:	66 0f 58 f9          	addpd  xmm7,xmm1
  51:	66 44 0f 58 c1       	addpd  xmm8,xmm1
  56:	66 44 0f 58 c9       	addpd  xmm9,xmm1
  5b:	66 44 0f 58 d1       	addpd  xmm10,xmm1
  60:	66 44 0f 58 d9       	addpd  xmm11,xmm1
  65:	66 44 0f 58 e1       	addpd  xmm12,xmm1
  6a:	48 c7 c0 00 00 00 00 	mov    rax,0x0
  71:	48 c7 c2 00 00 00 00 	mov    rdx,0x0
  78:	f7 f3                	div    ebx

Init:

MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
MOVUPD XMM1, [R14];
MOVUPD XMM2, [R14];
MOVUPD XMM3, [R14];
MOVUPD XMM4, [R14];
MOVUPD XMM5, [R14];
MOVUPD XMM6, [R14];
MOVUPD XMM7, [R14];
MOVUPD XMM8, [R14];
MOVUPD XMM9, [R14];
MOVUPD XMM10, [R14];
MOVUPD XMM11, [R14];
MOVUPD XMM12, [R14];
MOV EBX, 1;
MOV RAX, 0;
MOV RDX, 0

Show nanoBench command
Results:
- Instructions retired: 27.0
- Core cycles: 25.37
- Reference cycles: 25.3
- UOPS_PORT_1: 24.02

With blocking instructions for port '5':

Code:

   0:	f3 0f 16 c1          	movshdup xmm0,xmm1
   4:	f3 0f 16 d1          	movshdup xmm2,xmm1
   8:	f3 0f 16 d9          	movshdup xmm3,xmm1
   c:	f3 0f 16 e1          	movshdup xmm4,xmm1
  10:	f3 0f 16 e9          	movshdup xmm5,xmm1
  14:	f3 0f 16 f1          	movshdup xmm6,xmm1
  18:	f3 0f 16 f9          	movshdup xmm7,xmm1
  1c:	f3 44 0f 16 c1       	movshdup xmm8,xmm1
  21:	f3 44 0f 16 c9       	movshdup xmm9,xmm1
  26:	f3 44 0f 16 d1       	movshdup xmm10,xmm1
  2b:	f3 44 0f 16 d9       	movshdup xmm11,xmm1
  30:	f3 44 0f 16 e1       	movshdup xmm12,xmm1
  35:	f3 0f 16 c1          	movshdup xmm0,xmm1
  39:	f3 0f 16 d1          	movshdup xmm2,xmm1
  3d:	f3 0f 16 d9          	movshdup xmm3,xmm1
  41:	f3 0f 16 e1          	movshdup xmm4,xmm1
  45:	f3 0f 16 e9          	movshdup xmm5,xmm1
  49:	f3 0f 16 f1          	movshdup xmm6,xmm1
  4d:	f3 0f 16 f9          	movshdup xmm7,xmm1
  51:	f3 44 0f 16 c1       	movshdup xmm8,xmm1
  56:	f3 44 0f 16 c9       	movshdup xmm9,xmm1
  5b:	f3 44 0f 16 d1       	movshdup xmm10,xmm1
  60:	f3 44 0f 16 d9       	movshdup xmm11,xmm1
  65:	f3 44 0f 16 e1       	movshdup xmm12,xmm1
  6a:	48 c7 c0 00 00 00 00 	mov    rax,0x0
  71:	48 c7 c2 00 00 00 00 	mov    rdx,0x0
  78:	f7 f3                	div    ebx

Init:

MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM1, [R14];
MOV EBX, 1;
MOV RAX, 0;
MOV RDX, 0

Show nanoBench command
Results:
- Instructions retired: 27.0
- Core cycles: 24.0
- Reference cycles: 23.97
- UOPS_PORT_5: 23.9

With blocking instructions for ports {'0', '5'}:

Code:

   0:	41 0f 6e c0          	movd   mm0,r8d
   4:	41 0f 6e c8          	movd   mm1,r8d
   8:	41 0f 6e d0          	movd   mm2,r8d
   c:	41 0f 6e d8          	movd   mm3,r8d
  10:	41 0f 6e e0          	movd   mm4,r8d
  14:	41 0f 6e e8          	movd   mm5,r8d
  18:	41 0f 6e f0          	movd   mm6,r8d
  1c:	41 0f 6e f8          	movd   mm7,r8d
  20:	41 0f 6e c0          	movd   mm0,r8d
  24:	41 0f 6e c8          	movd   mm1,r8d
  28:	41 0f 6e d0          	movd   mm2,r8d
  2c:	41 0f 6e d8          	movd   mm3,r8d
  30:	41 0f 6e e0          	movd   mm4,r8d
  34:	41 0f 6e e8          	movd   mm5,r8d
  38:	41 0f 6e f0          	movd   mm6,r8d
  3c:	41 0f 6e f8          	movd   mm7,r8d
  40:	41 0f 6e c0          	movd   mm0,r8d
  44:	41 0f 6e c8          	movd   mm1,r8d
  48:	41 0f 6e d0          	movd   mm2,r8d
  4c:	41 0f 6e d8          	movd   mm3,r8d
  50:	41 0f 6e e0          	movd   mm4,r8d
  54:	41 0f 6e e8          	movd   mm5,r8d
  58:	41 0f 6e f0          	movd   mm6,r8d
  5c:	41 0f 6e f8          	movd   mm7,r8d
  60:	41 0f 6e c0          	movd   mm0,r8d
  64:	41 0f 6e c8          	movd   mm1,r8d
  68:	41 0f 6e d0          	movd   mm2,r8d
  6c:	41 0f 6e d8          	movd   mm3,r8d
  70:	41 0f 6e e0          	movd   mm4,r8d
  74:	41 0f 6e e8          	movd   mm5,r8d
  78:	41 0f 6e f0          	movd   mm6,r8d
  7c:	41 0f 6e f8          	movd   mm7,r8d
  80:	41 0f 6e c0          	movd   mm0,r8d
  84:	41 0f 6e c8          	movd   mm1,r8d
  88:	41 0f 6e d0          	movd   mm2,r8d
  8c:	41 0f 6e d8          	movd   mm3,r8d
  90:	41 0f 6e e0          	movd   mm4,r8d
  94:	41 0f 6e e8          	movd   mm5,r8d
  98:	41 0f 6e f0          	movd   mm6,r8d
  9c:	41 0f 6e f8          	movd   mm7,r8d
  a0:	41 0f 6e c0          	movd   mm0,r8d
  a4:	41 0f 6e c8          	movd   mm1,r8d
  a8:	41 0f 6e d0          	movd   mm2,r8d
  ac:	41 0f 6e d8          	movd   mm3,r8d
  b0:	41 0f 6e e0          	movd   mm4,r8d
  b4:	41 0f 6e e8          	movd   mm5,r8d
  b8:	41 0f 6e f0          	movd   mm6,r8d
  bc:	41 0f 6e f8          	movd   mm7,r8d
  c0:	48 c7 c0 00 00 00 00 	mov    rax,0x0
  c7:	48 c7 c2 00 00 00 00 	mov    rdx,0x0
  ce:	f7 f3                	div    ebx

Init:
```
MOV EBX, 1;
MOV RAX, 0;
MOV RDX, 0
```
Show nanoBench command
Results:
- Instructions retired: 51.0
- Core cycles: 26.65
- Reference cycles: 26.8
- UOPS_PORT_0: 25.2
- UOPS_PORT_5: 25.8

⇨ 2 μops that can only use ports {'0', '5'}

With blocking instructions for ports {'0', '1', '5'}:

Code:

   0:	66 0f 55 c1          	andnpd xmm0,xmm1
   4:	66 0f 55 d1          	andnpd xmm2,xmm1
   8:	66 0f 55 d9          	andnpd xmm3,xmm1
   c:	66 0f 55 e1          	andnpd xmm4,xmm1
  10:	66 0f 55 e9          	andnpd xmm5,xmm1
  14:	66 0f 55 f1          	andnpd xmm6,xmm1
  18:	66 0f 55 f9          	andnpd xmm7,xmm1
  1c:	66 44 0f 55 c1       	andnpd xmm8,xmm1
  21:	66 44 0f 55 c9       	andnpd xmm9,xmm1
  26:	66 44 0f 55 d1       	andnpd xmm10,xmm1
  2b:	66 44 0f 55 d9       	andnpd xmm11,xmm1
  30:	66 44 0f 55 e1       	andnpd xmm12,xmm1
  35:	66 0f 55 c1          	andnpd xmm0,xmm1
  39:	66 0f 55 d1          	andnpd xmm2,xmm1
  3d:	66 0f 55 d9          	andnpd xmm3,xmm1
  41:	66 0f 55 e1          	andnpd xmm4,xmm1
  45:	66 0f 55 e9          	andnpd xmm5,xmm1
  49:	66 0f 55 f1          	andnpd xmm6,xmm1
  4d:	66 0f 55 f9          	andnpd xmm7,xmm1
  51:	66 44 0f 55 c1       	andnpd xmm8,xmm1
  56:	66 44 0f 55 c9       	andnpd xmm9,xmm1
  5b:	66 44 0f 55 d1       	andnpd xmm10,xmm1
  60:	66 44 0f 55 d9       	andnpd xmm11,xmm1
  65:	66 44 0f 55 e1       	andnpd xmm12,xmm1
  6a:	66 0f 55 c1          	andnpd xmm0,xmm1
  6e:	66 0f 55 d1          	andnpd xmm2,xmm1
  72:	66 0f 55 d9          	andnpd xmm3,xmm1
  76:	66 0f 55 e1          	andnpd xmm4,xmm1
  7a:	66 0f 55 e9          	andnpd xmm5,xmm1
  7e:	66 0f 55 f1          	andnpd xmm6,xmm1
  82:	66 0f 55 f9          	andnpd xmm7,xmm1
  86:	66 44 0f 55 c1       	andnpd xmm8,xmm1
  8b:	66 44 0f 55 c9       	andnpd xmm9,xmm1
  90:	66 44 0f 55 d1       	andnpd xmm10,xmm1
  95:	66 44 0f 55 d9       	andnpd xmm11,xmm1
  9a:	66 44 0f 55 e1       	andnpd xmm12,xmm1
  9f:	66 0f 55 c1          	andnpd xmm0,xmm1
  a3:	66 0f 55 d1          	andnpd xmm2,xmm1
  a7:	66 0f 55 d9          	andnpd xmm3,xmm1
  ab:	66 0f 55 e1          	andnpd xmm4,xmm1
  af:	66 0f 55 e9          	andnpd xmm5,xmm1
  b3:	66 0f 55 f1          	andnpd xmm6,xmm1
  b7:	66 0f 55 f9          	andnpd xmm7,xmm1
  bb:	66 44 0f 55 c1       	andnpd xmm8,xmm1
  c0:	66 44 0f 55 c9       	andnpd xmm9,xmm1
  c5:	66 44 0f 55 d1       	andnpd xmm10,xmm1
  ca:	66 44 0f 55 d9       	andnpd xmm11,xmm1
  cf:	66 44 0f 55 e1       	andnpd xmm12,xmm1
  d4:	66 0f 55 c1          	andnpd xmm0,xmm1
  d8:	66 0f 55 d1          	andnpd xmm2,xmm1
  dc:	66 0f 55 d9          	andnpd xmm3,xmm1
  e0:	66 0f 55 e1          	andnpd xmm4,xmm1
  e4:	66 0f 55 e9          	andnpd xmm5,xmm1
  e8:	66 0f 55 f1          	andnpd xmm6,xmm1
  ec:	66 0f 55 f9          	andnpd xmm7,xmm1
  f0:	66 44 0f 55 c1       	andnpd xmm8,xmm1
  f5:	66 44 0f 55 c9       	andnpd xmm9,xmm1
  fa:	66 44 0f 55 d1       	andnpd xmm10,xmm1
  ff:	66 44 0f 55 d9       	andnpd xmm11,xmm1
 104:	66 44 0f 55 e1       	andnpd xmm12,xmm1
 109:	66 0f 55 c1          	andnpd xmm0,xmm1
 10d:	66 0f 55 d1          	andnpd xmm2,xmm1
 111:	66 0f 55 d9          	andnpd xmm3,xmm1
 115:	66 0f 55 e1          	andnpd xmm4,xmm1
 119:	66 0f 55 e9          	andnpd xmm5,xmm1
 11d:	66 0f 55 f1          	andnpd xmm6,xmm1
 121:	66 0f 55 f9          	andnpd xmm7,xmm1
 125:	66 44 0f 55 c1       	andnpd xmm8,xmm1
 12a:	66 44 0f 55 c9       	andnpd xmm9,xmm1
 12f:	66 44 0f 55 d1       	andnpd xmm10,xmm1
 134:	66 44 0f 55 d9       	andnpd xmm11,xmm1
 139:	66 44 0f 55 e1       	andnpd xmm12,xmm1
 13e:	48 c7 c0 00 00 00 00 	mov    rax,0x0
 145:	48 c7 c2 00 00 00 00 	mov    rdx,0x0
 14c:	f7 f3                	div    ebx

Init:

PXOR XMM0, XMM0;
PXOR XMM1, XMM1;
PXOR XMM2, XMM2;
PXOR XMM3, XMM3;
PXOR XMM4, XMM4;
PXOR XMM5, XMM5;
PXOR XMM6, XMM6;
PXOR XMM7, XMM7;
PXOR XMM8, XMM8;
PXOR XMM9, XMM9;
PXOR XMM10, XMM10;
PXOR XMM11, XMM11;
PXOR XMM12, XMM12;
MOV EBX, 1;
MOV RAX, 0;
MOV RDX, 0

Show nanoBench command
Results:
- Instructions retired: 75.0
- Core cycles: 74.31
- Reference cycles: 74.15
- UOPS_PORT_0: 12.31
- UOPS_PORT_1: 32.31
- UOPS_PORT_5: 33.38

⇨ One μop that can only use ports {'0', '1', '5'}