VPMULLQ (ZMM, ZMM, ZMM) - Port Usage

With blocking instructions for port '0':

• Code:

     0:	41 0f 7e c0          	movd   r8d,mm0
     4:	41 0f 7e c1          	movd   r9d,mm0
     8:	41 0f 7e c2          	movd   r10d,mm0
     c:	41 0f 7e c3          	movd   r11d,mm0
    10:	41 0f 7e c4          	movd   r12d,mm0
    14:	0f 7e c3             	movd   ebx,mm0
    17:	0f 7e c1             	movd   ecx,mm0
    1a:	0f 7e c2             	movd   edx,mm0
    1d:	0f 7e c0             	movd   eax,mm0
    20:	41 0f 7e c0          	movd   r8d,mm0
    24:	62 f2 f5 48 40 c2    	vpmullq zmm0,zmm1,zmm2
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  PXOR MM0, MM0;
  VZEROALL;
  VXORPS ZMM1, ZMM1, ZMM1;
  VXORPS ZMM2, ZMM2, ZMM2

• Show nanoBench command
• Results:
  • Instructions retired: 11.0
  • Core cycles: 10.08
  • Reference cycles: 7.5
  • UOPS_PORT_0: 10.03

With blocking instructions for port '5':

• Code:

     0:	41 0f 6e c0          	movd   mm0,r8d
     4:	41 0f 6e c8          	movd   mm1,r8d
     8:	41 0f 6e d0          	movd   mm2,r8d
     c:	41 0f 6e d8          	movd   mm3,r8d
    10:	41 0f 6e e0          	movd   mm4,r8d
    14:	41 0f 6e e8          	movd   mm5,r8d
    18:	41 0f 6e f0          	movd   mm6,r8d
    1c:	41 0f 6e f8          	movd   mm7,r8d
    20:	41 0f 6e c0          	movd   mm0,r8d
    24:	41 0f 6e c8          	movd   mm1,r8d
    28:	62 f2 f5 48 40 c2    	vpmullq zmm0,zmm1,zmm2
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS ZMM1, ZMM1, ZMM1;
  VXORPS ZMM2, ZMM2, ZMM2

• Show nanoBench command
• Results:
  • Instructions retired: 11.0
  • Core cycles: 10.04
  • Reference cycles: 8.75
  • UOPS_PORT_5: 9.99

With blocking instructions for ports {'0', '1'}:

• Code:

     0:	c5 d9 58 dd          	vaddpd xmm3,xmm4,xmm5
     4:	c5 d9 58 f5          	vaddpd xmm6,xmm4,xmm5
     8:	c5 d9 58 fd          	vaddpd xmm7,xmm4,xmm5
     c:	c5 59 58 c5          	vaddpd xmm8,xmm4,xmm5
    10:	c5 59 58 cd          	vaddpd xmm9,xmm4,xmm5
    14:	c5 59 58 d5          	vaddpd xmm10,xmm4,xmm5
    18:	c5 59 58 dd          	vaddpd xmm11,xmm4,xmm5
    1c:	c5 59 58 e5          	vaddpd xmm12,xmm4,xmm5
    20:	c5 d9 58 dd          	vaddpd xmm3,xmm4,xmm5
    24:	c5 d9 58 f5          	vaddpd xmm6,xmm4,xmm5
    28:	62 f2 f5 48 40 c2    	vpmullq zmm0,zmm1,zmm2
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  VMOVUPD XMM4, [R14];
  VMOVUPD XMM5, [R14];
  VXORPS ZMM1, ZMM1, ZMM1;
  VXORPS ZMM2, ZMM2, ZMM2

• Show nanoBench command
• Results:
  • Instructions retired: 11.0
  • Core cycles: 6.66
  • Reference cycles: 5.42
  • UOPS_PORT_1: 0.11
  • UOPS_PORT_0: 6.46

With blocking instructions for ports {'0', '5'}:

• Code:

     0:	0f 6f c1             	movq   mm0,mm1
     3:	0f 6f d1             	movq   mm2,mm1
     6:	0f 6f d9             	movq   mm3,mm1
     9:	0f 6f e1             	movq   mm4,mm1
     c:	0f 6f e9             	movq   mm5,mm1
     f:	0f 6f f1             	movq   mm6,mm1
    12:	0f 6f f9             	movq   mm7,mm1
    15:	0f 6f c1             	movq   mm0,mm1
    18:	0f 6f d1             	movq   mm2,mm1
    1b:	0f 6f d9             	movq   mm3,mm1
    1e:	62 f2 f5 48 40 c2    	vpmullq zmm0,zmm1,zmm2
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  PXOR MM1, MM1;
  VZEROALL;
  VXORPS ZMM1, ZMM1, ZMM1;
  VXORPS ZMM2, ZMM2, ZMM2

• Show nanoBench command
• Results:
  • Instructions retired: 11.0
  • Core cycles: 6.65
  • Reference cycles: 5.42
  • UOPS_PORT_5: 6.49
  • UOPS_PORT_0: 6.5