PCMPESTRM (XMM, XMM, I8) - Port Usage

With blocking instructions for port '0':

Code:

   0:	66 0f 38 de dc       	aesdec xmm3,xmm4
   5:	66 0f 38 de ec       	aesdec xmm5,xmm4
   a:	66 0f 38 de f4       	aesdec xmm6,xmm4
   f:	66 0f 38 de fc       	aesdec xmm7,xmm4
  14:	66 44 0f 38 de c4    	aesdec xmm8,xmm4
  1a:	66 44 0f 38 de cc    	aesdec xmm9,xmm4
  20:	66 44 0f 38 de d4    	aesdec xmm10,xmm4
  26:	66 44 0f 38 de dc    	aesdec xmm11,xmm4
  2c:	66 44 0f 38 de e4    	aesdec xmm12,xmm4
  32:	66 0f 38 de dc       	aesdec xmm3,xmm4
  37:	66 0f 3a 60 ca 02    	pcmpestrm xmm1,xmm2,0x2

Init:

VZEROALL;
PXOR XMM3, XMM3;
PXOR XMM4, XMM4;
PXOR XMM5, XMM5;
PXOR XMM6, XMM6;
PXOR XMM7, XMM7;
PXOR XMM8, XMM8;
PXOR XMM9, XMM9;
PXOR XMM10, XMM10;
PXOR XMM11, XMM11;
PXOR XMM12, XMM12;
PXOR XMM1, XMM1;
PXOR XMM2, XMM2

Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 13.15
- Reference cycles: 10.78
- UOPS_PORT_0: 13.0

⇨ 3 μops that can only use port '0'

With blocking instructions for port '1':

Code:

   0:	66 f2 45 0f 38 f1 c1 	crc32  r8d,r9w
   7:	66 f2 45 0f 38 f1 d1 	crc32  r10d,r9w
   e:	66 f2 45 0f 38 f1 d9 	crc32  r11d,r9w
  15:	66 f2 45 0f 38 f1 e1 	crc32  r12d,r9w
  1c:	66 f2 41 0f 38 f1 d9 	crc32  ebx,r9w
  23:	66 f2 41 0f 38 f1 c9 	crc32  ecx,r9w
  2a:	66 f2 45 0f 38 f1 c1 	crc32  r8d,r9w
  31:	66 f2 45 0f 38 f1 d1 	crc32  r10d,r9w
  38:	66 f2 45 0f 38 f1 d9 	crc32  r11d,r9w
  3f:	66 f2 45 0f 38 f1 e1 	crc32  r12d,r9w
  46:	66 0f 3a 60 ca 02    	pcmpestrm xmm1,xmm2,0x2

Init:

VZEROALL;
PXOR XMM1, XMM1;
PXOR XMM2, XMM2

Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 11.21
- Reference cycles: 8.21
- UOPS_PORT_1: 11.0

⇨ One μop that can only use port '1'

With blocking instructions for port '5':

Code:

   0:	66 0f 3a 21 dc 02    	insertps xmm3,xmm4,0x2
   6:	66 0f 3a 21 ec 02    	insertps xmm5,xmm4,0x2
   c:	66 0f 3a 21 f4 02    	insertps xmm6,xmm4,0x2
  12:	66 0f 3a 21 fc 02    	insertps xmm7,xmm4,0x2
  18:	66 44 0f 3a 21 c4 02 	insertps xmm8,xmm4,0x2
  1f:	66 44 0f 3a 21 cc 02 	insertps xmm9,xmm4,0x2
  26:	66 44 0f 3a 21 d4 02 	insertps xmm10,xmm4,0x2
  2d:	66 44 0f 3a 21 dc 02 	insertps xmm11,xmm4,0x2
  34:	66 44 0f 3a 21 e4 02 	insertps xmm12,xmm4,0x2
  3b:	66 0f 3a 21 dc 02    	insertps xmm3,xmm4,0x2
  41:	66 0f 3a 60 ca 02    	pcmpestrm xmm1,xmm2,0x2

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM3, [R14];
MOVUPD XMM4, [R14];
MOVUPD XMM5, [R14];
MOVUPD XMM6, [R14];
MOVUPD XMM7, [R14];
MOVUPD XMM8, [R14];
MOVUPD XMM9, [R14];
MOVUPD XMM10, [R14];
MOVUPD XMM11, [R14];
MOVUPD XMM12, [R14];
PXOR XMM1, XMM1;
PXOR XMM2, XMM2

Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 14.16
- Reference cycles: 10.78
- UOPS_PORT_5: 14.0

⇨ 4 μops that can only use port '5'

With blocking instructions for ports {'0', '6'}:

Code:

   0:	66 41 c1 c0 00       	rol    r8w,0x0
   5:	66 41 c1 c1 00       	rol    r9w,0x0
   a:	66 41 c1 c2 00       	rol    r10w,0x0
   f:	66 41 c1 c3 00       	rol    r11w,0x0
  14:	66 41 c1 c4 00       	rol    r12w,0x0
  19:	66 c1 c3 00          	rol    bx,0x0
  1d:	66 c1 c1 00          	rol    cx,0x0
  21:	66 41 c1 c0 00       	rol    r8w,0x0
  26:	66 41 c1 c1 00       	rol    r9w,0x0
  2b:	66 41 c1 c2 00       	rol    r10w,0x0
  30:	66 41 c1 c3 00       	rol    r11w,0x0
  35:	66 41 c1 c4 00       	rol    r12w,0x0
  3a:	66 c1 c3 00          	rol    bx,0x0
  3e:	66 c1 c1 00          	rol    cx,0x0
  42:	66 41 c1 c0 00       	rol    r8w,0x0
  47:	66 41 c1 c1 00       	rol    r9w,0x0
  4c:	66 41 c1 c2 00       	rol    r10w,0x0
  51:	66 41 c1 c3 00       	rol    r11w,0x0
  56:	66 41 c1 c4 00       	rol    r12w,0x0
  5b:	66 c1 c3 00          	rol    bx,0x0
  5f:	66 0f 3a 60 ca 02    	pcmpestrm xmm1,xmm2,0x2

Init:

VZEROALL;
PXOR XMM1, XMM1;
PXOR XMM2, XMM2

Show nanoBench command
Results:
- Instructions retired: 21.0
- Core cycles: 12.24
- Reference cycles: 9.75
- UOPS_PORT_0: 12.06
- UOPS_PORT_6: 11.94

⇨ One μop that can only use ports {'0', '6'}