VINSERTI128 (YMM, YMM, M128, I8) - Port Usage (IACA 3.0)


With blocking instructions for ports {'0', '1'}:

Throughput Analysis Report
--------------------------
Block Throughput: 5.45 Cycles       Throughput Bottleneck: Backend
Loop Count:  23
Port Binding In Cycles Per Iteration:
--------------------------------------------------------------------------------------------------
|  Port  |   0   -  DV   |   1   |   2   -  D    |   3   -  D    |   4   |   5   |   6   |   7   |
--------------------------------------------------------------------------------------------------
| Cycles |  5.5     0.0  |  5.5  |  0.5     0.5  |  0.5     0.5  |  0.0  |  0.0  |  0.0  |  0.0  |
--------------------------------------------------------------------------------------------------

| Num Of   |                    Ports pressure in cycles                         |      |
|  Uops    |  0  - DV    |  1   |  2  -  D    |  3  -  D    |  4   |  5   |  6   |  7   |
-----------------------------------------------------------------------------------------
|   1      | 0.5         | 0.5  |             |             |      |      |      |      | vblendpd xmm2, xmm3, xmm4, 0x2
|   1      | 0.5         | 0.5  |             |             |      |      |      |      | vblendpd xmm5, xmm3, xmm4, 0x2
|   1      | 0.5         | 0.5  |             |             |      |      |      |      | vblendpd xmm6, xmm3, xmm4, 0x2
|   1      | 0.5         | 0.5  |             |             |      |      |      |      | vblendpd xmm7, xmm3, xmm4, 0x2
|   1      | 0.5         | 0.5  |             |             |      |      |      |      | vblendpd xmm8, xmm3, xmm4, 0x2
|   1      | 0.5         | 0.5  |             |             |      |      |      |      | vblendpd xmm9, xmm3, xmm4, 0x2
|   1      | 0.5         | 0.5  |             |             |      |      |      |      | vblendpd xmm10, xmm3, xmm4, 0x2
|   1      | 0.5         | 0.5  |             |             |      |      |      |      | vblendpd xmm11, xmm3, xmm4, 0x2
|   1      | 0.5         | 0.5  |             |             |      |      |      |      | vblendpd xmm12, xmm3, xmm4, 0x2
|   1      | 0.5         | 0.5  |             |             |      |      |      |      | vblendpd xmm2, xmm3, xmm4, 0x2
|   2      | 0.5         | 0.5  | 0.5     0.5 | 0.5     0.5 |      |      |      |      | vinserti128 ymm0, ymm1, xmmword ptr [r14], 0x2
Total Num Of Uops: 12
⇨ One μop that can only use ports {'0', '1'}

With blocking instructions for ports {'2', '3'}:

Throughput Analysis Report
--------------------------
Block Throughput: 5.53 Cycles       Throughput Bottleneck: Backend
Loop Count:  22
Port Binding In Cycles Per Iteration:
--------------------------------------------------------------------------------------------------
|  Port  |   0   -  DV   |   1   |   2   -  D    |   3   -  D    |   4   |   5   |   6   |   7   |
--------------------------------------------------------------------------------------------------
| Cycles |  0.5     0.0  |  0.5  |  5.5     5.5  |  5.5     5.5  |  0.0  |  0.0  |  0.0  |  0.0  |
--------------------------------------------------------------------------------------------------

| Num Of   |                    Ports pressure in cycles                         |      |
|  Uops    |  0  - DV    |  1   |  2  -  D    |  3  -  D    |  4   |  5   |  6   |  7   |
-----------------------------------------------------------------------------------------
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov r8w, word ptr [r14+0x40]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov r9w, word ptr [r14+0x42]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov r10w, word ptr [r14+0x44]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov r11w, word ptr [r14+0x46]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov r12w, word ptr [r14+0x48]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov bx, word ptr [r14+0x4a]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov cx, word ptr [r14+0x4c]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov dx, word ptr [r14+0x4e]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov r8w, word ptr [r14+0x40]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov r9w, word ptr [r14+0x42]
|   2      | 0.5         | 0.5  | 0.5     0.5 | 0.5     0.5 |      |      |      |      | vinserti128 ymm0, ymm1, xmmword ptr [r14], 0x2
Total Num Of Uops: 12
⇨ One μop that can only use ports {'2', '3'}

With an indexed addressing mode


With blocking instructions for ports {'0', '1'}:

Throughput Analysis Report
--------------------------
Block Throughput: 5.45 Cycles       Throughput Bottleneck: Backend
Loop Count:  23
Port Binding In Cycles Per Iteration:
--------------------------------------------------------------------------------------------------
|  Port  |   0   -  DV   |   1   |   2   -  D    |   3   -  D    |   4   |   5   |   6   |   7   |
--------------------------------------------------------------------------------------------------
| Cycles |  5.5     0.0  |  5.5  |  0.5     0.5  |  0.5     0.5  |  0.0  |  0.0  |  0.0  |  0.0  |
--------------------------------------------------------------------------------------------------

| Num Of   |                    Ports pressure in cycles                         |      |
|  Uops    |  0  - DV    |  1   |  2  -  D    |  3  -  D    |  4   |  5   |  6   |  7   |
-----------------------------------------------------------------------------------------
|   1      | 0.5         | 0.5  |             |             |      |      |      |      | vblendpd xmm2, xmm3, xmm4, 0x2
|   1      | 0.5         | 0.5  |             |             |      |      |      |      | vblendpd xmm5, xmm3, xmm4, 0x2
|   1      | 0.5         | 0.5  |             |             |      |      |      |      | vblendpd xmm6, xmm3, xmm4, 0x2
|   1      | 0.5         | 0.5  |             |             |      |      |      |      | vblendpd xmm7, xmm3, xmm4, 0x2
|   1      | 0.5         | 0.5  |             |             |      |      |      |      | vblendpd xmm8, xmm3, xmm4, 0x2
|   1      | 0.5         | 0.5  |             |             |      |      |      |      | vblendpd xmm9, xmm3, xmm4, 0x2
|   1      | 0.5         | 0.5  |             |             |      |      |      |      | vblendpd xmm10, xmm3, xmm4, 0x2
|   1      | 0.5         | 0.5  |             |             |      |      |      |      | vblendpd xmm11, xmm3, xmm4, 0x2
|   1      | 0.5         | 0.5  |             |             |      |      |      |      | vblendpd xmm12, xmm3, xmm4, 0x2
|   1      | 0.5         | 0.5  |             |             |      |      |      |      | vblendpd xmm2, xmm3, xmm4, 0x2
|   2      | 0.5         | 0.5  | 0.5     0.5 | 0.5     0.5 |      |      |      |      | vinserti128 ymm0, ymm1, xmmword ptr [r14+r13*1], 0x2
Total Num Of Uops: 12
⇨ One μop that can only use ports {'0', '1'}

With blocking instructions for ports {'2', '3'}:

Throughput Analysis Report
--------------------------
Block Throughput: 5.53 Cycles       Throughput Bottleneck: Backend
Loop Count:  22
Port Binding In Cycles Per Iteration:
--------------------------------------------------------------------------------------------------
|  Port  |   0   -  DV   |   1   |   2   -  D    |   3   -  D    |   4   |   5   |   6   |   7   |
--------------------------------------------------------------------------------------------------
| Cycles |  0.5     0.0  |  0.5  |  5.5     5.5  |  5.5     5.5  |  0.0  |  0.0  |  0.0  |  0.0  |
--------------------------------------------------------------------------------------------------

| Num Of   |                    Ports pressure in cycles                         |      |
|  Uops    |  0  - DV    |  1   |  2  -  D    |  3  -  D    |  4   |  5   |  6   |  7   |
-----------------------------------------------------------------------------------------
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov r8w, word ptr [r14+0x40]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov r9w, word ptr [r14+0x42]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov r10w, word ptr [r14+0x44]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov r11w, word ptr [r14+0x46]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov r12w, word ptr [r14+0x48]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov bx, word ptr [r14+0x4a]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov cx, word ptr [r14+0x4c]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov dx, word ptr [r14+0x4e]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov r8w, word ptr [r14+0x40]
|   1      |             |      | 0.5     0.5 | 0.5     0.5 |      |      |      |      | mov r9w, word ptr [r14+0x42]
|   2      | 0.5         | 0.5  | 0.5     0.5 | 0.5     0.5 |      |      |      |      | vinserti128 ymm0, ymm1, xmmword ptr [r14+r13*1], 0x2
Total Num Of Uops: 12
⇨ One μop that can only use ports {'2', '3'}