PCMPEQB (XMM, M128) - Port Usage

With blocking instructions for ports {'1', '5'}:

Code:

   0:	45 8d 06             	lea    r8d,[r14]
   3:	45 8d 0e             	lea    r9d,[r14]
   6:	45 8d 16             	lea    r10d,[r14]
   9:	45 8d 1e             	lea    r11d,[r14]
   c:	45 8d 26             	lea    r12d,[r14]
   f:	41 8d 1e             	lea    ebx,[r14]
  12:	41 8d 0e             	lea    ecx,[r14]
  15:	41 8d 16             	lea    edx,[r14]
  18:	45 8d 06             	lea    r8d,[r14]
  1b:	45 8d 0e             	lea    r9d,[r14]
  1e:	66 41 0f 74 06       	pcmpeqb xmm0,XMMWORD PTR [r14]

Init:
```
VZEROALL;
PXOR XMM0, XMM0
```
Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 5.55
- Reference cycles: 5.8
- UOPS_PORT_1: 5.5
- UOPS_PORT_5: 5.49

⇨ One μop that can only use ports {'1', '5'}

With blocking instructions for ports {'2', '3'}:

Code:

   0:	f2 41 0f f0 4e 40    	lddqu  xmm1,[r14+0x40]
   6:	f2 41 0f f0 56 50    	lddqu  xmm2,[r14+0x50]
   c:	f2 41 0f f0 5e 60    	lddqu  xmm3,[r14+0x60]
  12:	f2 41 0f f0 66 70    	lddqu  xmm4,[r14+0x70]
  18:	f2 41 0f f0 ae 80 00 	lddqu  xmm5,[r14+0x80]
  1f:	00 00 
  21:	f2 41 0f f0 b6 90 00 	lddqu  xmm6,[r14+0x90]
  28:	00 00 
  2a:	f2 41 0f f0 be a0 00 	lddqu  xmm7,[r14+0xa0]
  31:	00 00 
  33:	f2 45 0f f0 86 b0 00 	lddqu  xmm8,[r14+0xb0]
  3a:	00 00 
  3c:	f2 45 0f f0 8e c0 00 	lddqu  xmm9,[r14+0xc0]
  43:	00 00 
  45:	f2 45 0f f0 96 d0 00 	lddqu  xmm10,[r14+0xd0]
  4c:	00 00 
  4e:	66 41 0f 74 06       	pcmpeqb xmm0,XMMWORD PTR [r14]

Init:
```
VZEROALL;
PXOR XMM0, XMM0
```
Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 5.66
- Reference cycles: 6.0
- UOPS_PORT_2: 5.5
- UOPS_PORT_3: 5.5

⇨ One μop that can only use ports {'2', '3'}

With an indexed addressing mode

With blocking instructions for ports {'1', '5'}:

Code:

   0:	45 8d 06             	lea    r8d,[r14]
   3:	45 8d 0e             	lea    r9d,[r14]
   6:	45 8d 16             	lea    r10d,[r14]
   9:	45 8d 1e             	lea    r11d,[r14]
   c:	45 8d 26             	lea    r12d,[r14]
   f:	41 8d 1e             	lea    ebx,[r14]
  12:	41 8d 0e             	lea    ecx,[r14]
  15:	41 8d 16             	lea    edx,[r14]
  18:	45 8d 06             	lea    r8d,[r14]
  1b:	45 8d 0e             	lea    r9d,[r14]
  1e:	66 43 0f 74 04 2e    	pcmpeqb xmm0,XMMWORD PTR [r14+r13*1]

Init:
```
VZEROALL;
PXOR XMM0, XMM0;
XOR R13, R13
```
Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 5.55
- Reference cycles: 5.83
- UOPS_PORT_1: 5.5
- UOPS_PORT_5: 5.49

⇨ One μop that can only use ports {'1', '5'}

With blocking instructions for ports {'2', '3'}:

Code:

   0:	f2 41 0f f0 4e 40    	lddqu  xmm1,[r14+0x40]
   6:	f2 41 0f f0 56 50    	lddqu  xmm2,[r14+0x50]
   c:	f2 41 0f f0 5e 60    	lddqu  xmm3,[r14+0x60]
  12:	f2 41 0f f0 66 70    	lddqu  xmm4,[r14+0x70]
  18:	f2 41 0f f0 ae 80 00 	lddqu  xmm5,[r14+0x80]
  1f:	00 00 
  21:	f2 41 0f f0 b6 90 00 	lddqu  xmm6,[r14+0x90]
  28:	00 00 
  2a:	f2 41 0f f0 be a0 00 	lddqu  xmm7,[r14+0xa0]
  31:	00 00 
  33:	f2 45 0f f0 86 b0 00 	lddqu  xmm8,[r14+0xb0]
  3a:	00 00 
  3c:	f2 45 0f f0 8e c0 00 	lddqu  xmm9,[r14+0xc0]
  43:	00 00 
  45:	f2 45 0f f0 96 d0 00 	lddqu  xmm10,[r14+0xd0]
  4c:	00 00 
  4e:	66 43 0f 74 04 2e    	pcmpeqb xmm0,XMMWORD PTR [r14+r13*1]

Init:
```
VZEROALL;
PXOR XMM0, XMM0;
XOR R13, R13
```
Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 5.66
- Reference cycles: 6.0
- UOPS_PORT_2: 5.5
- UOPS_PORT_3: 5.5

⇨ One μop that can only use ports {'2', '3'}