IMUL (M32) - Port Usage (IACA 3.0)
With blocking instructions for port '1':
Throughput Analysis Report
--------------------------
Block Throughput: 10.95 Cycles Throughput Bottleneck: Backend
Loop Count: 22
Port Binding In Cycles Per Iteration:
--------------------------------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
--------------------------------------------------------------------------------------------------
| Cycles | 0.0 0.0 | 11.0 | 0.5 0.5 | 0.5 0.5 | 0.0 | 0.0 | 0.0 | 0.0 |
--------------------------------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
-----------------------------------------------------------------------------------------
| 1 | | 1.0 | | | | | | | cvtdq2ps xmm0, xmm1
| 1 | | 1.0 | | | | | | | cvtdq2ps xmm2, xmm1
| 1 | | 1.0 | | | | | | | cvtdq2ps xmm3, xmm1
| 1 | | 1.0 | | | | | | | cvtdq2ps xmm4, xmm1
| 1 | | 1.0 | | | | | | | cvtdq2ps xmm5, xmm1
| 1 | | 1.0 | | | | | | | cvtdq2ps xmm6, xmm1
| 1 | | 1.0 | | | | | | | cvtdq2ps xmm7, xmm1
| 1 | | 1.0 | | | | | | | cvtdq2ps xmm8, xmm1
| 1 | | 1.0 | | | | | | | cvtdq2ps xmm9, xmm1
| 1 | | 1.0 | | | | | | | cvtdq2ps xmm10, xmm1
| 2 | | 1.0 | 0.5 0.5 | 0.5 0.5 | | | | | imul dword ptr [r14]
Total Num Of Uops: 12
⇨ One μop that can only use port '1'
With blocking instructions for ports {'2', '3'}:
Throughput Analysis Report
--------------------------
Block Throughput: 6.53 Cycles Throughput Bottleneck: Backend
Loop Count: 22
Port Binding In Cycles Per Iteration:
--------------------------------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
--------------------------------------------------------------------------------------------------
| Cycles | 0.0 0.0 | 1.0 | 6.5 6.5 | 6.5 6.5 | 0.0 | 0.0 | 0.0 | 0.0 |
--------------------------------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
-----------------------------------------------------------------------------------------
| 1^ | | | 0.5 0.5 | 0.5 0.5 | | | | | lddqu xmm0, xmmword ptr [r14+0x40]
| 1^ | | | 0.5 0.5 | 0.5 0.5 | | | | | lddqu xmm1, xmmword ptr [r14+0x50]
| 1^ | | | 0.5 0.5 | 0.5 0.5 | | | | | lddqu xmm2, xmmword ptr [r14+0x60]
| 1^ | | | 0.5 0.5 | 0.5 0.5 | | | | | lddqu xmm3, xmmword ptr [r14+0x70]
| 1^ | | | 0.5 0.5 | 0.5 0.5 | | | | | lddqu xmm4, xmmword ptr [r14+0x80]
| 1^ | | | 0.5 0.5 | 0.5 0.5 | | | | | lddqu xmm5, xmmword ptr [r14+0x90]
| 1^ | | | 0.5 0.5 | 0.5 0.5 | | | | | lddqu xmm6, xmmword ptr [r14+0xa0]
| 1^ | | | 0.5 0.5 | 0.5 0.5 | | | | | lddqu xmm7, xmmword ptr [r14+0xb0]
| 1^ | | | 0.5 0.5 | 0.5 0.5 | | | | | lddqu xmm8, xmmword ptr [r14+0xc0]
| 1^ | | | 0.5 0.5 | 0.5 0.5 | | | | | lddqu xmm9, xmmword ptr [r14+0xd0]
| 1^ | | | 0.5 0.5 | 0.5 0.5 | | | | | lddqu xmm10, xmmword ptr [r14+0xe0]
| 1^ | | | 0.5 0.5 | 0.5 0.5 | | | | | lddqu xmm11, xmmword ptr [r14+0xf0]
| 2 | | 1.0 | 0.5 0.5 | 0.5 0.5 | | | | | imul dword ptr [r14]
Total Num Of Uops: 14
⇨ One μop that can only use ports {'2', '3'}
With an indexed addressing mode
With blocking instructions for port '1':
Throughput Analysis Report
--------------------------
Block Throughput: 10.95 Cycles Throughput Bottleneck: Backend
Loop Count: 22
Port Binding In Cycles Per Iteration:
--------------------------------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
--------------------------------------------------------------------------------------------------
| Cycles | 0.0 0.0 | 11.0 | 0.5 0.5 | 0.5 0.5 | 0.0 | 0.0 | 0.0 | 0.0 |
--------------------------------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
-----------------------------------------------------------------------------------------
| 1 | | 1.0 | | | | | | | cvtdq2ps xmm0, xmm1
| 1 | | 1.0 | | | | | | | cvtdq2ps xmm2, xmm1
| 1 | | 1.0 | | | | | | | cvtdq2ps xmm3, xmm1
| 1 | | 1.0 | | | | | | | cvtdq2ps xmm4, xmm1
| 1 | | 1.0 | | | | | | | cvtdq2ps xmm5, xmm1
| 1 | | 1.0 | | | | | | | cvtdq2ps xmm6, xmm1
| 1 | | 1.0 | | | | | | | cvtdq2ps xmm7, xmm1
| 1 | | 1.0 | | | | | | | cvtdq2ps xmm8, xmm1
| 1 | | 1.0 | | | | | | | cvtdq2ps xmm9, xmm1
| 1 | | 1.0 | | | | | | | cvtdq2ps xmm10, xmm1
| 2 | | 1.0 | 0.5 0.5 | 0.5 0.5 | | | | | imul dword ptr [r14+r13*1]
Total Num Of Uops: 12
⇨ One μop that can only use port '1'
With blocking instructions for ports {'2', '3'}:
Throughput Analysis Report
--------------------------
Block Throughput: 6.53 Cycles Throughput Bottleneck: Backend
Loop Count: 22
Port Binding In Cycles Per Iteration:
--------------------------------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
--------------------------------------------------------------------------------------------------
| Cycles | 0.0 0.0 | 1.0 | 6.5 6.5 | 6.5 6.5 | 0.0 | 0.0 | 0.0 | 0.0 |
--------------------------------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
-----------------------------------------------------------------------------------------
| 1^ | | | 0.5 0.5 | 0.5 0.5 | | | | | lddqu xmm0, xmmword ptr [r14+0x40]
| 1^ | | | 0.5 0.5 | 0.5 0.5 | | | | | lddqu xmm1, xmmword ptr [r14+0x50]
| 1^ | | | 0.5 0.5 | 0.5 0.5 | | | | | lddqu xmm2, xmmword ptr [r14+0x60]
| 1^ | | | 0.5 0.5 | 0.5 0.5 | | | | | lddqu xmm3, xmmword ptr [r14+0x70]
| 1^ | | | 0.5 0.5 | 0.5 0.5 | | | | | lddqu xmm4, xmmword ptr [r14+0x80]
| 1^ | | | 0.5 0.5 | 0.5 0.5 | | | | | lddqu xmm5, xmmword ptr [r14+0x90]
| 1^ | | | 0.5 0.5 | 0.5 0.5 | | | | | lddqu xmm6, xmmword ptr [r14+0xa0]
| 1^ | | | 0.5 0.5 | 0.5 0.5 | | | | | lddqu xmm7, xmmword ptr [r14+0xb0]
| 1^ | | | 0.5 0.5 | 0.5 0.5 | | | | | lddqu xmm8, xmmword ptr [r14+0xc0]
| 1^ | | | 0.5 0.5 | 0.5 0.5 | | | | | lddqu xmm9, xmmword ptr [r14+0xd0]
| 1^ | | | 0.5 0.5 | 0.5 0.5 | | | | | lddqu xmm10, xmmword ptr [r14+0xe0]
| 1^ | | | 0.5 0.5 | 0.5 0.5 | | | | | lddqu xmm11, xmmword ptr [r14+0xf0]
| 2 | | 1.0 | 0.5 0.5 | 0.5 0.5 | | | | | imul dword ptr [r14+r13*1]
Total Num Of Uops: 14
⇨ One μop that can only use ports {'2', '3'}