DIV (M64) - Port Usage (IACA 2.3)
With blocking instructions for port '0':
Throughput Analysis Report
--------------------------
Block Throughput: 56.00 Cycles Throughput Bottleneck: Backend. Port0
Port Binding In Cycles Per Iteration:
---------------------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
---------------------------------------------------------------------------------------
| Cycles | 56.0 0.0 | 2.0 | 0.5 0.5 | 0.5 0.5 | 0.0 | 2.0 | 1.0 | 0.0 |
---------------------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 | |
---------------------------------------------------------------------------------
| 1 | 1.0 | | | | | | | | CP | movd r8d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r9d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r10d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r11d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r12d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd ebx, mmx0
| 1 | 1.0 | | | | | | | | CP | movd ecx, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r8d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r9d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r10d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r11d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r12d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd ebx, mmx0
| 1 | 1.0 | | | | | | | | CP | movd ecx, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r8d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r9d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r10d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r11d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r12d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd ebx, mmx0
| 1 | 1.0 | | | | | | | | CP | movd ecx, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r8d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r9d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r10d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r11d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r12d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd ebx, mmx0
| 1 | 1.0 | | | | | | | | CP | movd ecx, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r8d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r9d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r10d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r11d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r12d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd ebx, mmx0
| 1 | 1.0 | | | | | | | | CP | movd ecx, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r8d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r9d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r10d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r11d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r12d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd ebx, mmx0
| 1 | 1.0 | | | | | | | | CP | movd ecx, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r8d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r9d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r10d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r11d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r12d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd ebx, mmx0
| 1 | 1.0 | | | | | | | | CP | movd ecx, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r8d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r9d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r10d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r11d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r12d, mmx0
| 8^ | 2.0 | 2.0 | 0.5 0.5 | 0.5 0.5 | | 2.0 | 1.0 | | CP | div qword ptr [r14]
Total Num Of Uops: 62
⇨ 2 μops that can only use port '0'
With blocking instructions for port '1':
Throughput Analysis Report
--------------------------
Block Throughput: 56.00 Cycles Throughput Bottleneck: Backend. Port1
Port Binding In Cycles Per Iteration:
---------------------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
---------------------------------------------------------------------------------------
| Cycles | 2.0 0.0 | 56.0 | 0.5 0.5 | 0.5 0.5 | 0.0 | 2.0 | 1.0 | 0.0 |
---------------------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 | |
---------------------------------------------------------------------------------
| 1 | | 1.0 | | | | | | | CP | addpd xmm0, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm2, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm3, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm4, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm5, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm6, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm7, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm8, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm9, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm10, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm11, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm12, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm0, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm2, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm3, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm4, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm5, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm6, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm7, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm8, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm9, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm10, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm11, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm12, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm0, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm2, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm3, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm4, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm5, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm6, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm7, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm8, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm9, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm10, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm11, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm12, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm0, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm2, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm3, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm4, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm5, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm6, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm7, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm8, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm9, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm10, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm11, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm12, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm0, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm2, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm3, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm4, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm5, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm6, xmm1
| 8^ | 2.0 | 2.0 | 0.5 0.5 | 0.5 0.5 | | 2.0 | 1.0 | | CP | div qword ptr [r14]
Total Num Of Uops: 62
⇨ 2 μops that can only use port '1'
With blocking instructions for port '5':
Throughput Analysis Report
--------------------------
Block Throughput: 56.00 Cycles Throughput Bottleneck: Backend. Port5
Port Binding In Cycles Per Iteration:
---------------------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
---------------------------------------------------------------------------------------
| Cycles | 2.0 0.0 | 2.0 | 0.5 0.5 | 0.5 0.5 | 0.0 | 56.0 | 1.0 | 0.0 |
---------------------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 | |
---------------------------------------------------------------------------------
| 1 | | | | | | 1.0 | | | CP | aesdec xmm0, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm2, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm3, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm4, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm5, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm6, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm7, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm8, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm9, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm10, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm11, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm12, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm0, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm2, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm3, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm4, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm5, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm6, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm7, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm8, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm9, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm10, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm11, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm12, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm0, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm2, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm3, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm4, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm5, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm6, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm7, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm8, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm9, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm10, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm11, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm12, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm0, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm2, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm3, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm4, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm5, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm6, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm7, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm8, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm9, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm10, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm11, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm12, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm0, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm2, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm3, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm4, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm5, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm6, xmm1
| 8^ | 2.0 | 2.0 | 0.5 0.5 | 0.5 0.5 | | 2.0 | 1.0 | | CP | div qword ptr [r14]
Total Num Of Uops: 62
⇨ 2 μops that can only use port '5'
With blocking instructions for ports {'0', '6'}:
Throughput Analysis Report
--------------------------
Block Throughput: 51.00 Cycles Throughput Bottleneck: Backend. Port0, Port6
Port Binding In Cycles Per Iteration:
---------------------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
---------------------------------------------------------------------------------------
| Cycles | 51.0 0.0 | 2.5 | 0.5 0.5 | 0.5 0.5 | 0.0 | 2.5 | 51.0 | 0.0 |
---------------------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 | |
---------------------------------------------------------------------------------
| 1 | | | | | | | 1.0 | | CP | sar r8w, 0x0
| 1 | | | | | | | 1.0 | | CP | sar r9w, 0x0
| 1 | 1.0 | | | | | | | | CP | sar r10w, 0x0
| 1 | | | | | | | 1.0 | | CP | sar r11w, 0x0
| 1 | 1.0 | | | | | | | | CP | sar r12w, 0x0
| 1 | | | | | | | 1.0 | | CP | sar bx, 0x0
| 1 | 1.0 | | | | | | | | CP | sar cx, 0x0
| 1 | | | | | | | 1.0 | | CP | sar r8w, 0x0
| 1 | 1.0 | | | | | | | | CP | sar r9w, 0x0
| 1 | | | | | | | 1.0 | | CP | sar r10w, 0x0
| 1 | 1.0 | | | | | | | | CP | sar r11w, 0x0
| 1 | | | | | | | 1.0 | | CP | sar r12w, 0x0
| 1 | 1.0 | | | | | | | | CP | sar bx, 0x0
| 1 | | | | | | | 1.0 | | CP | sar cx, 0x0
| 1 | 1.0 | | | | | | | | CP | sar r8w, 0x0
| 1 | | | | | | | 1.0 | | CP | sar r9w, 0x0
| 1 | 1.0 | | | | | | | | CP | sar r10w, 0x0
| 1 | | | | | | | 1.0 | | CP | sar r11w, 0x0
| 1 | 1.0 | | | | | | | | CP | sar r12w, 0x0
| 1 | | | | | | | 1.0 | | CP | sar bx, 0x0
| 1 | 1.0 | | | | | | | | CP | sar cx, 0x0
| 1 | | | | | | | 1.0 | | CP | sar r8w, 0x0
| 1 | 1.0 | | | | | | | | CP | sar r9w, 0x0
| 1 | | | | | | | 1.0 | | CP | sar r10w, 0x0
| 1 | 1.0 | | | | | | | | CP | sar r11w, 0x0
| 1 | | | | | | | 1.0 | | CP | sar r12w, 0x0
| 1 | 1.0 | | | | | | | | CP | sar bx, 0x0
| 1 | | | | | | | 1.0 | | CP | sar cx, 0x0
| 1 | 1.0 | | | | | | | | CP | sar r8w, 0x0
| 1 | | | | | | | 1.0 | | CP | sar r9w, 0x0
| 1 | 1.0 | | | | | | | | CP | sar r10w, 0x0
| 1 | | | | | | | 1.0 | | CP | sar r11w, 0x0
| 1 | 1.0 | | | | | | | | CP | sar r12w, 0x0
| 1 | | | | | | | 1.0 | | CP | sar bx, 0x0
| 1 | 1.0 | | | | | | | | CP | sar cx, 0x0
| 1 | | | | | | | 1.0 | | CP | sar r8w, 0x0
| 1 | 1.0 | | | | | | | | CP | sar r9w, 0x0
| 1 | | | | | | | 1.0 | | CP | sar r10w, 0x0
| 1 | 1.0 | | | | | | | | CP | sar r11w, 0x0
| 1 | | | | | | | 1.0 | | CP | sar r12w, 0x0
| 1 | 1.0 | | | | | | | | CP | sar bx, 0x0
| 1 | | | | | | | 1.0 | | CP | sar cx, 0x0
| 1 | 1.0 | | | | | | | | CP | sar r8w, 0x0
| 1 | | | | | | | 1.0 | | CP | sar r9w, 0x0
| 1 | 1.0 | | | | | | | | CP | sar r10w, 0x0
| 1 | | | | | | | 1.0 | | CP | sar r11w, 0x0
| 1 | 1.0 | | | | | | | | CP | sar r12w, 0x0
| 1 | | | | | | | 1.0 | | CP | sar bx, 0x0
| 1 | 1.0 | | | | | | | | CP | sar cx, 0x0
| 1 | | | | | | | 1.0 | | CP | sar r8w, 0x0
| 1 | 1.0 | | | | | | | | CP | sar r9w, 0x0
| 1 | | | | | | | 1.0 | | CP | sar r10w, 0x0
| 1 | 1.0 | | | | | | | | CP | sar r11w, 0x0
| 1 | | | | | | | 1.0 | | CP | sar r12w, 0x0
| 1 | 1.0 | | | | | | | | CP | sar bx, 0x0
| 1 | | | | | | | 1.0 | | CP | sar cx, 0x0
| 1 | 1.0 | | | | | | | | CP | sar r8w, 0x0
| 1 | | | | | | | 1.0 | | CP | sar r9w, 0x0
| 1 | 1.0 | | | | | | | | CP | sar r10w, 0x0
| 1 | | | | | | | 1.0 | | CP | sar r11w, 0x0
| 1 | 1.0 | | | | | | | | CP | sar r12w, 0x0
| 1 | | | | | | | 1.0 | | CP | sar bx, 0x0
| 1 | 1.0 | | | | | | | | CP | sar cx, 0x0
| 1 | | | | | | | 1.0 | | CP | sar r8w, 0x0
| 1 | 1.0 | | | | | | | | CP | sar r9w, 0x0
| 1 | | | | | | | 1.0 | | CP | sar r10w, 0x0
| 1 | 1.0 | | | | | | | | CP | sar r11w, 0x0
| 1 | | | | | | | 1.0 | | CP | sar r12w, 0x0
| 1 | 1.0 | | | | | | | | CP | sar bx, 0x0
| 1 | | | | | | | 1.0 | | CP | sar cx, 0x0
| 1 | 1.0 | | | | | | | | CP | sar r8w, 0x0
| 1 | | | | | | | 1.0 | | CP | sar r9w, 0x0
| 1 | 1.0 | | | | | | | | CP | sar r10w, 0x0
| 1 | | | | | | | 1.0 | | CP | sar r11w, 0x0
| 1 | 1.0 | | | | | | | | CP | sar r12w, 0x0
| 1 | | | | | | | 1.0 | | CP | sar bx, 0x0
| 1 | 1.0 | | | | | | | | CP | sar cx, 0x0
| 1 | | | | | | | 1.0 | | CP | sar r8w, 0x0
| 1 | 1.0 | | | | | | | | CP | sar r9w, 0x0
| 1 | | | | | | | 1.0 | | CP | sar r10w, 0x0
| 1 | 1.0 | | | | | | | | CP | sar r11w, 0x0
| 1 | | | | | | | 1.0 | | CP | sar r12w, 0x0
| 1 | 1.0 | | | | | | | | CP | sar bx, 0x0
| 1 | | | | | | | 1.0 | | CP | sar cx, 0x0
| 1 | 1.0 | | | | | | | | CP | sar r8w, 0x0
| 1 | | | | | | | 1.0 | | CP | sar r9w, 0x0
| 1 | 1.0 | | | | | | | | CP | sar r10w, 0x0
| 1 | | | | | | | 1.0 | | CP | sar r11w, 0x0
| 1 | 1.0 | | | | | | | | CP | sar r12w, 0x0
| 1 | | | | | | | 1.0 | | CP | sar bx, 0x0
| 1 | 1.0 | | | | | | | | CP | sar cx, 0x0
| 1 | | | | | | | 1.0 | | CP | sar r8w, 0x0
| 1 | 1.0 | | | | | | | | CP | sar r9w, 0x0
| 1 | | | | | | | 1.0 | | CP | sar r10w, 0x0
| 1 | 1.0 | | | | | | | | CP | sar r11w, 0x0
| 1 | | | | | | | 1.0 | | CP | sar r12w, 0x0
| 1 | 1.0 | | | | | | | | CP | sar bx, 0x0
| 1 | | | | | | | 1.0 | | CP | sar cx, 0x0
| 1 | 1.0 | | | | | | | | CP | sar r8w, 0x0
| 1 | | | | | | | 1.0 | | CP | sar r9w, 0x0
| 8^ | 2.0 | 2.5 | 0.5 0.5 | 0.5 0.5 | | 2.5 | | | CP | div qword ptr [r14]
Total Num Of Uops: 108
With blocking instructions for ports {'2', '3'}:
Throughput Analysis Report
--------------------------
Block Throughput: 50.50 Cycles Throughput Bottleneck: Backend. PORT2_AGU, Port2_DATA, PORT3_AGU, Port3_DATA
Port Binding In Cycles Per Iteration:
---------------------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
---------------------------------------------------------------------------------------
| Cycles | 2.0 0.0 | 2.0 | 50.5 50.5 | 50.5 50.5 | 0.0 | 2.0 | 1.0 | 0.0 |
---------------------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 | |
---------------------------------------------------------------------------------
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm0, xmmword ptr [r14+0x40]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm1, xmmword ptr [r14+0x50]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm2, xmmword ptr [r14+0x60]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm3, xmmword ptr [r14+0x70]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm4, xmmword ptr [r14+0x80]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm5, xmmword ptr [r14+0x90]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm6, xmmword ptr [r14+0xa0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm7, xmmword ptr [r14+0xb0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm8, xmmword ptr [r14+0xc0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm9, xmmword ptr [r14+0xd0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm10, xmmword ptr [r14+0xe0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm11, xmmword ptr [r14+0xf0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm12, xmmword ptr [r14+0x100]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm0, xmmword ptr [r14+0x40]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm1, xmmword ptr [r14+0x50]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm2, xmmword ptr [r14+0x60]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm3, xmmword ptr [r14+0x70]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm4, xmmword ptr [r14+0x80]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm5, xmmword ptr [r14+0x90]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm6, xmmword ptr [r14+0xa0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm7, xmmword ptr [r14+0xb0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm8, xmmword ptr [r14+0xc0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm9, xmmword ptr [r14+0xd0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm10, xmmword ptr [r14+0xe0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm11, xmmword ptr [r14+0xf0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm12, xmmword ptr [r14+0x100]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm0, xmmword ptr [r14+0x40]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm1, xmmword ptr [r14+0x50]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm2, xmmword ptr [r14+0x60]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm3, xmmword ptr [r14+0x70]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm4, xmmword ptr [r14+0x80]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm5, xmmword ptr [r14+0x90]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm6, xmmword ptr [r14+0xa0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm7, xmmword ptr [r14+0xb0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm8, xmmword ptr [r14+0xc0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm9, xmmword ptr [r14+0xd0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm10, xmmword ptr [r14+0xe0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm11, xmmword ptr [r14+0xf0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm12, xmmword ptr [r14+0x100]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm0, xmmword ptr [r14+0x40]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm1, xmmword ptr [r14+0x50]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm2, xmmword ptr [r14+0x60]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm3, xmmword ptr [r14+0x70]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm4, xmmword ptr [r14+0x80]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm5, xmmword ptr [r14+0x90]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm6, xmmword ptr [r14+0xa0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm7, xmmword ptr [r14+0xb0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm8, xmmword ptr [r14+0xc0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm9, xmmword ptr [r14+0xd0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm10, xmmword ptr [r14+0xe0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm11, xmmword ptr [r14+0xf0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm12, xmmword ptr [r14+0x100]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm0, xmmword ptr [r14+0x40]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm1, xmmword ptr [r14+0x50]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm2, xmmword ptr [r14+0x60]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm3, xmmword ptr [r14+0x70]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm4, xmmword ptr [r14+0x80]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm5, xmmword ptr [r14+0x90]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm6, xmmword ptr [r14+0xa0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm7, xmmword ptr [r14+0xb0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm8, xmmword ptr [r14+0xc0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm9, xmmword ptr [r14+0xd0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm10, xmmword ptr [r14+0xe0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm11, xmmword ptr [r14+0xf0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm12, xmmword ptr [r14+0x100]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm0, xmmword ptr [r14+0x40]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm1, xmmword ptr [r14+0x50]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm2, xmmword ptr [r14+0x60]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm3, xmmword ptr [r14+0x70]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm4, xmmword ptr [r14+0x80]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm5, xmmword ptr [r14+0x90]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm6, xmmword ptr [r14+0xa0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm7, xmmword ptr [r14+0xb0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm8, xmmword ptr [r14+0xc0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm9, xmmword ptr [r14+0xd0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm10, xmmword ptr [r14+0xe0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm11, xmmword ptr [r14+0xf0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm12, xmmword ptr [r14+0x100]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm0, xmmword ptr [r14+0x40]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm1, xmmword ptr [r14+0x50]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm2, xmmword ptr [r14+0x60]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm3, xmmword ptr [r14+0x70]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm4, xmmword ptr [r14+0x80]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm5, xmmword ptr [r14+0x90]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm6, xmmword ptr [r14+0xa0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm7, xmmword ptr [r14+0xb0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm8, xmmword ptr [r14+0xc0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm9, xmmword ptr [r14+0xd0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm10, xmmword ptr [r14+0xe0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm11, xmmword ptr [r14+0xf0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm12, xmmword ptr [r14+0x100]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm0, xmmword ptr [r14+0x40]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm1, xmmword ptr [r14+0x50]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm2, xmmword ptr [r14+0x60]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm3, xmmword ptr [r14+0x70]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm4, xmmword ptr [r14+0x80]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm5, xmmword ptr [r14+0x90]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm6, xmmword ptr [r14+0xa0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm7, xmmword ptr [r14+0xb0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm8, xmmword ptr [r14+0xc0]
| 8^ | 2.0 | 2.0 | 0.5 0.5 | 0.5 0.5 | | 2.0 | 1.0 | | CP | div qword ptr [r14]
Total Num Of Uops: 108
⇨ One μop that can only use ports {'2', '3'}
With blocking instructions for ports {'0', '1', '5', '6'}:
Throughput Analysis Report
--------------------------
Block Throughput: 27.76 Cycles Throughput Bottleneck: FrontEnd
Port Binding In Cycles Per Iteration:
---------------------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
---------------------------------------------------------------------------------------
| Cycles | 26.8 0.0 | 26.8 | 0.5 0.5 | 0.5 0.5 | 0.0 | 26.8 | 26.8 | 0.0 |
---------------------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 | |
---------------------------------------------------------------------------------
| 1 | | | | | | 0.1 | 0.9 | | CP | mov r8w, 0x100
| 1 | 0.2 | 0.2 | | | | 0.2 | 0.4 | | CP | mov r9w, 0x100
| 1 | 0.3 | 0.2 | | | | 0.2 | 0.2 | | CP | mov r10w, 0x100
| 1 | 0.2 | 0.3 | | | | 0.3 | 0.2 | | CP | mov r11w, 0x100
| 1 | 0.2 | 0.2 | | | | 0.2 | 0.3 | | CP | mov r12w, 0x100
| 1 | 0.3 | 0.2 | | | | 0.2 | 0.2 | | CP | mov bx, 0x100
| 1 | 0.2 | 0.3 | | | | 0.2 | 0.2 | | CP | mov cx, 0x100
| 1 | 0.2 | 0.2 | | | | 0.3 | 0.2 | | CP | mov r8w, 0x100
| 1 | 0.2 | 0.2 | | | | 0.2 | 0.3 | | CP | mov r9w, 0x100
| 1 | 0.3 | 0.2 | | | | 0.2 | 0.2 | | CP | mov r10w, 0x100
| 1 | 0.2 | 0.3 | | | | 0.2 | 0.2 | | CP | mov r11w, 0x100
| 1 | 0.2 | 0.2 | | | | 0.3 | 0.2 | | CP | mov r12w, 0x100
| 1 | 0.2 | 0.2 | | | | 0.2 | 0.3 | | CP | mov bx, 0x100
| 1 | 0.3 | 0.2 | | | | 0.2 | 0.2 | | CP | mov cx, 0x100
| 1 | 0.2 | 0.3 | | | | 0.2 | 0.2 | | CP | mov r8w, 0x100
| 1 | 0.2 | 0.2 | | | | 0.3 | 0.2 | | CP | mov r9w, 0x100
| 1 | 0.2 | 0.2 | | | | 0.2 | 0.3 | | CP | mov r10w, 0x100
| 1 | 0.3 | 0.2 | | | | 0.2 | 0.2 | | CP | mov r11w, 0x100
| 1 | 0.2 | 0.3 | | | | 0.2 | 0.2 | | CP | mov r12w, 0x100
| 1 | 0.2 | 0.2 | | | | 0.3 | 0.2 | | CP | mov bx, 0x100
| 1 | 0.2 | 0.2 | | | | 0.2 | 0.3 | | CP | mov cx, 0x100
| 1 | 0.3 | 0.2 | | | | 0.2 | 0.2 | | CP | mov r8w, 0x100
| 1 | 0.2 | 0.3 | | | | 0.2 | 0.2 | | CP | mov r9w, 0x100
| 1 | 0.2 | 0.2 | | | | 0.3 | 0.2 | | CP | mov r10w, 0x100
| 1 | 0.2 | 0.2 | | | | 0.2 | 0.3 | | CP | mov r11w, 0x100
| 1 | 0.3 | 0.2 | | | | 0.2 | 0.2 | | CP | mov r12w, 0x100
| 1 | 0.2 | 0.3 | | | | 0.2 | 0.2 | | CP | mov bx, 0x100
| 1 | 0.2 | 0.2 | | | | 0.3 | 0.2 | | CP | mov cx, 0x100
| 1 | 0.2 | 0.2 | | | | 0.2 | 0.3 | | CP | mov r8w, 0x100
| 1 | 0.3 | 0.2 | | | | 0.2 | 0.2 | | CP | mov r9w, 0x100
| 1 | 0.2 | 0.3 | | | | 0.2 | 0.2 | | CP | mov r10w, 0x100
| 1 | 0.2 | 0.2 | | | | 0.3 | 0.2 | | CP | mov r11w, 0x100
| 1 | 0.2 | 0.2 | | | | 0.2 | 0.3 | | CP | mov r12w, 0x100
| 1 | 0.3 | 0.2 | | | | 0.2 | 0.2 | | CP | mov bx, 0x100
| 1 | 0.2 | 0.3 | | | | 0.2 | 0.2 | | CP | mov cx, 0x100
| 1 | 0.2 | 0.2 | | | | 0.3 | 0.2 | | CP | mov r8w, 0x100
| 1 | 0.2 | 0.2 | | | | 0.2 | 0.3 | | CP | mov r9w, 0x100
| 1 | 0.3 | 0.2 | | | | 0.2 | 0.2 | | CP | mov r10w, 0x100
| 1 | 0.2 | 0.3 | | | | 0.2 | 0.2 | | CP | mov r11w, 0x100
| 1 | 0.2 | 0.2 | | | | 0.3 | 0.2 | | CP | mov r12w, 0x100
| 1 | 0.2 | 0.2 | | | | 0.2 | 0.3 | | CP | mov bx, 0x100
| 1 | 0.3 | 0.2 | | | | 0.2 | 0.2 | | CP | mov cx, 0x100
| 1 | 0.2 | 0.3 | | | | 0.2 | 0.2 | | CP | mov r8w, 0x100
| 1 | 0.2 | 0.2 | | | | 0.3 | 0.2 | | CP | mov r9w, 0x100
| 1 | 0.2 | 0.2 | | | | 0.2 | 0.3 | | CP | mov r10w, 0x100
| 1 | 0.3 | 0.2 | | | | 0.2 | 0.2 | | CP | mov r11w, 0x100
| 1 | 0.2 | 0.3 | | | | 0.2 | 0.2 | | CP | mov r12w, 0x100
| 1 | 0.2 | 0.2 | | | | 0.3 | 0.2 | | CP | mov bx, 0x100
| 1 | 0.2 | 0.2 | | | | 0.2 | 0.3 | | CP | mov cx, 0x100
| 1 | 0.3 | 0.2 | | | | 0.2 | 0.2 | | CP | mov r8w, 0x100
| 1 | 0.2 | 0.3 | | | | 0.2 | 0.2 | | CP | mov r9w, 0x100
| 1 | 0.2 | 0.2 | | | | 0.3 | 0.2 | | CP | mov r10w, 0x100
| 1 | 0.2 | 0.2 | | | | 0.2 | 0.3 | | CP | mov r11w, 0x100
| 1 | 0.3 | 0.2 | | | | 0.2 | 0.2 | | CP | mov r12w, 0x100
| 1 | 0.2 | 0.3 | | | | 0.2 | 0.2 | | CP | mov bx, 0x100
| 1 | 0.2 | 0.2 | | | | 0.3 | 0.2 | | CP | mov cx, 0x100
| 1 | 0.2 | 0.2 | | | | 0.2 | 0.3 | | CP | mov r8w, 0x100
| 1 | 0.3 | 0.2 | | | | 0.2 | 0.2 | | CP | mov r9w, 0x100
| 1 | 0.2 | 0.3 | | | | 0.2 | 0.2 | | CP | mov r10w, 0x100
| 1 | 0.2 | 0.2 | | | | 0.3 | 0.2 | | CP | mov r11w, 0x100
| 1 | 0.2 | 0.2 | | | | 0.2 | 0.3 | | CP | mov r12w, 0x100
| 1 | 0.3 | 0.2 | | | | 0.2 | 0.2 | | CP | mov bx, 0x100
| 1 | 0.2 | 0.3 | | | | 0.2 | 0.2 | | CP | mov cx, 0x100
| 1 | 0.2 | 0.2 | | | | 0.3 | 0.2 | | CP | mov r8w, 0x100
| 1 | 0.2 | 0.2 | | | | 0.2 | 0.3 | | CP | mov r9w, 0x100
| 1 | 0.3 | 0.2 | | | | 0.2 | 0.2 | | CP | mov r10w, 0x100
| 1 | 0.2 | 0.3 | | | | 0.2 | 0.2 | | CP | mov r11w, 0x100
| 1 | 0.2 | 0.2 | | | | 0.3 | 0.2 | | CP | mov r12w, 0x100
| 1 | 0.2 | 0.2 | | | | 0.2 | 0.3 | | CP | mov bx, 0x100
| 1 | 0.3 | 0.2 | | | | 0.2 | 0.2 | | CP | mov cx, 0x100
| 1 | 0.2 | 0.3 | | | | 0.2 | 0.2 | | CP | mov r8w, 0x100
| 1 | 0.2 | 0.2 | | | | 0.3 | 0.2 | | CP | mov r9w, 0x100
| 1 | 0.2 | 0.2 | | | | 0.2 | 0.3 | | CP | mov r10w, 0x100
| 1 | 0.3 | 0.2 | | | | 0.2 | 0.2 | | CP | mov r11w, 0x100
| 1 | 0.2 | 0.3 | | | | 0.2 | 0.2 | | CP | mov r12w, 0x100
| 1 | 0.2 | 0.2 | | | | 0.3 | 0.2 | | CP | mov bx, 0x100
| 1 | 0.2 | 0.2 | | | | 0.2 | 0.3 | | CP | mov cx, 0x100
| 1 | 0.3 | 0.2 | | | | 0.2 | 0.2 | | CP | mov r8w, 0x100
| 1 | 0.2 | 0.3 | | | | 0.2 | 0.2 | | CP | mov r9w, 0x100
| 1 | 0.2 | 0.2 | | | | 0.3 | 0.2 | | CP | mov r10w, 0x100
| 1 | 0.2 | 0.2 | | | | 0.2 | 0.3 | | CP | mov r11w, 0x100
| 1 | 0.3 | 0.2 | | | | 0.2 | 0.2 | | CP | mov r12w, 0x100
| 1 | 0.2 | 0.3 | | | | 0.2 | 0.2 | | CP | mov bx, 0x100
| 1 | 0.2 | 0.2 | | | | 0.3 | 0.2 | | CP | mov cx, 0x100
| 1 | 0.2 | 0.2 | | | | 0.2 | 0.3 | | CP | mov r8w, 0x100
| 1 | 0.3 | 0.2 | | | | 0.2 | 0.2 | | CP | mov r9w, 0x100
| 1 | 0.2 | 0.3 | | | | 0.2 | 0.2 | | CP | mov r10w, 0x100
| 1 | 0.2 | 0.2 | | | | 0.3 | 0.2 | | CP | mov r11w, 0x100
| 1 | 0.2 | 0.2 | | | | 0.2 | 0.3 | | CP | mov r12w, 0x100
| 1 | 0.3 | 0.2 | | | | 0.2 | 0.2 | | CP | mov bx, 0x100
| 1 | 0.2 | 0.3 | | | | 0.2 | 0.2 | | CP | mov cx, 0x100
| 1 | 0.2 | 0.2 | | | | 0.3 | 0.2 | | CP | mov r8w, 0x100
| 1 | 0.2 | 0.2 | | | | 0.2 | 0.3 | | CP | mov r9w, 0x100
| 1 | 0.3 | 0.2 | | | | 0.2 | 0.2 | | CP | mov r10w, 0x100
| 1 | 0.2 | 0.3 | | | | 0.2 | 0.2 | | CP | mov r11w, 0x100
| 1 | 0.2 | 0.2 | | | | 0.3 | 0.2 | | CP | mov r12w, 0x100
| 1 | 0.2 | 0.2 | | | | 0.2 | 0.3 | | CP | mov bx, 0x100
| 1 | 0.3 | 0.2 | | | | 0.2 | 0.2 | | CP | mov cx, 0x100
| 1 | 0.2 | 0.3 | | | | 0.2 | 0.2 | | CP | mov r8w, 0x100
| 1 | 0.2 | 0.2 | | | | 0.3 | 0.2 | | CP | mov r9w, 0x100
| 8^ | 2.0 | 2.0 | 0.5 0.5 | 0.5 0.5 | | 2.0 | 1.0 | | CP | div qword ptr [r14]
Total Num Of Uops: 108
⇨ One μop that can only use ports {'0', '1', '5', '6'}
With an indexed addressing mode
With blocking instructions for port '0':
Throughput Analysis Report
--------------------------
Block Throughput: 56.00 Cycles Throughput Bottleneck: Backend. Port0
Port Binding In Cycles Per Iteration:
---------------------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
---------------------------------------------------------------------------------------
| Cycles | 56.0 0.0 | 2.0 | 0.5 0.5 | 0.5 0.5 | 0.0 | 2.0 | 1.0 | 0.0 |
---------------------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 | |
---------------------------------------------------------------------------------
| 1 | 1.0 | | | | | | | | CP | movd r8d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r9d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r10d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r11d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r12d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd ebx, mmx0
| 1 | 1.0 | | | | | | | | CP | movd ecx, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r8d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r9d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r10d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r11d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r12d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd ebx, mmx0
| 1 | 1.0 | | | | | | | | CP | movd ecx, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r8d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r9d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r10d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r11d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r12d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd ebx, mmx0
| 1 | 1.0 | | | | | | | | CP | movd ecx, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r8d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r9d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r10d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r11d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r12d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd ebx, mmx0
| 1 | 1.0 | | | | | | | | CP | movd ecx, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r8d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r9d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r10d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r11d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r12d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd ebx, mmx0
| 1 | 1.0 | | | | | | | | CP | movd ecx, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r8d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r9d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r10d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r11d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r12d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd ebx, mmx0
| 1 | 1.0 | | | | | | | | CP | movd ecx, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r8d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r9d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r10d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r11d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r12d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd ebx, mmx0
| 1 | 1.0 | | | | | | | | CP | movd ecx, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r8d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r9d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r10d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r11d, mmx0
| 1 | 1.0 | | | | | | | | CP | movd r12d, mmx0
| 8^ | 2.0 | 2.0 | 0.5 0.5 | 0.5 0.5 | | 2.0 | 1.0 | | CP | div qword ptr [r14]
Total Num Of Uops: 62
⇨ 2 μops that can only use port '0'
With blocking instructions for port '1':
Throughput Analysis Report
--------------------------
Block Throughput: 56.00 Cycles Throughput Bottleneck: Backend. Port1
Port Binding In Cycles Per Iteration:
---------------------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
---------------------------------------------------------------------------------------
| Cycles | 2.0 0.0 | 56.0 | 0.5 0.5 | 0.5 0.5 | 0.0 | 2.0 | 1.0 | 0.0 |
---------------------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 | |
---------------------------------------------------------------------------------
| 1 | | 1.0 | | | | | | | CP | addpd xmm0, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm2, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm3, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm4, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm5, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm6, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm7, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm8, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm9, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm10, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm11, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm12, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm0, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm2, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm3, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm4, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm5, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm6, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm7, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm8, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm9, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm10, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm11, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm12, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm0, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm2, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm3, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm4, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm5, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm6, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm7, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm8, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm9, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm10, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm11, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm12, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm0, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm2, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm3, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm4, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm5, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm6, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm7, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm8, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm9, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm10, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm11, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm12, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm0, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm2, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm3, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm4, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm5, xmm1
| 1 | | 1.0 | | | | | | | CP | addpd xmm6, xmm1
| 8^ | 2.0 | 2.0 | 0.5 0.5 | 0.5 0.5 | | 2.0 | 1.0 | | CP | div qword ptr [r14]
Total Num Of Uops: 62
⇨ 2 μops that can only use port '1'
With blocking instructions for port '5':
Throughput Analysis Report
--------------------------
Block Throughput: 56.00 Cycles Throughput Bottleneck: Backend. Port5
Port Binding In Cycles Per Iteration:
---------------------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
---------------------------------------------------------------------------------------
| Cycles | 2.0 0.0 | 2.0 | 0.5 0.5 | 0.5 0.5 | 0.0 | 56.0 | 1.0 | 0.0 |
---------------------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 | |
---------------------------------------------------------------------------------
| 1 | | | | | | 1.0 | | | CP | aesdec xmm0, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm2, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm3, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm4, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm5, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm6, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm7, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm8, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm9, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm10, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm11, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm12, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm0, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm2, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm3, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm4, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm5, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm6, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm7, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm8, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm9, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm10, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm11, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm12, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm0, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm2, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm3, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm4, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm5, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm6, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm7, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm8, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm9, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm10, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm11, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm12, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm0, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm2, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm3, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm4, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm5, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm6, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm7, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm8, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm9, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm10, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm11, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm12, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm0, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm2, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm3, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm4, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm5, xmm1
| 1 | | | | | | 1.0 | | | CP | aesdec xmm6, xmm1
| 8^ | 2.0 | 2.0 | 0.5 0.5 | 0.5 0.5 | | 2.0 | 1.0 | | CP | div qword ptr [r14]
Total Num Of Uops: 62
⇨ 2 μops that can only use port '5'
With blocking instructions for ports {'0', '6'}:
Throughput Analysis Report
--------------------------
Block Throughput: 51.00 Cycles Throughput Bottleneck: Backend. Port0, Port6
Port Binding In Cycles Per Iteration:
---------------------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
---------------------------------------------------------------------------------------
| Cycles | 51.0 0.0 | 2.5 | 0.5 0.5 | 0.5 0.5 | 0.0 | 2.5 | 51.0 | 0.0 |
---------------------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 | |
---------------------------------------------------------------------------------
| 1 | | | | | | | 1.0 | | CP | sar r8w, 0x0
| 1 | | | | | | | 1.0 | | CP | sar r9w, 0x0
| 1 | 1.0 | | | | | | | | CP | sar r10w, 0x0
| 1 | | | | | | | 1.0 | | CP | sar r11w, 0x0
| 1 | 1.0 | | | | | | | | CP | sar r12w, 0x0
| 1 | | | | | | | 1.0 | | CP | sar bx, 0x0
| 1 | 1.0 | | | | | | | | CP | sar cx, 0x0
| 1 | | | | | | | 1.0 | | CP | sar r8w, 0x0
| 1 | 1.0 | | | | | | | | CP | sar r9w, 0x0
| 1 | | | | | | | 1.0 | | CP | sar r10w, 0x0
| 1 | 1.0 | | | | | | | | CP | sar r11w, 0x0
| 1 | | | | | | | 1.0 | | CP | sar r12w, 0x0
| 1 | 1.0 | | | | | | | | CP | sar bx, 0x0
| 1 | | | | | | | 1.0 | | CP | sar cx, 0x0
| 1 | 1.0 | | | | | | | | CP | sar r8w, 0x0
| 1 | | | | | | | 1.0 | | CP | sar r9w, 0x0
| 1 | 1.0 | | | | | | | | CP | sar r10w, 0x0
| 1 | | | | | | | 1.0 | | CP | sar r11w, 0x0
| 1 | 1.0 | | | | | | | | CP | sar r12w, 0x0
| 1 | | | | | | | 1.0 | | CP | sar bx, 0x0
| 1 | 1.0 | | | | | | | | CP | sar cx, 0x0
| 1 | | | | | | | 1.0 | | CP | sar r8w, 0x0
| 1 | 1.0 | | | | | | | | CP | sar r9w, 0x0
| 1 | | | | | | | 1.0 | | CP | sar r10w, 0x0
| 1 | 1.0 | | | | | | | | CP | sar r11w, 0x0
| 1 | | | | | | | 1.0 | | CP | sar r12w, 0x0
| 1 | 1.0 | | | | | | | | CP | sar bx, 0x0
| 1 | | | | | | | 1.0 | | CP | sar cx, 0x0
| 1 | 1.0 | | | | | | | | CP | sar r8w, 0x0
| 1 | | | | | | | 1.0 | | CP | sar r9w, 0x0
| 1 | 1.0 | | | | | | | | CP | sar r10w, 0x0
| 1 | | | | | | | 1.0 | | CP | sar r11w, 0x0
| 1 | 1.0 | | | | | | | | CP | sar r12w, 0x0
| 1 | | | | | | | 1.0 | | CP | sar bx, 0x0
| 1 | 1.0 | | | | | | | | CP | sar cx, 0x0
| 1 | | | | | | | 1.0 | | CP | sar r8w, 0x0
| 1 | 1.0 | | | | | | | | CP | sar r9w, 0x0
| 1 | | | | | | | 1.0 | | CP | sar r10w, 0x0
| 1 | 1.0 | | | | | | | | CP | sar r11w, 0x0
| 1 | | | | | | | 1.0 | | CP | sar r12w, 0x0
| 1 | 1.0 | | | | | | | | CP | sar bx, 0x0
| 1 | | | | | | | 1.0 | | CP | sar cx, 0x0
| 1 | 1.0 | | | | | | | | CP | sar r8w, 0x0
| 1 | | | | | | | 1.0 | | CP | sar r9w, 0x0
| 1 | 1.0 | | | | | | | | CP | sar r10w, 0x0
| 1 | | | | | | | 1.0 | | CP | sar r11w, 0x0
| 1 | 1.0 | | | | | | | | CP | sar r12w, 0x0
| 1 | | | | | | | 1.0 | | CP | sar bx, 0x0
| 1 | 1.0 | | | | | | | | CP | sar cx, 0x0
| 1 | | | | | | | 1.0 | | CP | sar r8w, 0x0
| 1 | 1.0 | | | | | | | | CP | sar r9w, 0x0
| 1 | | | | | | | 1.0 | | CP | sar r10w, 0x0
| 1 | 1.0 | | | | | | | | CP | sar r11w, 0x0
| 1 | | | | | | | 1.0 | | CP | sar r12w, 0x0
| 1 | 1.0 | | | | | | | | CP | sar bx, 0x0
| 1 | | | | | | | 1.0 | | CP | sar cx, 0x0
| 1 | 1.0 | | | | | | | | CP | sar r8w, 0x0
| 1 | | | | | | | 1.0 | | CP | sar r9w, 0x0
| 1 | 1.0 | | | | | | | | CP | sar r10w, 0x0
| 1 | | | | | | | 1.0 | | CP | sar r11w, 0x0
| 1 | 1.0 | | | | | | | | CP | sar r12w, 0x0
| 1 | | | | | | | 1.0 | | CP | sar bx, 0x0
| 1 | 1.0 | | | | | | | | CP | sar cx, 0x0
| 1 | | | | | | | 1.0 | | CP | sar r8w, 0x0
| 1 | 1.0 | | | | | | | | CP | sar r9w, 0x0
| 1 | | | | | | | 1.0 | | CP | sar r10w, 0x0
| 1 | 1.0 | | | | | | | | CP | sar r11w, 0x0
| 1 | | | | | | | 1.0 | | CP | sar r12w, 0x0
| 1 | 1.0 | | | | | | | | CP | sar bx, 0x0
| 1 | | | | | | | 1.0 | | CP | sar cx, 0x0
| 1 | 1.0 | | | | | | | | CP | sar r8w, 0x0
| 1 | | | | | | | 1.0 | | CP | sar r9w, 0x0
| 1 | 1.0 | | | | | | | | CP | sar r10w, 0x0
| 1 | | | | | | | 1.0 | | CP | sar r11w, 0x0
| 1 | 1.0 | | | | | | | | CP | sar r12w, 0x0
| 1 | | | | | | | 1.0 | | CP | sar bx, 0x0
| 1 | 1.0 | | | | | | | | CP | sar cx, 0x0
| 1 | | | | | | | 1.0 | | CP | sar r8w, 0x0
| 1 | 1.0 | | | | | | | | CP | sar r9w, 0x0
| 1 | | | | | | | 1.0 | | CP | sar r10w, 0x0
| 1 | 1.0 | | | | | | | | CP | sar r11w, 0x0
| 1 | | | | | | | 1.0 | | CP | sar r12w, 0x0
| 1 | 1.0 | | | | | | | | CP | sar bx, 0x0
| 1 | | | | | | | 1.0 | | CP | sar cx, 0x0
| 1 | 1.0 | | | | | | | | CP | sar r8w, 0x0
| 1 | | | | | | | 1.0 | | CP | sar r9w, 0x0
| 1 | 1.0 | | | | | | | | CP | sar r10w, 0x0
| 1 | | | | | | | 1.0 | | CP | sar r11w, 0x0
| 1 | 1.0 | | | | | | | | CP | sar r12w, 0x0
| 1 | | | | | | | 1.0 | | CP | sar bx, 0x0
| 1 | 1.0 | | | | | | | | CP | sar cx, 0x0
| 1 | | | | | | | 1.0 | | CP | sar r8w, 0x0
| 1 | 1.0 | | | | | | | | CP | sar r9w, 0x0
| 1 | | | | | | | 1.0 | | CP | sar r10w, 0x0
| 1 | 1.0 | | | | | | | | CP | sar r11w, 0x0
| 1 | | | | | | | 1.0 | | CP | sar r12w, 0x0
| 1 | 1.0 | | | | | | | | CP | sar bx, 0x0
| 1 | | | | | | | 1.0 | | CP | sar cx, 0x0
| 1 | 1.0 | | | | | | | | CP | sar r8w, 0x0
| 1 | | | | | | | 1.0 | | CP | sar r9w, 0x0
| 8^ | 2.0 | 2.5 | 0.5 0.5 | 0.5 0.5 | | 2.5 | | | CP | div qword ptr [r14]
Total Num Of Uops: 108
With blocking instructions for ports {'2', '3'}:
Throughput Analysis Report
--------------------------
Block Throughput: 50.50 Cycles Throughput Bottleneck: Backend. PORT2_AGU, Port2_DATA, PORT3_AGU, Port3_DATA
Port Binding In Cycles Per Iteration:
---------------------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
---------------------------------------------------------------------------------------
| Cycles | 2.0 0.0 | 2.0 | 50.5 50.5 | 50.5 50.5 | 0.0 | 2.0 | 1.0 | 0.0 |
---------------------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 | |
---------------------------------------------------------------------------------
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm0, xmmword ptr [r14+0x40]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm1, xmmword ptr [r14+0x50]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm2, xmmword ptr [r14+0x60]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm3, xmmword ptr [r14+0x70]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm4, xmmword ptr [r14+0x80]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm5, xmmword ptr [r14+0x90]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm6, xmmword ptr [r14+0xa0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm7, xmmword ptr [r14+0xb0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm8, xmmword ptr [r14+0xc0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm9, xmmword ptr [r14+0xd0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm10, xmmword ptr [r14+0xe0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm11, xmmword ptr [r14+0xf0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm12, xmmword ptr [r14+0x100]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm0, xmmword ptr [r14+0x40]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm1, xmmword ptr [r14+0x50]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm2, xmmword ptr [r14+0x60]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm3, xmmword ptr [r14+0x70]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm4, xmmword ptr [r14+0x80]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm5, xmmword ptr [r14+0x90]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm6, xmmword ptr [r14+0xa0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm7, xmmword ptr [r14+0xb0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm8, xmmword ptr [r14+0xc0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm9, xmmword ptr [r14+0xd0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm10, xmmword ptr [r14+0xe0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm11, xmmword ptr [r14+0xf0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm12, xmmword ptr [r14+0x100]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm0, xmmword ptr [r14+0x40]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm1, xmmword ptr [r14+0x50]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm2, xmmword ptr [r14+0x60]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm3, xmmword ptr [r14+0x70]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm4, xmmword ptr [r14+0x80]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm5, xmmword ptr [r14+0x90]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm6, xmmword ptr [r14+0xa0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm7, xmmword ptr [r14+0xb0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm8, xmmword ptr [r14+0xc0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm9, xmmword ptr [r14+0xd0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm10, xmmword ptr [r14+0xe0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm11, xmmword ptr [r14+0xf0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm12, xmmword ptr [r14+0x100]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm0, xmmword ptr [r14+0x40]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm1, xmmword ptr [r14+0x50]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm2, xmmword ptr [r14+0x60]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm3, xmmword ptr [r14+0x70]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm4, xmmword ptr [r14+0x80]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm5, xmmword ptr [r14+0x90]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm6, xmmword ptr [r14+0xa0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm7, xmmword ptr [r14+0xb0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm8, xmmword ptr [r14+0xc0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm9, xmmword ptr [r14+0xd0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm10, xmmword ptr [r14+0xe0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm11, xmmword ptr [r14+0xf0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm12, xmmword ptr [r14+0x100]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm0, xmmword ptr [r14+0x40]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm1, xmmword ptr [r14+0x50]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm2, xmmword ptr [r14+0x60]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm3, xmmword ptr [r14+0x70]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm4, xmmword ptr [r14+0x80]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm5, xmmword ptr [r14+0x90]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm6, xmmword ptr [r14+0xa0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm7, xmmword ptr [r14+0xb0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm8, xmmword ptr [r14+0xc0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm9, xmmword ptr [r14+0xd0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm10, xmmword ptr [r14+0xe0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm11, xmmword ptr [r14+0xf0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm12, xmmword ptr [r14+0x100]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm0, xmmword ptr [r14+0x40]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm1, xmmword ptr [r14+0x50]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm2, xmmword ptr [r14+0x60]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm3, xmmword ptr [r14+0x70]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm4, xmmword ptr [r14+0x80]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm5, xmmword ptr [r14+0x90]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm6, xmmword ptr [r14+0xa0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm7, xmmword ptr [r14+0xb0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm8, xmmword ptr [r14+0xc0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm9, xmmword ptr [r14+0xd0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm10, xmmword ptr [r14+0xe0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm11, xmmword ptr [r14+0xf0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm12, xmmword ptr [r14+0x100]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm0, xmmword ptr [r14+0x40]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm1, xmmword ptr [r14+0x50]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm2, xmmword ptr [r14+0x60]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm3, xmmword ptr [r14+0x70]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm4, xmmword ptr [r14+0x80]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm5, xmmword ptr [r14+0x90]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm6, xmmword ptr [r14+0xa0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm7, xmmword ptr [r14+0xb0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm8, xmmword ptr [r14+0xc0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm9, xmmword ptr [r14+0xd0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm10, xmmword ptr [r14+0xe0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm11, xmmword ptr [r14+0xf0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm12, xmmword ptr [r14+0x100]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm0, xmmword ptr [r14+0x40]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm1, xmmword ptr [r14+0x50]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm2, xmmword ptr [r14+0x60]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm3, xmmword ptr [r14+0x70]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm4, xmmword ptr [r14+0x80]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm5, xmmword ptr [r14+0x90]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm6, xmmword ptr [r14+0xa0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm7, xmmword ptr [r14+0xb0]
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | CP | lddqu xmm8, xmmword ptr [r14+0xc0]
| 8^ | 2.0 | 2.0 | 0.5 0.5 | 0.5 0.5 | | 2.0 | 1.0 | | CP | div qword ptr [r14]
Total Num Of Uops: 108
⇨ One μop that can only use ports {'2', '3'}
With blocking instructions for ports {'0', '1', '5', '6'}:
Throughput Analysis Report
--------------------------
Block Throughput: 27.76 Cycles Throughput Bottleneck: FrontEnd
Port Binding In Cycles Per Iteration:
---------------------------------------------------------------------------------------
| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
---------------------------------------------------------------------------------------
| Cycles | 26.8 0.0 | 26.8 | 0.5 0.5 | 0.5 0.5 | 0.0 | 26.8 | 26.8 | 0.0 |
---------------------------------------------------------------------------------------
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 | |
---------------------------------------------------------------------------------
| 1 | | | | | | 0.1 | 0.9 | | CP | mov r8w, 0x100
| 1 | 0.2 | 0.2 | | | | 0.2 | 0.4 | | CP | mov r9w, 0x100
| 1 | 0.3 | 0.2 | | | | 0.2 | 0.2 | | CP | mov r10w, 0x100
| 1 | 0.2 | 0.3 | | | | 0.3 | 0.2 | | CP | mov r11w, 0x100
| 1 | 0.2 | 0.2 | | | | 0.2 | 0.3 | | CP | mov r12w, 0x100
| 1 | 0.3 | 0.2 | | | | 0.2 | 0.2 | | CP | mov bx, 0x100
| 1 | 0.2 | 0.3 | | | | 0.2 | 0.2 | | CP | mov cx, 0x100
| 1 | 0.2 | 0.2 | | | | 0.3 | 0.2 | | CP | mov r8w, 0x100
| 1 | 0.2 | 0.2 | | | | 0.2 | 0.3 | | CP | mov r9w, 0x100
| 1 | 0.3 | 0.2 | | | | 0.2 | 0.2 | | CP | mov r10w, 0x100
| 1 | 0.2 | 0.3 | | | | 0.2 | 0.2 | | CP | mov r11w, 0x100
| 1 | 0.2 | 0.2 | | | | 0.3 | 0.2 | | CP | mov r12w, 0x100
| 1 | 0.2 | 0.2 | | | | 0.2 | 0.3 | | CP | mov bx, 0x100
| 1 | 0.3 | 0.2 | | | | 0.2 | 0.2 | | CP | mov cx, 0x100
| 1 | 0.2 | 0.3 | | | | 0.2 | 0.2 | | CP | mov r8w, 0x100
| 1 | 0.2 | 0.2 | | | | 0.3 | 0.2 | | CP | mov r9w, 0x100
| 1 | 0.2 | 0.2 | | | | 0.2 | 0.3 | | CP | mov r10w, 0x100
| 1 | 0.3 | 0.2 | | | | 0.2 | 0.2 | | CP | mov r11w, 0x100
| 1 | 0.2 | 0.3 | | | | 0.2 | 0.2 | | CP | mov r12w, 0x100
| 1 | 0.2 | 0.2 | | | | 0.3 | 0.2 | | CP | mov bx, 0x100
| 1 | 0.2 | 0.2 | | | | 0.2 | 0.3 | | CP | mov cx, 0x100
| 1 | 0.3 | 0.2 | | | | 0.2 | 0.2 | | CP | mov r8w, 0x100
| 1 | 0.2 | 0.3 | | | | 0.2 | 0.2 | | CP | mov r9w, 0x100
| 1 | 0.2 | 0.2 | | | | 0.3 | 0.2 | | CP | mov r10w, 0x100
| 1 | 0.2 | 0.2 | | | | 0.2 | 0.3 | | CP | mov r11w, 0x100
| 1 | 0.3 | 0.2 | | | | 0.2 | 0.2 | | CP | mov r12w, 0x100
| 1 | 0.2 | 0.3 | | | | 0.2 | 0.2 | | CP | mov bx, 0x100
| 1 | 0.2 | 0.2 | | | | 0.3 | 0.2 | | CP | mov cx, 0x100
| 1 | 0.2 | 0.2 | | | | 0.2 | 0.3 | | CP | mov r8w, 0x100
| 1 | 0.3 | 0.2 | | | | 0.2 | 0.2 | | CP | mov r9w, 0x100
| 1 | 0.2 | 0.3 | | | | 0.2 | 0.2 | | CP | mov r10w, 0x100
| 1 | 0.2 | 0.2 | | | | 0.3 | 0.2 | | CP | mov r11w, 0x100
| 1 | 0.2 | 0.2 | | | | 0.2 | 0.3 | | CP | mov r12w, 0x100
| 1 | 0.3 | 0.2 | | | | 0.2 | 0.2 | | CP | mov bx, 0x100
| 1 | 0.2 | 0.3 | | | | 0.2 | 0.2 | | CP | mov cx, 0x100
| 1 | 0.2 | 0.2 | | | | 0.3 | 0.2 | | CP | mov r8w, 0x100
| 1 | 0.2 | 0.2 | | | | 0.2 | 0.3 | | CP | mov r9w, 0x100
| 1 | 0.3 | 0.2 | | | | 0.2 | 0.2 | | CP | mov r10w, 0x100
| 1 | 0.2 | 0.3 | | | | 0.2 | 0.2 | | CP | mov r11w, 0x100
| 1 | 0.2 | 0.2 | | | | 0.3 | 0.2 | | CP | mov r12w, 0x100
| 1 | 0.2 | 0.2 | | | | 0.2 | 0.3 | | CP | mov bx, 0x100
| 1 | 0.3 | 0.2 | | | | 0.2 | 0.2 | | CP | mov cx, 0x100
| 1 | 0.2 | 0.3 | | | | 0.2 | 0.2 | | CP | mov r8w, 0x100
| 1 | 0.2 | 0.2 | | | | 0.3 | 0.2 | | CP | mov r9w, 0x100
| 1 | 0.2 | 0.2 | | | | 0.2 | 0.3 | | CP | mov r10w, 0x100
| 1 | 0.3 | 0.2 | | | | 0.2 | 0.2 | | CP | mov r11w, 0x100
| 1 | 0.2 | 0.3 | | | | 0.2 | 0.2 | | CP | mov r12w, 0x100
| 1 | 0.2 | 0.2 | | | | 0.3 | 0.2 | | CP | mov bx, 0x100
| 1 | 0.2 | 0.2 | | | | 0.2 | 0.3 | | CP | mov cx, 0x100
| 1 | 0.3 | 0.2 | | | | 0.2 | 0.2 | | CP | mov r8w, 0x100
| 1 | 0.2 | 0.3 | | | | 0.2 | 0.2 | | CP | mov r9w, 0x100
| 1 | 0.2 | 0.2 | | | | 0.3 | 0.2 | | CP | mov r10w, 0x100
| 1 | 0.2 | 0.2 | | | | 0.2 | 0.3 | | CP | mov r11w, 0x100
| 1 | 0.3 | 0.2 | | | | 0.2 | 0.2 | | CP | mov r12w, 0x100
| 1 | 0.2 | 0.3 | | | | 0.2 | 0.2 | | CP | mov bx, 0x100
| 1 | 0.2 | 0.2 | | | | 0.3 | 0.2 | | CP | mov cx, 0x100
| 1 | 0.2 | 0.2 | | | | 0.2 | 0.3 | | CP | mov r8w, 0x100
| 1 | 0.3 | 0.2 | | | | 0.2 | 0.2 | | CP | mov r9w, 0x100
| 1 | 0.2 | 0.3 | | | | 0.2 | 0.2 | | CP | mov r10w, 0x100
| 1 | 0.2 | 0.2 | | | | 0.3 | 0.2 | | CP | mov r11w, 0x100
| 1 | 0.2 | 0.2 | | | | 0.2 | 0.3 | | CP | mov r12w, 0x100
| 1 | 0.3 | 0.2 | | | | 0.2 | 0.2 | | CP | mov bx, 0x100
| 1 | 0.2 | 0.3 | | | | 0.2 | 0.2 | | CP | mov cx, 0x100
| 1 | 0.2 | 0.2 | | | | 0.3 | 0.2 | | CP | mov r8w, 0x100
| 1 | 0.2 | 0.2 | | | | 0.2 | 0.3 | | CP | mov r9w, 0x100
| 1 | 0.3 | 0.2 | | | | 0.2 | 0.2 | | CP | mov r10w, 0x100
| 1 | 0.2 | 0.3 | | | | 0.2 | 0.2 | | CP | mov r11w, 0x100
| 1 | 0.2 | 0.2 | | | | 0.3 | 0.2 | | CP | mov r12w, 0x100
| 1 | 0.2 | 0.2 | | | | 0.2 | 0.3 | | CP | mov bx, 0x100
| 1 | 0.3 | 0.2 | | | | 0.2 | 0.2 | | CP | mov cx, 0x100
| 1 | 0.2 | 0.3 | | | | 0.2 | 0.2 | | CP | mov r8w, 0x100
| 1 | 0.2 | 0.2 | | | | 0.3 | 0.2 | | CP | mov r9w, 0x100
| 1 | 0.2 | 0.2 | | | | 0.2 | 0.3 | | CP | mov r10w, 0x100
| 1 | 0.3 | 0.2 | | | | 0.2 | 0.2 | | CP | mov r11w, 0x100
| 1 | 0.2 | 0.3 | | | | 0.2 | 0.2 | | CP | mov r12w, 0x100
| 1 | 0.2 | 0.2 | | | | 0.3 | 0.2 | | CP | mov bx, 0x100
| 1 | 0.2 | 0.2 | | | | 0.2 | 0.3 | | CP | mov cx, 0x100
| 1 | 0.3 | 0.2 | | | | 0.2 | 0.2 | | CP | mov r8w, 0x100
| 1 | 0.2 | 0.3 | | | | 0.2 | 0.2 | | CP | mov r9w, 0x100
| 1 | 0.2 | 0.2 | | | | 0.3 | 0.2 | | CP | mov r10w, 0x100
| 1 | 0.2 | 0.2 | | | | 0.2 | 0.3 | | CP | mov r11w, 0x100
| 1 | 0.3 | 0.2 | | | | 0.2 | 0.2 | | CP | mov r12w, 0x100
| 1 | 0.2 | 0.3 | | | | 0.2 | 0.2 | | CP | mov bx, 0x100
| 1 | 0.2 | 0.2 | | | | 0.3 | 0.2 | | CP | mov cx, 0x100
| 1 | 0.2 | 0.2 | | | | 0.2 | 0.3 | | CP | mov r8w, 0x100
| 1 | 0.3 | 0.2 | | | | 0.2 | 0.2 | | CP | mov r9w, 0x100
| 1 | 0.2 | 0.3 | | | | 0.2 | 0.2 | | CP | mov r10w, 0x100
| 1 | 0.2 | 0.2 | | | | 0.3 | 0.2 | | CP | mov r11w, 0x100
| 1 | 0.2 | 0.2 | | | | 0.2 | 0.3 | | CP | mov r12w, 0x100
| 1 | 0.3 | 0.2 | | | | 0.2 | 0.2 | | CP | mov bx, 0x100
| 1 | 0.2 | 0.3 | | | | 0.2 | 0.2 | | CP | mov cx, 0x100
| 1 | 0.2 | 0.2 | | | | 0.3 | 0.2 | | CP | mov r8w, 0x100
| 1 | 0.2 | 0.2 | | | | 0.2 | 0.3 | | CP | mov r9w, 0x100
| 1 | 0.3 | 0.2 | | | | 0.2 | 0.2 | | CP | mov r10w, 0x100
| 1 | 0.2 | 0.3 | | | | 0.2 | 0.2 | | CP | mov r11w, 0x100
| 1 | 0.2 | 0.2 | | | | 0.3 | 0.2 | | CP | mov r12w, 0x100
| 1 | 0.2 | 0.2 | | | | 0.2 | 0.3 | | CP | mov bx, 0x100
| 1 | 0.3 | 0.2 | | | | 0.2 | 0.2 | | CP | mov cx, 0x100
| 1 | 0.2 | 0.3 | | | | 0.2 | 0.2 | | CP | mov r8w, 0x100
| 1 | 0.2 | 0.2 | | | | 0.3 | 0.2 | | CP | mov r9w, 0x100
| 8^ | 2.0 | 2.0 | 0.5 0.5 | 0.5 0.5 | | 2.0 | 1.0 | | CP | div qword ptr [r14]
Total Num Of Uops: 108
⇨ One μop that can only use ports {'0', '1', '5', '6'}