IMUL (R32, R32) - Port Usage

With lfence (to avoid incorrect counts due to replays)

Code:

   0:	45 0f af c1          	imul   r8d,r9d
   4:	90                   	nop
   5:	90                   	nop
   6:	90                   	nop
   7:	90                   	nop
   8:	90                   	nop
   9:	90                   	nop
   a:	90                   	nop
   b:	90                   	nop
   c:	90                   	nop
   d:	90                   	nop
   e:	0f ae e8             	lfence

Show nanoBench command
Results:
- Instructions retired: 12.0
- Core cycles: 19.0
- Reference cycles: 13.47
- UOPS_DISPATCHED.INT_EU_ALL: 2.0
- UOPS_DISPATCHED.ALU: 1.0
- UOPS_DISPATCHED.LD: 0.0
- UOPS_DISPATCHED.SLOW: 0.0
- UOPS_DISPATCHED.STD: 0.0
- UOPS_DISPATCHED.SHIFT: 0.0
- UOPS_DISPATCHED.JMP: 0.0
- UOPS_DISPATCHED.STA: 0.0

No uops

With the same register for different operands

With lfence (to avoid incorrect counts due to replays)

Code:

   0:	45 0f af c0          	imul   r8d,r8d
   4:	90                   	nop
   5:	90                   	nop
   6:	90                   	nop
   7:	90                   	nop
   8:	90                   	nop
   9:	90                   	nop
   a:	90                   	nop
   b:	90                   	nop
   c:	90                   	nop
   d:	90                   	nop
   e:	0f ae e8             	lfence

Show nanoBench command
Results:
- Instructions retired: 12.0
- Core cycles: 18.01
- Reference cycles: 13.47
- UOPS_DISPATCHED.INT_EU_ALL: 2.0
- UOPS_DISPATCHED.ALU: 1.0
- UOPS_DISPATCHED.LD: 0.0
- UOPS_DISPATCHED.SLOW: 0.0
- UOPS_DISPATCHED.STD: 0.0
- UOPS_DISPATCHED.SHIFT: 0.0
- UOPS_DISPATCHED.JMP: 0.0
- UOPS_DISPATCHED.STA: 0.0

No uops