VPMULLQ (YMM, YMM, YMM) - Port Usage

With blocking instructions for port '0':

Code:

   0:	41 0f 7e c0          	movd   r8d,mm0
   4:	41 0f 7e c1          	movd   r9d,mm0
   8:	41 0f 7e c2          	movd   r10d,mm0
   c:	41 0f 7e c3          	movd   r11d,mm0
  10:	41 0f 7e c4          	movd   r12d,mm0
  14:	0f 7e c3             	movd   ebx,mm0
  17:	0f 7e c1             	movd   ecx,mm0
  1a:	0f 7e c2             	movd   edx,mm0
  1d:	41 0f 7e c0          	movd   r8d,mm0
  21:	41 0f 7e c1          	movd   r9d,mm0
  25:	41 0f 7e c2          	movd   r10d,mm0
  29:	41 0f 7e c3          	movd   r11d,mm0
  2d:	41 0f 7e c4          	movd   r12d,mm0
  31:	0f 7e c3             	movd   ebx,mm0
  34:	0f 7e c1             	movd   ecx,mm0
  37:	0f 7e c2             	movd   edx,mm0
  3a:	41 0f 7e c0          	movd   r8d,mm0
  3e:	41 0f 7e c1          	movd   r9d,mm0
  42:	41 0f 7e c2          	movd   r10d,mm0
  46:	41 0f 7e c3          	movd   r11d,mm0
  4a:	41 0f 7e c4          	movd   r12d,mm0
  4e:	0f 7e c3             	movd   ebx,mm0
  51:	0f 7e c1             	movd   ecx,mm0
  54:	0f 7e c2             	movd   edx,mm0
  57:	41 0f 7e c0          	movd   r8d,mm0
  5b:	41 0f 7e c1          	movd   r9d,mm0
  5f:	41 0f 7e c2          	movd   r10d,mm0
  63:	41 0f 7e c3          	movd   r11d,mm0
  67:	41 0f 7e c4          	movd   r12d,mm0
  6b:	0f 7e c3             	movd   ebx,mm0
  6e:	62 f2 f5 28 40 c2    	vpmullq ymm0,ymm1,ymm2

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
PXOR MM0, MM0;
VZEROALL;
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM2, YMM2, YMM2

Show nanoBench command
Results:
- Instructions retired: 31.0
- Core cycles: 30.07
- Reference cycles: 22.3
- UOPS_PORT_0: 30.0

With blocking instructions for port '1':

Code:

   0:	44 8d 05 80 00 00 00 	lea    r8d,[rip+0x80]        # 0x87
   7:	44 8d 0d 80 00 00 00 	lea    r9d,[rip+0x80]        # 0x8e
   e:	44 8d 15 80 00 00 00 	lea    r10d,[rip+0x80]        # 0x95
  15:	44 8d 1d 80 00 00 00 	lea    r11d,[rip+0x80]        # 0x9c
  1c:	44 8d 25 80 00 00 00 	lea    r12d,[rip+0x80]        # 0xa3
  23:	8d 1d 80 00 00 00    	lea    ebx,[rip+0x80]        # 0xa9
  29:	8d 0d 80 00 00 00    	lea    ecx,[rip+0x80]        # 0xaf
  2f:	8d 15 80 00 00 00    	lea    edx,[rip+0x80]        # 0xb5
  35:	44 8d 05 80 00 00 00 	lea    r8d,[rip+0x80]        # 0xbc
  3c:	44 8d 0d 80 00 00 00 	lea    r9d,[rip+0x80]        # 0xc3
  43:	44 8d 15 80 00 00 00 	lea    r10d,[rip+0x80]        # 0xca
  4a:	44 8d 1d 80 00 00 00 	lea    r11d,[rip+0x80]        # 0xd1
  51:	44 8d 25 80 00 00 00 	lea    r12d,[rip+0x80]        # 0xd8
  58:	8d 1d 80 00 00 00    	lea    ebx,[rip+0x80]        # 0xde
  5e:	8d 0d 80 00 00 00    	lea    ecx,[rip+0x80]        # 0xe4
  64:	8d 15 80 00 00 00    	lea    edx,[rip+0x80]        # 0xea
  6a:	44 8d 05 80 00 00 00 	lea    r8d,[rip+0x80]        # 0xf1
  71:	44 8d 0d 80 00 00 00 	lea    r9d,[rip+0x80]        # 0xf8
  78:	44 8d 15 80 00 00 00 	lea    r10d,[rip+0x80]        # 0xff
  7f:	44 8d 1d 80 00 00 00 	lea    r11d,[rip+0x80]        # 0x106
  86:	44 8d 25 80 00 00 00 	lea    r12d,[rip+0x80]        # 0x10d
  8d:	8d 1d 80 00 00 00    	lea    ebx,[rip+0x80]        # 0x113
  93:	8d 0d 80 00 00 00    	lea    ecx,[rip+0x80]        # 0x119
  99:	8d 15 80 00 00 00    	lea    edx,[rip+0x80]        # 0x11f
  9f:	44 8d 05 80 00 00 00 	lea    r8d,[rip+0x80]        # 0x126
  a6:	44 8d 0d 80 00 00 00 	lea    r9d,[rip+0x80]        # 0x12d
  ad:	44 8d 15 80 00 00 00 	lea    r10d,[rip+0x80]        # 0x134
  b4:	44 8d 1d 80 00 00 00 	lea    r11d,[rip+0x80]        # 0x13b
  bb:	44 8d 25 80 00 00 00 	lea    r12d,[rip+0x80]        # 0x142
  c2:	8d 1d 80 00 00 00    	lea    ebx,[rip+0x80]        # 0x148
  c8:	62 f2 f5 28 40 c2    	vpmullq ymm0,ymm1,ymm2

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM2, YMM2, YMM2

Show nanoBench command
Results:
- Instructions retired: 31.0
- Core cycles: 30.02
- Reference cycles: 22.3
- UOPS_PORT_1: 30.0

With blocking instructions for ports {'0', '1'}:

Code:

   0:	c4 e2 59 de dd       	vaesdec xmm3,xmm4,xmm5
   5:	c4 e2 59 de f5       	vaesdec xmm6,xmm4,xmm5
   a:	c4 e2 59 de fd       	vaesdec xmm7,xmm4,xmm5
   f:	c4 62 59 de c5       	vaesdec xmm8,xmm4,xmm5
  14:	c4 62 59 de cd       	vaesdec xmm9,xmm4,xmm5
  19:	c4 62 59 de d5       	vaesdec xmm10,xmm4,xmm5
  1e:	c4 62 59 de dd       	vaesdec xmm11,xmm4,xmm5
  23:	c4 62 59 de e5       	vaesdec xmm12,xmm4,xmm5
  28:	c4 e2 59 de dd       	vaesdec xmm3,xmm4,xmm5
  2d:	c4 e2 59 de f5       	vaesdec xmm6,xmm4,xmm5
  32:	c4 e2 59 de fd       	vaesdec xmm7,xmm4,xmm5
  37:	c4 62 59 de c5       	vaesdec xmm8,xmm4,xmm5
  3c:	c4 62 59 de cd       	vaesdec xmm9,xmm4,xmm5
  41:	c4 62 59 de d5       	vaesdec xmm10,xmm4,xmm5
  46:	c4 62 59 de dd       	vaesdec xmm11,xmm4,xmm5
  4b:	c4 62 59 de e5       	vaesdec xmm12,xmm4,xmm5
  50:	c4 e2 59 de dd       	vaesdec xmm3,xmm4,xmm5
  55:	c4 e2 59 de f5       	vaesdec xmm6,xmm4,xmm5
  5a:	c4 e2 59 de fd       	vaesdec xmm7,xmm4,xmm5
  5f:	c4 62 59 de c5       	vaesdec xmm8,xmm4,xmm5
  64:	c4 62 59 de cd       	vaesdec xmm9,xmm4,xmm5
  69:	c4 62 59 de d5       	vaesdec xmm10,xmm4,xmm5
  6e:	c4 62 59 de dd       	vaesdec xmm11,xmm4,xmm5
  73:	c4 62 59 de e5       	vaesdec xmm12,xmm4,xmm5
  78:	c4 e2 59 de dd       	vaesdec xmm3,xmm4,xmm5
  7d:	c4 e2 59 de f5       	vaesdec xmm6,xmm4,xmm5
  82:	c4 e2 59 de fd       	vaesdec xmm7,xmm4,xmm5
  87:	c4 62 59 de c5       	vaesdec xmm8,xmm4,xmm5
  8c:	c4 62 59 de cd       	vaesdec xmm9,xmm4,xmm5
  91:	c4 62 59 de d5       	vaesdec xmm10,xmm4,xmm5
  96:	c4 62 59 de dd       	vaesdec xmm11,xmm4,xmm5
  9b:	c4 62 59 de e5       	vaesdec xmm12,xmm4,xmm5
  a0:	c4 e2 59 de dd       	vaesdec xmm3,xmm4,xmm5
  a5:	c4 e2 59 de f5       	vaesdec xmm6,xmm4,xmm5
  aa:	c4 e2 59 de fd       	vaesdec xmm7,xmm4,xmm5
  af:	c4 62 59 de c5       	vaesdec xmm8,xmm4,xmm5
  b4:	c4 62 59 de cd       	vaesdec xmm9,xmm4,xmm5
  b9:	c4 62 59 de d5       	vaesdec xmm10,xmm4,xmm5
  be:	c4 62 59 de dd       	vaesdec xmm11,xmm4,xmm5
  c3:	c4 62 59 de e5       	vaesdec xmm12,xmm4,xmm5
  c8:	c4 e2 59 de dd       	vaesdec xmm3,xmm4,xmm5
  cd:	c4 e2 59 de f5       	vaesdec xmm6,xmm4,xmm5
  d2:	c4 e2 59 de fd       	vaesdec xmm7,xmm4,xmm5
  d7:	c4 62 59 de c5       	vaesdec xmm8,xmm4,xmm5
  dc:	c4 62 59 de cd       	vaesdec xmm9,xmm4,xmm5
  e1:	c4 62 59 de d5       	vaesdec xmm10,xmm4,xmm5
  e6:	c4 62 59 de dd       	vaesdec xmm11,xmm4,xmm5
  eb:	c4 62 59 de e5       	vaesdec xmm12,xmm4,xmm5
  f0:	c4 e2 59 de dd       	vaesdec xmm3,xmm4,xmm5
  f5:	c4 e2 59 de f5       	vaesdec xmm6,xmm4,xmm5
  fa:	c4 e2 59 de fd       	vaesdec xmm7,xmm4,xmm5
  ff:	c4 62 59 de c5       	vaesdec xmm8,xmm4,xmm5
 104:	c4 62 59 de cd       	vaesdec xmm9,xmm4,xmm5
 109:	c4 62 59 de d5       	vaesdec xmm10,xmm4,xmm5
 10e:	c4 62 59 de dd       	vaesdec xmm11,xmm4,xmm5
 113:	c4 62 59 de e5       	vaesdec xmm12,xmm4,xmm5
 118:	c4 e2 59 de dd       	vaesdec xmm3,xmm4,xmm5
 11d:	c4 e2 59 de f5       	vaesdec xmm6,xmm4,xmm5
 122:	c4 e2 59 de fd       	vaesdec xmm7,xmm4,xmm5
 127:	c4 62 59 de c5       	vaesdec xmm8,xmm4,xmm5
 12c:	62 f2 f5 28 40 c2    	vpmullq ymm0,ymm1,ymm2

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS XMM4, XMM4, XMM4;
VXORPS XMM5, XMM5, XMM5;
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM2, YMM2, YMM2

Show nanoBench command
Results:
- Instructions retired: 61.0
- Core cycles: 32.24
- Reference cycles: 23.0
- UOPS_PORT_0: 31.5
- UOPS_PORT_1: 31.5

⇨ 3 μops that can only use ports {'0', '1'}