VPINSRQ (XMM, XMM, R64, I8) - Port Usage

With blocking instructions for port '1':

Code:

   0:	44 8d 0d 80 00 00 00 	lea    r9d,[rip+0x80]        # 0x87
   7:	44 8d 15 80 00 00 00 	lea    r10d,[rip+0x80]        # 0x8e
   e:	44 8d 1d 80 00 00 00 	lea    r11d,[rip+0x80]        # 0x95
  15:	44 8d 25 80 00 00 00 	lea    r12d,[rip+0x80]        # 0x9c
  1c:	8d 1d 80 00 00 00    	lea    ebx,[rip+0x80]        # 0xa2
  22:	8d 0d 80 00 00 00    	lea    ecx,[rip+0x80]        # 0xa8
  28:	8d 15 80 00 00 00    	lea    edx,[rip+0x80]        # 0xae
  2e:	44 8d 0d 80 00 00 00 	lea    r9d,[rip+0x80]        # 0xb5
  35:	44 8d 15 80 00 00 00 	lea    r10d,[rip+0x80]        # 0xbc
  3c:	44 8d 1d 80 00 00 00 	lea    r11d,[rip+0x80]        # 0xc3
  43:	c4 c3 f1 22 c0 02    	vpinsrq xmm0,xmm1,r8,0x2

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS XMM1, XMM1, XMM1

Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 9.98
- Reference cycles: 7.52
- UOPS_PORT_1: 10.0

With blocking instructions for port '5':

Code:

   0:	41 0f 6e c1          	movd   mm0,r9d
   4:	41 0f 6e c9          	movd   mm1,r9d
   8:	41 0f 6e d1          	movd   mm2,r9d
   c:	41 0f 6e d9          	movd   mm3,r9d
  10:	41 0f 6e e1          	movd   mm4,r9d
  14:	41 0f 6e e9          	movd   mm5,r9d
  18:	41 0f 6e f1          	movd   mm6,r9d
  1c:	41 0f 6e f9          	movd   mm7,r9d
  20:	41 0f 6e c1          	movd   mm0,r9d
  24:	41 0f 6e c9          	movd   mm1,r9d
  28:	c4 c3 f1 22 c0 02    	vpinsrq xmm0,xmm1,r8,0x2

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS XMM1, XMM1, XMM1

Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 11.07
- Reference cycles: 8.16
- UOPS_PORT_5B: 11.01
- UOPS_PORT_5B>=2: 0.0

⇨ One μop that can only use port '5'

With blocking instructions for ports {'0', '1'}:

Code:

   0:	c4 e2 61 de d4       	vaesdec xmm2,xmm3,xmm4
   5:	c4 e2 61 de ec       	vaesdec xmm5,xmm3,xmm4
   a:	c4 e2 61 de f4       	vaesdec xmm6,xmm3,xmm4
   f:	c4 e2 61 de fc       	vaesdec xmm7,xmm3,xmm4
  14:	c4 62 61 de c4       	vaesdec xmm8,xmm3,xmm4
  19:	c4 62 61 de cc       	vaesdec xmm9,xmm3,xmm4
  1e:	c4 62 61 de d4       	vaesdec xmm10,xmm3,xmm4
  23:	c4 62 61 de dc       	vaesdec xmm11,xmm3,xmm4
  28:	c4 62 61 de e4       	vaesdec xmm12,xmm3,xmm4
  2d:	c4 e2 61 de d4       	vaesdec xmm2,xmm3,xmm4
  32:	c4 c3 f1 22 c0 02    	vpinsrq xmm0,xmm1,r8,0x2

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS XMM3, XMM3, XMM3;
VXORPS XMM4, XMM4, XMM4;
VXORPS XMM1, XMM1, XMM1

Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 5.04
- Reference cycles: 3.84
- UOPS_PORT_0: 5.0
- UOPS_PORT_1: 5.0

With blocking instructions for ports {'1', '5'}:

Code:

   0:	c5 e1 58 d4          	vaddpd xmm2,xmm3,xmm4
   4:	c5 e1 58 ec          	vaddpd xmm5,xmm3,xmm4
   8:	c5 e1 58 f4          	vaddpd xmm6,xmm3,xmm4
   c:	c5 e1 58 fc          	vaddpd xmm7,xmm3,xmm4
  10:	c5 61 58 c4          	vaddpd xmm8,xmm3,xmm4
  14:	c5 61 58 cc          	vaddpd xmm9,xmm3,xmm4
  18:	c5 61 58 d4          	vaddpd xmm10,xmm3,xmm4
  1c:	c5 61 58 dc          	vaddpd xmm11,xmm3,xmm4
  20:	c5 61 58 e4          	vaddpd xmm12,xmm3,xmm4
  24:	c5 e1 58 d4          	vaddpd xmm2,xmm3,xmm4
  28:	c4 c3 f1 22 c0 02    	vpinsrq xmm0,xmm1,r8,0x2

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
VMOVUPD XMM3, [R14];
VMOVUPD XMM4, [R14];
VXORPS XMM1, XMM1, XMM1

Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 6.05
- Reference cycles: 4.8
- UOPS_PORT_1: 6.0
- UOPS_PORT_5B: 6.0
- UOPS_PORT_5B>=2: 0.0

⇨ One μop that can only use ports {'1', '5'}