VGATHERQPD (YMM, VSIB_YMM, YMM) - Port Usage

With blocking instructions for port '0':

Code:

   0:	41 0f 7e c0          	movd   r8d,mm0
   4:	41 0f 7e c1          	movd   r9d,mm0
   8:	41 0f 7e c2          	movd   r10d,mm0
   c:	41 0f 7e c3          	movd   r11d,mm0
  10:	41 0f 7e c4          	movd   r12d,mm0
  14:	0f 7e c3             	movd   ebx,mm0
  17:	0f 7e c1             	movd   ecx,mm0
  1a:	0f 7e c2             	movd   edx,mm0
  1d:	41 0f 7e c0          	movd   r8d,mm0
  21:	41 0f 7e c1          	movd   r9d,mm0
  25:	c4 82 f5 93 04 36    	vgatherqpd ymm0,QWORD PTR [r14+ymm14*1],ymm1

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
PXOR MM0, MM0;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOV [R14+16], RAX;
MOV [R14+24], RAX;
VMOVUPD YMM0, [R14];
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM14, YMM14, YMM14

Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 11.23
- Reference cycles: 8.48
- UOPS_PORT_0: 11.0

⇨ One μop that can only use port '0'

With blocking instructions for port '1':

Code:

   0:	44 8d 05 80 00 00 00 	lea    r8d,[rip+0x80]        # 0x87
   7:	44 8d 0d 80 00 00 00 	lea    r9d,[rip+0x80]        # 0x8e
   e:	44 8d 15 80 00 00 00 	lea    r10d,[rip+0x80]        # 0x95
  15:	44 8d 1d 80 00 00 00 	lea    r11d,[rip+0x80]        # 0x9c
  1c:	44 8d 25 80 00 00 00 	lea    r12d,[rip+0x80]        # 0xa3
  23:	8d 1d 80 00 00 00    	lea    ebx,[rip+0x80]        # 0xa9
  29:	8d 0d 80 00 00 00    	lea    ecx,[rip+0x80]        # 0xaf
  2f:	8d 15 80 00 00 00    	lea    edx,[rip+0x80]        # 0xb5
  35:	44 8d 05 80 00 00 00 	lea    r8d,[rip+0x80]        # 0xbc
  3c:	44 8d 0d 80 00 00 00 	lea    r9d,[rip+0x80]        # 0xc3
  43:	c4 82 f5 93 04 36    	vgatherqpd ymm0,QWORD PTR [r14+ymm14*1],ymm1

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOV [R14+16], RAX;
MOV [R14+24], RAX;
VMOVUPD YMM0, [R14];
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM14, YMM14, YMM14

Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 10.02
- Reference cycles: 7.68
- UOPS_PORT_1: 10.01

With blocking instructions for port '23A':

Code:

   0:	45 8b 46 40          	mov    r8d,DWORD PTR [r14+0x40]
   4:	45 8b 4e 44          	mov    r9d,DWORD PTR [r14+0x44]
   8:	45 8b 56 48          	mov    r10d,DWORD PTR [r14+0x48]
   c:	45 8b 5e 4c          	mov    r11d,DWORD PTR [r14+0x4c]
  10:	45 8b 66 50          	mov    r12d,DWORD PTR [r14+0x50]
  14:	41 8b 5e 54          	mov    ebx,DWORD PTR [r14+0x54]
  18:	41 8b 4e 58          	mov    ecx,DWORD PTR [r14+0x58]
  1c:	41 8b 56 5c          	mov    edx,DWORD PTR [r14+0x5c]
  20:	45 8b 46 40          	mov    r8d,DWORD PTR [r14+0x40]
  24:	45 8b 4e 44          	mov    r9d,DWORD PTR [r14+0x44]
  28:	45 8b 56 48          	mov    r10d,DWORD PTR [r14+0x48]
  2c:	45 8b 5e 4c          	mov    r11d,DWORD PTR [r14+0x4c]
  30:	45 8b 66 50          	mov    r12d,DWORD PTR [r14+0x50]
  34:	41 8b 5e 54          	mov    ebx,DWORD PTR [r14+0x54]
  38:	41 8b 4e 58          	mov    ecx,DWORD PTR [r14+0x58]
  3c:	41 8b 56 5c          	mov    edx,DWORD PTR [r14+0x5c]
  40:	45 8b 46 40          	mov    r8d,DWORD PTR [r14+0x40]
  44:	45 8b 4e 44          	mov    r9d,DWORD PTR [r14+0x44]
  48:	45 8b 56 48          	mov    r10d,DWORD PTR [r14+0x48]
  4c:	45 8b 5e 4c          	mov    r11d,DWORD PTR [r14+0x4c]
  50:	45 8b 66 50          	mov    r12d,DWORD PTR [r14+0x50]
  54:	c4 82 f5 93 04 36    	vgatherqpd ymm0,QWORD PTR [r14+ymm14*1],ymm1

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOV [R14+16], RAX;
MOV [R14+24], RAX;
VMOVUPD YMM0, [R14];
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM14, YMM14, YMM14

Show nanoBench command
Results:
- Instructions retired: 22.0
- Core cycles: 9.33
- Reference cycles: 6.13
- UOPS_PORT_23A: 25.0

⇨ 4 μops that can only use port '23A'

With blocking instructions for port '5':

Code:

   0:	41 0f 6e c0          	movd   mm0,r8d
   4:	41 0f 6e c8          	movd   mm1,r8d
   8:	41 0f 6e d0          	movd   mm2,r8d
   c:	41 0f 6e d8          	movd   mm3,r8d
  10:	41 0f 6e e0          	movd   mm4,r8d
  14:	41 0f 6e e8          	movd   mm5,r8d
  18:	41 0f 6e f0          	movd   mm6,r8d
  1c:	41 0f 6e f8          	movd   mm7,r8d
  20:	41 0f 6e c0          	movd   mm0,r8d
  24:	41 0f 6e c8          	movd   mm1,r8d
  28:	c4 82 f5 93 04 36    	vgatherqpd ymm0,QWORD PTR [r14+ymm14*1],ymm1

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOV [R14+16], RAX;
MOV [R14+24], RAX;
VMOVUPD YMM0, [R14];
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM14, YMM14, YMM14

Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 10.06
- Reference cycles: 7.68
- UOPS_PORT_5B: 10.0
- UOPS_PORT_5B>=2: 0.0

With blocking instructions for ports {'0', '1'}:

Code:

   0:	c4 e2 61 de d4       	vaesdec xmm2,xmm3,xmm4
   5:	c4 e2 61 de ec       	vaesdec xmm5,xmm3,xmm4
   a:	c4 e2 61 de f4       	vaesdec xmm6,xmm3,xmm4
   f:	c4 e2 61 de fc       	vaesdec xmm7,xmm3,xmm4
  14:	c4 62 61 de c4       	vaesdec xmm8,xmm3,xmm4
  19:	c4 62 61 de cc       	vaesdec xmm9,xmm3,xmm4
  1e:	c4 62 61 de d4       	vaesdec xmm10,xmm3,xmm4
  23:	c4 62 61 de dc       	vaesdec xmm11,xmm3,xmm4
  28:	c4 62 61 de e4       	vaesdec xmm12,xmm3,xmm4
  2d:	c4 e2 61 de d4       	vaesdec xmm2,xmm3,xmm4
  32:	c4 e2 61 de ec       	vaesdec xmm5,xmm3,xmm4
  37:	c4 e2 61 de f4       	vaesdec xmm6,xmm3,xmm4
  3c:	c4 e2 61 de fc       	vaesdec xmm7,xmm3,xmm4
  41:	c4 62 61 de c4       	vaesdec xmm8,xmm3,xmm4
  46:	c4 82 f5 93 04 36    	vgatherqpd ymm0,QWORD PTR [r14+ymm14*1],ymm1

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS XMM3, XMM3, XMM3;
VXORPS XMM4, XMM4, XMM4;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOV [R14+16], RAX;
MOV [R14+24], RAX;
VMOVUPD YMM0, [R14];
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM14, YMM14, YMM14

Show nanoBench command
Results:
- Instructions retired: 15.0
- Core cycles: 7.83
- Reference cycles: 5.86
- UOPS_PORT_0: 7.52
- UOPS_PORT_1: 7.48

With blocking instructions for ports {'0', '5'}:

Code:

   0:	0f 6f c1             	movq   mm0,mm1
   3:	0f 6f d1             	movq   mm2,mm1
   6:	0f 6f d9             	movq   mm3,mm1
   9:	0f 6f e1             	movq   mm4,mm1
   c:	0f 6f e9             	movq   mm5,mm1
   f:	0f 6f f1             	movq   mm6,mm1
  12:	0f 6f f9             	movq   mm7,mm1
  15:	0f 6f c1             	movq   mm0,mm1
  18:	0f 6f d1             	movq   mm2,mm1
  1b:	0f 6f d9             	movq   mm3,mm1
  1e:	0f 6f e1             	movq   mm4,mm1
  21:	0f 6f e9             	movq   mm5,mm1
  24:	0f 6f f1             	movq   mm6,mm1
  27:	0f 6f f9             	movq   mm7,mm1
  2a:	c4 82 f5 93 04 36    	vgatherqpd ymm0,QWORD PTR [r14+ymm14*1],ymm1

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
PXOR MM1, MM1;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOV [R14+16], RAX;
MOV [R14+24], RAX;
VMOVUPD YMM0, [R14];
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM14, YMM14, YMM14

Show nanoBench command
Results:
- Instructions retired: 15.0
- Core cycles: 7.84
- Reference cycles: 5.41
- UOPS_PORT_0: 7.49
- UOPS_PORT_5B: 7.51
- UOPS_PORT_5B>=2: 0.0

With blocking instructions for ports {'0', '6'}:

Code:

   0:	66 41 c1 c0 00       	rol    r8w,0x0
   5:	66 41 c1 c1 00       	rol    r9w,0x0
   a:	66 41 c1 c2 00       	rol    r10w,0x0
   f:	66 41 c1 c3 00       	rol    r11w,0x0
  14:	66 41 c1 c4 00       	rol    r12w,0x0
  19:	66 c1 c3 00          	rol    bx,0x0
  1d:	66 c1 c1 00          	rol    cx,0x0
  21:	66 c1 c2 00          	rol    dx,0x0
  25:	66 41 c1 c0 00       	rol    r8w,0x0
  2a:	66 41 c1 c1 00       	rol    r9w,0x0
  2f:	66 41 c1 c2 00       	rol    r10w,0x0
  34:	66 41 c1 c3 00       	rol    r11w,0x0
  39:	66 41 c1 c4 00       	rol    r12w,0x0
  3e:	66 c1 c3 00          	rol    bx,0x0
  42:	c4 82 f5 93 04 36    	vgatherqpd ymm0,QWORD PTR [r14+ymm14*1],ymm1

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOV [R14+16], RAX;
MOV [R14+24], RAX;
VMOVUPD YMM0, [R14];
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM14, YMM14, YMM14

Show nanoBench command
Results:
- Instructions retired: 15.0
- Core cycles: 7.9
- Reference cycles: 5.41
- UOPS_PORT_6: 7.47
- UOPS_PORT_0: 7.55

With blocking instructions for ports {'1', '5'}:

Code:

   0:	c5 e1 58 d4          	vaddpd xmm2,xmm3,xmm4
   4:	c5 e1 58 ec          	vaddpd xmm5,xmm3,xmm4
   8:	c5 e1 58 f4          	vaddpd xmm6,xmm3,xmm4
   c:	c5 e1 58 fc          	vaddpd xmm7,xmm3,xmm4
  10:	c5 61 58 c4          	vaddpd xmm8,xmm3,xmm4
  14:	c5 61 58 cc          	vaddpd xmm9,xmm3,xmm4
  18:	c5 61 58 d4          	vaddpd xmm10,xmm3,xmm4
  1c:	c5 61 58 dc          	vaddpd xmm11,xmm3,xmm4
  20:	c5 61 58 e4          	vaddpd xmm12,xmm3,xmm4
  24:	c5 e1 58 d4          	vaddpd xmm2,xmm3,xmm4
  28:	c5 e1 58 ec          	vaddpd xmm5,xmm3,xmm4
  2c:	c5 e1 58 f4          	vaddpd xmm6,xmm3,xmm4
  30:	c5 e1 58 fc          	vaddpd xmm7,xmm3,xmm4
  34:	c5 61 58 c4          	vaddpd xmm8,xmm3,xmm4
  38:	c4 82 f5 93 04 36    	vgatherqpd ymm0,QWORD PTR [r14+ymm14*1],ymm1

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
VMOVUPD XMM3, [R14];
VMOVUPD XMM4, [R14];
MOV [R14+16], RAX;
MOV [R14+24], RAX;
VMOVUPD YMM0, [R14];
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM14, YMM14, YMM14

Show nanoBench command
Results:
- Instructions retired: 15.0
- Core cycles: 8.08
- Reference cycles: 5.86
- UOPS_PORT_1: 8.0
- UOPS_PORT_5B: 8.0
- UOPS_PORT_5B>=2: 0.0

⇨ 2 μops that can only use ports {'1', '5'}

With blocking instructions for ports {'0', '1', '5'}:

Code:

   0:	c5 e1 55 d4          	vandnpd xmm2,xmm3,xmm4
   4:	c5 e1 55 ec          	vandnpd xmm5,xmm3,xmm4
   8:	c5 e1 55 f4          	vandnpd xmm6,xmm3,xmm4
   c:	c5 e1 55 fc          	vandnpd xmm7,xmm3,xmm4
  10:	c5 61 55 c4          	vandnpd xmm8,xmm3,xmm4
  14:	c5 61 55 cc          	vandnpd xmm9,xmm3,xmm4
  18:	c5 61 55 d4          	vandnpd xmm10,xmm3,xmm4
  1c:	c5 61 55 dc          	vandnpd xmm11,xmm3,xmm4
  20:	c5 61 55 e4          	vandnpd xmm12,xmm3,xmm4
  24:	c5 e1 55 d4          	vandnpd xmm2,xmm3,xmm4
  28:	c5 e1 55 ec          	vandnpd xmm5,xmm3,xmm4
  2c:	c5 e1 55 f4          	vandnpd xmm6,xmm3,xmm4
  30:	c5 e1 55 fc          	vandnpd xmm7,xmm3,xmm4
  34:	c5 61 55 c4          	vandnpd xmm8,xmm3,xmm4
  38:	c5 61 55 cc          	vandnpd xmm9,xmm3,xmm4
  3c:	c5 61 55 d4          	vandnpd xmm10,xmm3,xmm4
  40:	c5 61 55 dc          	vandnpd xmm11,xmm3,xmm4
  44:	c5 61 55 e4          	vandnpd xmm12,xmm3,xmm4
  48:	c5 e1 55 d4          	vandnpd xmm2,xmm3,xmm4
  4c:	c5 e1 55 ec          	vandnpd xmm5,xmm3,xmm4
  50:	c5 e1 55 f4          	vandnpd xmm6,xmm3,xmm4
  54:	c4 82 f5 93 04 36    	vgatherqpd ymm0,QWORD PTR [r14+ymm14*1],ymm1

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS XMM3, XMM3, XMM3;
VXORPS XMM4, XMM4, XMM4;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOV [R14+16], RAX;
MOV [R14+24], RAX;
VMOVUPD YMM0, [R14];
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM14, YMM14, YMM14

Show nanoBench command
Results:
- Instructions retired: 22.0
- Core cycles: 8.77
- Reference cycles: 6.13
- UOPS_PORT_1: 8.35
- UOPS_PORT_0: 8.28
- UOPS_PORT_5B: 8.36
- UOPS_PORT_5B>=2: 0.0

⇨ One μop that can only use ports {'0', '1', '5'}