VGATHERDPD (ZMM, K, VSIB_YMM) - Port Usage

With blocking instructions for port '0':

• Code:

     0:	41 0f 7e c0          	movd   r8d,mm0
     4:	41 0f 7e c1          	movd   r9d,mm0
     8:	41 0f 7e c2          	movd   r10d,mm0
     c:	41 0f 7e c3          	movd   r11d,mm0
    10:	41 0f 7e c4          	movd   r12d,mm0
    14:	0f 7e c3             	movd   ebx,mm0
    17:	0f 7e c1             	movd   ecx,mm0
    1a:	0f 7e c2             	movd   edx,mm0
    1d:	41 0f 7e c0          	movd   r8d,mm0
    21:	41 0f 7e c1          	movd   r9d,mm0
    25:	62 92 fd 49 92 04 36 	vgatherdpd zmm0{k1},QWORD PTR [r14+ymm14*1]
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  PXOR MM0, MM0;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  MOV [R14+32], RAX;
  MOV [R14+40], RAX;
  MOV [R14+48], RAX;
  MOV [R14+56], RAX;
  VMOVUPD ZMM0, [R14];
  VXORPS YMM14, YMM14, YMM14

• Show nanoBench command
• Results:
  • Instructions retired: 11.0
  • Core cycles: 11.24
  • Reference cycles: 8.48
  • UOPS_PORT_0: 11.0

With blocking instructions for port '23A':

• Code:

     0:	45 8b 46 40          	mov    r8d,DWORD PTR [r14+0x40]
     4:	45 8b 4e 44          	mov    r9d,DWORD PTR [r14+0x44]
     8:	45 8b 56 48          	mov    r10d,DWORD PTR [r14+0x48]
     c:	45 8b 5e 4c          	mov    r11d,DWORD PTR [r14+0x4c]
    10:	45 8b 66 50          	mov    r12d,DWORD PTR [r14+0x50]
    14:	41 8b 5e 54          	mov    ebx,DWORD PTR [r14+0x54]
    18:	41 8b 4e 58          	mov    ecx,DWORD PTR [r14+0x58]
    1c:	41 8b 56 5c          	mov    edx,DWORD PTR [r14+0x5c]
    20:	45 8b 46 40          	mov    r8d,DWORD PTR [r14+0x40]
    24:	45 8b 4e 44          	mov    r9d,DWORD PTR [r14+0x44]
    28:	45 8b 56 48          	mov    r10d,DWORD PTR [r14+0x48]
    2c:	45 8b 5e 4c          	mov    r11d,DWORD PTR [r14+0x4c]
    30:	45 8b 66 50          	mov    r12d,DWORD PTR [r14+0x50]
    34:	41 8b 5e 54          	mov    ebx,DWORD PTR [r14+0x54]
    38:	41 8b 4e 58          	mov    ecx,DWORD PTR [r14+0x58]
    3c:	41 8b 56 5c          	mov    edx,DWORD PTR [r14+0x5c]
    40:	45 8b 46 40          	mov    r8d,DWORD PTR [r14+0x40]
    44:	45 8b 4e 44          	mov    r9d,DWORD PTR [r14+0x44]
    48:	62 92 fd 49 92 04 36 	vgatherdpd zmm0{k1},QWORD PTR [r14+ymm14*1]
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  MOV [R14+32], RAX;
  MOV [R14+40], RAX;
  MOV [R14+48], RAX;
  MOV [R14+56], RAX;
  VMOVUPD ZMM0, [R14];
  VXORPS YMM14, YMM14, YMM14

• Show nanoBench command
• Results:
  • Instructions retired: 19.0
  • Core cycles: 9.34
  • Reference cycles: 6.98
  • UOPS_PORT_23A: 26.0

With blocking instructions for port '5':

• Code:

     0:	41 0f 6e c0          	movd   mm0,r8d
     4:	41 0f 6e c8          	movd   mm1,r8d
     8:	41 0f 6e d0          	movd   mm2,r8d
     c:	41 0f 6e d8          	movd   mm3,r8d
    10:	41 0f 6e e0          	movd   mm4,r8d
    14:	41 0f 6e e8          	movd   mm5,r8d
    18:	41 0f 6e f0          	movd   mm6,r8d
    1c:	41 0f 6e f8          	movd   mm7,r8d
    20:	41 0f 6e c0          	movd   mm0,r8d
    24:	41 0f 6e c8          	movd   mm1,r8d
    28:	62 92 fd 49 92 04 36 	vgatherdpd zmm0{k1},QWORD PTR [r14+ymm14*1]
  

• Init:

  MOV R15, 10000;
  L: VADDPS ZMM0, ZMM1, ZMM1;
  VADDPS ZMM0, ZMM1, ZMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOV [R14+16], RAX;
  MOV [R14+24], RAX;
  MOV [R14+32], RAX;
  MOV [R14+40], RAX;
  MOV [R14+48], RAX;
  MOV [R14+56], RAX;
  VMOVUPD ZMM0, [R14];
  VXORPS YMM14, YMM14, YMM14

• Show nanoBench command
• Results:
  • Instructions retired: 11.0
  • Core cycles: 12.04
  • Reference cycles: 9.12
  • UOPS_PORT_5B: 12.0
  • UOPS_PORT_5B>=2: 0.0