RCR (R32, I8) - Port Usage

With blocking instructions for port '0':

Code:

   0:	41 0f 7e c1          	movd   r9d,mm0
   4:	41 0f 7e c2          	movd   r10d,mm0
   8:	41 0f 7e c3          	movd   r11d,mm0
   c:	41 0f 7e c4          	movd   r12d,mm0
  10:	0f 7e c3             	movd   ebx,mm0
  13:	0f 7e c1             	movd   ecx,mm0
  16:	0f 7e c2             	movd   edx,mm0
  19:	41 0f 7e c1          	movd   r9d,mm0
  1d:	41 0f 7e c2          	movd   r10d,mm0
  21:	41 0f 7e c3          	movd   r11d,mm0
  25:	41 0f 7e c4          	movd   r12d,mm0
  29:	0f 7e c3             	movd   ebx,mm0
  2c:	41 c1 d8 02          	rcr    r8d,0x2

Init:
```
PXOR MM0, MM0
```
Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 12.03
- Reference cycles: 9.06
- UOPS_PORT_0: 12.01

With blocking instructions for port '1':

Code:

   0:	66 f2 45 0f 38 f1 ca 	crc32  r9d,r10w
   7:	66 f2 45 0f 38 f1 da 	crc32  r11d,r10w
   e:	66 f2 45 0f 38 f1 e2 	crc32  r12d,r10w
  15:	66 f2 41 0f 38 f1 da 	crc32  ebx,r10w
  1c:	66 f2 41 0f 38 f1 ca 	crc32  ecx,r10w
  23:	66 f2 41 0f 38 f1 d2 	crc32  edx,r10w
  2a:	66 f2 45 0f 38 f1 ca 	crc32  r9d,r10w
  31:	66 f2 45 0f 38 f1 da 	crc32  r11d,r10w
  38:	66 f2 45 0f 38 f1 e2 	crc32  r12d,r10w
  3f:	66 f2 41 0f 38 f1 da 	crc32  ebx,r10w
  46:	66 f2 41 0f 38 f1 ca 	crc32  ecx,r10w
  4d:	66 f2 41 0f 38 f1 d2 	crc32  edx,r10w
  54:	41 c1 d8 02          	rcr    r8d,0x2

Init:
```
VZEROALL
```
Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 14.05
- Reference cycles: 10.41
- UOPS_PORT_1: 14.01

⇨ 2 μops that can only use port '1'

With blocking instructions for port '5':

Code:

   0:	66 0f 3a 21 c1 02    	insertps xmm0,xmm1,0x2
   6:	66 0f 3a 21 d1 02    	insertps xmm2,xmm1,0x2
   c:	66 0f 3a 21 d9 02    	insertps xmm3,xmm1,0x2
  12:	66 0f 3a 21 e1 02    	insertps xmm4,xmm1,0x2
  18:	66 0f 3a 21 e9 02    	insertps xmm5,xmm1,0x2
  1e:	66 0f 3a 21 f1 02    	insertps xmm6,xmm1,0x2
  24:	66 0f 3a 21 f9 02    	insertps xmm7,xmm1,0x2
  2a:	66 44 0f 3a 21 c1 02 	insertps xmm8,xmm1,0x2
  31:	66 44 0f 3a 21 c9 02 	insertps xmm9,xmm1,0x2
  38:	66 44 0f 3a 21 d1 02 	insertps xmm10,xmm1,0x2
  3f:	66 44 0f 3a 21 d9 02 	insertps xmm11,xmm1,0x2
  46:	66 44 0f 3a 21 e1 02 	insertps xmm12,xmm1,0x2
  4d:	41 c1 d8 02          	rcr    r8d,0x2

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
MOVUPD XMM1, [R14];
MOVUPD XMM2, [R14];
MOVUPD XMM3, [R14];
MOVUPD XMM4, [R14];
MOVUPD XMM5, [R14];
MOVUPD XMM6, [R14];
MOVUPD XMM7, [R14];
MOVUPD XMM8, [R14];
MOVUPD XMM9, [R14];
MOVUPD XMM10, [R14];
MOVUPD XMM11, [R14];
MOVUPD XMM12, [R14]

Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 12.02
- Reference cycles: 9.06
- UOPS_PORT_5B: 12.91
- UOPS_PORT_5B>=2: 0.9

With blocking instructions for ports {'0', '1'}:

Code:

   0:	66 0f 38 de c1       	aesdec xmm0,xmm1
   5:	66 0f 38 de d1       	aesdec xmm2,xmm1
   a:	66 0f 38 de d9       	aesdec xmm3,xmm1
   f:	66 0f 38 de e1       	aesdec xmm4,xmm1
  14:	66 0f 38 de e9       	aesdec xmm5,xmm1
  19:	66 0f 38 de f1       	aesdec xmm6,xmm1
  1e:	66 0f 38 de f9       	aesdec xmm7,xmm1
  23:	66 44 0f 38 de c1    	aesdec xmm8,xmm1
  29:	66 44 0f 38 de c9    	aesdec xmm9,xmm1
  2f:	66 44 0f 38 de d1    	aesdec xmm10,xmm1
  35:	66 44 0f 38 de d9    	aesdec xmm11,xmm1
  3b:	66 44 0f 38 de e1    	aesdec xmm12,xmm1
  41:	66 0f 38 de c1       	aesdec xmm0,xmm1
  46:	66 0f 38 de d1       	aesdec xmm2,xmm1
  4b:	66 0f 38 de d9       	aesdec xmm3,xmm1
  50:	66 0f 38 de e1       	aesdec xmm4,xmm1
  55:	66 0f 38 de e9       	aesdec xmm5,xmm1
  5a:	66 0f 38 de f1       	aesdec xmm6,xmm1
  5f:	66 0f 38 de f9       	aesdec xmm7,xmm1
  64:	66 44 0f 38 de c1    	aesdec xmm8,xmm1
  6a:	66 44 0f 38 de c9    	aesdec xmm9,xmm1
  70:	66 44 0f 38 de d1    	aesdec xmm10,xmm1
  76:	66 44 0f 38 de d9    	aesdec xmm11,xmm1
  7c:	66 44 0f 38 de e1    	aesdec xmm12,xmm1
  82:	41 c1 d8 02          	rcr    r8d,0x2

Init:

VZEROALL;
PXOR XMM0, XMM0;
PXOR XMM1, XMM1;
PXOR XMM2, XMM2;
PXOR XMM3, XMM3;
PXOR XMM4, XMM4;
PXOR XMM5, XMM5;
PXOR XMM6, XMM6;
PXOR XMM7, XMM7;
PXOR XMM8, XMM8;
PXOR XMM9, XMM9;
PXOR XMM10, XMM10;
PXOR XMM11, XMM11;
PXOR XMM12, XMM12

Show nanoBench command
Results:
- Instructions retired: 25.0
- Core cycles: 13.24
- Reference cycles: 9.37
- UOPS_PORT_0: 12.96
- UOPS_PORT_1: 13.06

With blocking instructions for ports {'0', '5'}:

Code:

   0:	0f 6f c1             	movq   mm0,mm1
   3:	0f 6f d1             	movq   mm2,mm1
   6:	0f 6f d9             	movq   mm3,mm1
   9:	0f 6f e1             	movq   mm4,mm1
   c:	0f 6f e9             	movq   mm5,mm1
   f:	0f 6f f1             	movq   mm6,mm1
  12:	0f 6f f9             	movq   mm7,mm1
  15:	0f 6f c1             	movq   mm0,mm1
  18:	0f 6f d1             	movq   mm2,mm1
  1b:	0f 6f d9             	movq   mm3,mm1
  1e:	0f 6f e1             	movq   mm4,mm1
  21:	0f 6f e9             	movq   mm5,mm1
  24:	0f 6f f1             	movq   mm6,mm1
  27:	0f 6f f9             	movq   mm7,mm1
  2a:	0f 6f c1             	movq   mm0,mm1
  2d:	0f 6f d1             	movq   mm2,mm1
  30:	0f 6f d9             	movq   mm3,mm1
  33:	0f 6f e1             	movq   mm4,mm1
  36:	0f 6f e9             	movq   mm5,mm1
  39:	0f 6f f1             	movq   mm6,mm1
  3c:	0f 6f f9             	movq   mm7,mm1
  3f:	0f 6f c1             	movq   mm0,mm1
  42:	0f 6f d1             	movq   mm2,mm1
  45:	0f 6f d9             	movq   mm3,mm1
  48:	41 c1 d8 02          	rcr    r8d,0x2

Init:
```
PXOR MM1, MM1
```
Show nanoBench command
Results:
- Instructions retired: 25.0
- Core cycles: 12.11
- Reference cycles: 8.98
- UOPS_PORT_0: 12.0
- UOPS_PORT_5B: 13.05
- UOPS_PORT_5B>=2: 1.02

With blocking instructions for ports {'0', '6'}:

Code:

   0:	66 41 c1 c1 00       	rol    r9w,0x0
   5:	66 41 c1 c2 00       	rol    r10w,0x0
   a:	66 41 c1 c3 00       	rol    r11w,0x0
   f:	66 41 c1 c4 00       	rol    r12w,0x0
  14:	66 c1 c3 00          	rol    bx,0x0
  18:	66 c1 c1 00          	rol    cx,0x0
  1c:	66 c1 c2 00          	rol    dx,0x0
  20:	66 41 c1 c1 00       	rol    r9w,0x0
  25:	66 41 c1 c2 00       	rol    r10w,0x0
  2a:	66 41 c1 c3 00       	rol    r11w,0x0
  2f:	66 41 c1 c4 00       	rol    r12w,0x0
  34:	66 c1 c3 00          	rol    bx,0x0
  38:	66 c1 c1 00          	rol    cx,0x0
  3c:	66 c1 c2 00          	rol    dx,0x0
  40:	66 41 c1 c1 00       	rol    r9w,0x0
  45:	66 41 c1 c2 00       	rol    r10w,0x0
  4a:	66 41 c1 c3 00       	rol    r11w,0x0
  4f:	66 41 c1 c4 00       	rol    r12w,0x0
  54:	66 c1 c3 00          	rol    bx,0x0
  58:	66 c1 c1 00          	rol    cx,0x0
  5c:	66 c1 c2 00          	rol    dx,0x0
  60:	66 41 c1 c1 00       	rol    r9w,0x0
  65:	66 41 c1 c2 00       	rol    r10w,0x0
  6a:	66 41 c1 c3 00       	rol    r11w,0x0
  6f:	41 c1 d8 02          	rcr    r8d,0x2

Show nanoBench command
Results:
- Instructions retired: 25.0
- Core cycles: 13.87
- Reference cycles: 9.37
- UOPS_PORT_6: 13.67
- UOPS_PORT_0: 13.36

⇨ 3 μops that can only use ports {'0', '6'}

With blocking instructions for ports {'1', '5'}:

Code:

   0:	66 0f 58 c1          	addpd  xmm0,xmm1
   4:	66 0f 58 d1          	addpd  xmm2,xmm1
   8:	66 0f 58 d9          	addpd  xmm3,xmm1
   c:	66 0f 58 e1          	addpd  xmm4,xmm1
  10:	66 0f 58 e9          	addpd  xmm5,xmm1
  14:	66 0f 58 f1          	addpd  xmm6,xmm1
  18:	66 0f 58 f9          	addpd  xmm7,xmm1
  1c:	66 44 0f 58 c1       	addpd  xmm8,xmm1
  21:	66 44 0f 58 c9       	addpd  xmm9,xmm1
  26:	66 44 0f 58 d1       	addpd  xmm10,xmm1
  2b:	66 44 0f 58 d9       	addpd  xmm11,xmm1
  30:	66 44 0f 58 e1       	addpd  xmm12,xmm1
  35:	66 0f 58 c1          	addpd  xmm0,xmm1
  39:	66 0f 58 d1          	addpd  xmm2,xmm1
  3d:	66 0f 58 d9          	addpd  xmm3,xmm1
  41:	66 0f 58 e1          	addpd  xmm4,xmm1
  45:	66 0f 58 e9          	addpd  xmm5,xmm1
  49:	66 0f 58 f1          	addpd  xmm6,xmm1
  4d:	66 0f 58 f9          	addpd  xmm7,xmm1
  51:	66 44 0f 58 c1       	addpd  xmm8,xmm1
  56:	66 44 0f 58 c9       	addpd  xmm9,xmm1
  5b:	66 44 0f 58 d1       	addpd  xmm10,xmm1
  60:	66 44 0f 58 d9       	addpd  xmm11,xmm1
  65:	66 44 0f 58 e1       	addpd  xmm12,xmm1
  6a:	41 c1 d8 02          	rcr    r8d,0x2

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
MOVUPD XMM1, [R14];
MOVUPD XMM2, [R14];
MOVUPD XMM3, [R14];
MOVUPD XMM4, [R14];
MOVUPD XMM5, [R14];
MOVUPD XMM6, [R14];
MOVUPD XMM7, [R14];
MOVUPD XMM8, [R14];
MOVUPD XMM9, [R14];
MOVUPD XMM10, [R14];
MOVUPD XMM11, [R14];
MOVUPD XMM12, [R14]

Show nanoBench command
Results:
- Instructions retired: 25.0
- Core cycles: 13.22
- Reference cycles: 9.76
- UOPS_PORT_1: 13.05
- UOPS_PORT_5B: 13.97
- UOPS_PORT_5B>=2: 1.02

With blocking instructions for ports {'0', '1', '5'}:

Code:

   0:	66 0f 55 c1          	andnpd xmm0,xmm1
   4:	66 0f 55 d1          	andnpd xmm2,xmm1
   8:	66 0f 55 d9          	andnpd xmm3,xmm1
   c:	66 0f 55 e1          	andnpd xmm4,xmm1
  10:	66 0f 55 e9          	andnpd xmm5,xmm1
  14:	66 0f 55 f1          	andnpd xmm6,xmm1
  18:	66 0f 55 f9          	andnpd xmm7,xmm1
  1c:	66 44 0f 55 c1       	andnpd xmm8,xmm1
  21:	66 44 0f 55 c9       	andnpd xmm9,xmm1
  26:	66 44 0f 55 d1       	andnpd xmm10,xmm1
  2b:	66 44 0f 55 d9       	andnpd xmm11,xmm1
  30:	66 44 0f 55 e1       	andnpd xmm12,xmm1
  35:	66 0f 55 c1          	andnpd xmm0,xmm1
  39:	66 0f 55 d1          	andnpd xmm2,xmm1
  3d:	66 0f 55 d9          	andnpd xmm3,xmm1
  41:	66 0f 55 e1          	andnpd xmm4,xmm1
  45:	66 0f 55 e9          	andnpd xmm5,xmm1
  49:	66 0f 55 f1          	andnpd xmm6,xmm1
  4d:	66 0f 55 f9          	andnpd xmm7,xmm1
  51:	66 44 0f 55 c1       	andnpd xmm8,xmm1
  56:	66 44 0f 55 c9       	andnpd xmm9,xmm1
  5b:	66 44 0f 55 d1       	andnpd xmm10,xmm1
  60:	66 44 0f 55 d9       	andnpd xmm11,xmm1
  65:	66 44 0f 55 e1       	andnpd xmm12,xmm1
  6a:	66 0f 55 c1          	andnpd xmm0,xmm1
  6e:	66 0f 55 d1          	andnpd xmm2,xmm1
  72:	66 0f 55 d9          	andnpd xmm3,xmm1
  76:	66 0f 55 e1          	andnpd xmm4,xmm1
  7a:	66 0f 55 e9          	andnpd xmm5,xmm1
  7e:	66 0f 55 f1          	andnpd xmm6,xmm1
  82:	66 0f 55 f9          	andnpd xmm7,xmm1
  86:	66 44 0f 55 c1       	andnpd xmm8,xmm1
  8b:	66 44 0f 55 c9       	andnpd xmm9,xmm1
  90:	66 44 0f 55 d1       	andnpd xmm10,xmm1
  95:	66 44 0f 55 d9       	andnpd xmm11,xmm1
  9a:	66 44 0f 55 e1       	andnpd xmm12,xmm1
  9f:	41 c1 d8 02          	rcr    r8d,0x2

Init:

VZEROALL;
PXOR XMM0, XMM0;
PXOR XMM1, XMM1;
PXOR XMM2, XMM2;
PXOR XMM3, XMM3;
PXOR XMM4, XMM4;
PXOR XMM5, XMM5;
PXOR XMM6, XMM6;
PXOR XMM7, XMM7;
PXOR XMM8, XMM8;
PXOR XMM9, XMM9;
PXOR XMM10, XMM10;
PXOR XMM11, XMM11;
PXOR XMM12, XMM12

Show nanoBench command
Results:
- Instructions retired: 37.0
- Core cycles: 12.91
- Reference cycles: 9.48
- UOPS_PORT_1: 12.74
- UOPS_PORT_0: 12.61
- UOPS_PORT_5B: 13.99
- UOPS_PORT_5B>=2: 1.33

With blocking instructions for ports {'0', '5', '6'}:

Code:

   0:	47 8d 0c 6e          	lea    r9d,[r14+r13*2]
   4:	47 8d 14 6e          	lea    r10d,[r14+r13*2]
   8:	47 8d 1c 6e          	lea    r11d,[r14+r13*2]
   c:	47 8d 24 6e          	lea    r12d,[r14+r13*2]
  10:	43 8d 1c 6e          	lea    ebx,[r14+r13*2]
  14:	43 8d 0c 6e          	lea    ecx,[r14+r13*2]
  18:	43 8d 14 6e          	lea    edx,[r14+r13*2]
  1c:	47 8d 0c 6e          	lea    r9d,[r14+r13*2]
  20:	47 8d 14 6e          	lea    r10d,[r14+r13*2]
  24:	47 8d 1c 6e          	lea    r11d,[r14+r13*2]
  28:	47 8d 24 6e          	lea    r12d,[r14+r13*2]
  2c:	43 8d 1c 6e          	lea    ebx,[r14+r13*2]
  30:	43 8d 0c 6e          	lea    ecx,[r14+r13*2]
  34:	43 8d 14 6e          	lea    edx,[r14+r13*2]
  38:	47 8d 0c 6e          	lea    r9d,[r14+r13*2]
  3c:	47 8d 14 6e          	lea    r10d,[r14+r13*2]
  40:	47 8d 1c 6e          	lea    r11d,[r14+r13*2]
  44:	47 8d 24 6e          	lea    r12d,[r14+r13*2]
  48:	43 8d 1c 6e          	lea    ebx,[r14+r13*2]
  4c:	43 8d 0c 6e          	lea    ecx,[r14+r13*2]
  50:	43 8d 14 6e          	lea    edx,[r14+r13*2]
  54:	47 8d 0c 6e          	lea    r9d,[r14+r13*2]
  58:	47 8d 14 6e          	lea    r10d,[r14+r13*2]
  5c:	47 8d 1c 6e          	lea    r11d,[r14+r13*2]
  60:	47 8d 24 6e          	lea    r12d,[r14+r13*2]
  64:	43 8d 1c 6e          	lea    ebx,[r14+r13*2]
  68:	43 8d 0c 6e          	lea    ecx,[r14+r13*2]
  6c:	43 8d 14 6e          	lea    edx,[r14+r13*2]
  70:	47 8d 0c 6e          	lea    r9d,[r14+r13*2]
  74:	47 8d 14 6e          	lea    r10d,[r14+r13*2]
  78:	47 8d 1c 6e          	lea    r11d,[r14+r13*2]
  7c:	47 8d 24 6e          	lea    r12d,[r14+r13*2]
  80:	43 8d 1c 6e          	lea    ebx,[r14+r13*2]
  84:	43 8d 0c 6e          	lea    ecx,[r14+r13*2]
  88:	43 8d 14 6e          	lea    edx,[r14+r13*2]
  8c:	47 8d 0c 6e          	lea    r9d,[r14+r13*2]
  90:	41 c1 d8 02          	rcr    r8d,0x2

Show nanoBench command
Results:
- Instructions retired: 37.0
- Core cycles: 13.23
- Reference cycles: 9.48
- UOPS_PORT_6: 13.06
- UOPS_PORT_0: 13.04
- UOPS_PORT_5B: 14.23
- UOPS_PORT_5B>=2: 1.31

With blocking instructions for ports {'1', '5', 'B'}:

Code:

   0:	66 45 0f be ca       	movsx  r9w,r10b
   5:	66 45 0f be da       	movsx  r11w,r10b
   a:	66 45 0f be e2       	movsx  r12w,r10b
   f:	66 41 0f be da       	movsx  bx,r10b
  14:	66 41 0f be ca       	movsx  cx,r10b
  19:	66 41 0f be d2       	movsx  dx,r10b
  1e:	66 45 0f be ca       	movsx  r9w,r10b
  23:	66 45 0f be da       	movsx  r11w,r10b
  28:	66 45 0f be e2       	movsx  r12w,r10b
  2d:	66 41 0f be da       	movsx  bx,r10b
  32:	66 41 0f be ca       	movsx  cx,r10b
  37:	66 41 0f be d2       	movsx  dx,r10b
  3c:	66 45 0f be ca       	movsx  r9w,r10b
  41:	66 45 0f be da       	movsx  r11w,r10b
  46:	66 45 0f be e2       	movsx  r12w,r10b
  4b:	66 41 0f be da       	movsx  bx,r10b
  50:	66 41 0f be ca       	movsx  cx,r10b
  55:	66 41 0f be d2       	movsx  dx,r10b
  5a:	66 45 0f be ca       	movsx  r9w,r10b
  5f:	66 45 0f be da       	movsx  r11w,r10b
  64:	66 45 0f be e2       	movsx  r12w,r10b
  69:	66 41 0f be da       	movsx  bx,r10b
  6e:	66 41 0f be ca       	movsx  cx,r10b
  73:	66 41 0f be d2       	movsx  dx,r10b
  78:	66 45 0f be ca       	movsx  r9w,r10b
  7d:	66 45 0f be da       	movsx  r11w,r10b
  82:	66 45 0f be e2       	movsx  r12w,r10b
  87:	66 41 0f be da       	movsx  bx,r10b
  8c:	66 41 0f be ca       	movsx  cx,r10b
  91:	66 41 0f be d2       	movsx  dx,r10b
  96:	66 45 0f be ca       	movsx  r9w,r10b
  9b:	66 45 0f be da       	movsx  r11w,r10b
  a0:	66 45 0f be e2       	movsx  r12w,r10b
  a5:	66 41 0f be da       	movsx  bx,r10b
  aa:	66 41 0f be ca       	movsx  cx,r10b
  af:	66 41 0f be d2       	movsx  dx,r10b
  b4:	41 c1 d8 02          	rcr    r8d,0x2

Show nanoBench command
Results:
- Instructions retired: 37.0
- Core cycles: 13.88
- Reference cycles: 11.85
- UOPS_PORT_1: 12.74
- UOPS_PORT_5B: 25.26

With blocking instructions for ports {'0', '1', '5', '6', 'B'}:

Code:

   0:	45 8d 0e             	lea    r9d,[r14]
   3:	45 8d 16             	lea    r10d,[r14]
   6:	45 8d 1e             	lea    r11d,[r14]
   9:	45 8d 26             	lea    r12d,[r14]
   c:	41 8d 1e             	lea    ebx,[r14]
   f:	41 8d 0e             	lea    ecx,[r14]
  12:	41 8d 16             	lea    edx,[r14]
  15:	45 8d 0e             	lea    r9d,[r14]
  18:	45 8d 16             	lea    r10d,[r14]
  1b:	45 8d 1e             	lea    r11d,[r14]
  1e:	45 8d 26             	lea    r12d,[r14]
  21:	41 8d 1e             	lea    ebx,[r14]
  24:	41 8d 0e             	lea    ecx,[r14]
  27:	41 8d 16             	lea    edx,[r14]
  2a:	45 8d 0e             	lea    r9d,[r14]
  2d:	45 8d 16             	lea    r10d,[r14]
  30:	45 8d 1e             	lea    r11d,[r14]
  33:	45 8d 26             	lea    r12d,[r14]
  36:	41 8d 1e             	lea    ebx,[r14]
  39:	41 8d 0e             	lea    ecx,[r14]
  3c:	41 8d 16             	lea    edx,[r14]
  3f:	45 8d 0e             	lea    r9d,[r14]
  42:	45 8d 16             	lea    r10d,[r14]
  45:	45 8d 1e             	lea    r11d,[r14]
  48:	45 8d 26             	lea    r12d,[r14]
  4b:	41 8d 1e             	lea    ebx,[r14]
  4e:	41 8d 0e             	lea    ecx,[r14]
  51:	41 8d 16             	lea    edx,[r14]
  54:	45 8d 0e             	lea    r9d,[r14]
  57:	45 8d 16             	lea    r10d,[r14]
  5a:	45 8d 1e             	lea    r11d,[r14]
  5d:	45 8d 26             	lea    r12d,[r14]
  60:	41 8d 1e             	lea    ebx,[r14]
  63:	41 8d 0e             	lea    ecx,[r14]
  66:	41 8d 16             	lea    edx,[r14]
  69:	45 8d 0e             	lea    r9d,[r14]
  6c:	45 8d 16             	lea    r10d,[r14]
  6f:	45 8d 1e             	lea    r11d,[r14]
  72:	45 8d 26             	lea    r12d,[r14]
  75:	41 8d 1e             	lea    ebx,[r14]
  78:	41 8d 0e             	lea    ecx,[r14]
  7b:	41 8d 16             	lea    edx,[r14]
  7e:	45 8d 0e             	lea    r9d,[r14]
  81:	45 8d 16             	lea    r10d,[r14]
  84:	45 8d 1e             	lea    r11d,[r14]
  87:	45 8d 26             	lea    r12d,[r14]
  8a:	41 8d 1e             	lea    ebx,[r14]
  8d:	41 8d 0e             	lea    ecx,[r14]
  90:	41 8d 16             	lea    edx,[r14]
  93:	45 8d 0e             	lea    r9d,[r14]
  96:	45 8d 16             	lea    r10d,[r14]
  99:	45 8d 1e             	lea    r11d,[r14]
  9c:	45 8d 26             	lea    r12d,[r14]
  9f:	41 8d 1e             	lea    ebx,[r14]
  a2:	41 8d 0e             	lea    ecx,[r14]
  a5:	41 8d 16             	lea    edx,[r14]
  a8:	45 8d 0e             	lea    r9d,[r14]
  ab:	45 8d 16             	lea    r10d,[r14]
  ae:	45 8d 1e             	lea    r11d,[r14]
  b1:	45 8d 26             	lea    r12d,[r14]
  b4:	41 c1 d8 02          	rcr    r8d,0x2

Show nanoBench command
Results:
- Instructions retired: 61.0
- Core cycles: 16.38
- Reference cycles: 12.0
- UOPS_PORT_6: 13.81
- UOPS_PORT_0: 13.69
- UOPS_PORT_1: 13.06
- UOPS_PORT_5B: 26.69

⇨ 2 μops that can only use ports {'0', '1', '5', '6', 'B'}