CMOVBE (R32, R32) - Port Usage

With blocking instructions for port '0':

Code:

   0:	41 0f 7e c2          	movd   r10d,mm0
   4:	41 0f 7e c3          	movd   r11d,mm0
   8:	41 0f 7e c4          	movd   r12d,mm0
   c:	0f 7e c3             	movd   ebx,mm0
   f:	0f 7e c1             	movd   ecx,mm0
  12:	0f 7e c2             	movd   edx,mm0
  15:	41 0f 7e c2          	movd   r10d,mm0
  19:	41 0f 7e c3          	movd   r11d,mm0
  1d:	41 0f 7e c4          	movd   r12d,mm0
  21:	0f 7e c3             	movd   ebx,mm0
  24:	45 0f 46 c1          	cmovbe r8d,r9d

Init:
```
PXOR MM0, MM0
```
Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 10.02
- Reference cycles: 7.68
- UOPS_PORT_0: 10.01

With blocking instructions for ports {'0', '1'}:

Code:

   0:	66 0f 38 de c1       	aesdec xmm0,xmm1
   5:	66 0f 38 de d1       	aesdec xmm2,xmm1
   a:	66 0f 38 de d9       	aesdec xmm3,xmm1
   f:	66 0f 38 de e1       	aesdec xmm4,xmm1
  14:	66 0f 38 de e9       	aesdec xmm5,xmm1
  19:	66 0f 38 de f1       	aesdec xmm6,xmm1
  1e:	66 0f 38 de f9       	aesdec xmm7,xmm1
  23:	66 44 0f 38 de c1    	aesdec xmm8,xmm1
  29:	66 44 0f 38 de c9    	aesdec xmm9,xmm1
  2f:	66 44 0f 38 de d1    	aesdec xmm10,xmm1
  35:	45 0f 46 c1          	cmovbe r8d,r9d

Init:

VZEROALL;
PXOR XMM0, XMM0;
PXOR XMM1, XMM1;
PXOR XMM2, XMM2;
PXOR XMM3, XMM3;
PXOR XMM4, XMM4;
PXOR XMM5, XMM5;
PXOR XMM6, XMM6;
PXOR XMM7, XMM7;
PXOR XMM8, XMM8;
PXOR XMM9, XMM9;
PXOR XMM10, XMM10;
PXOR XMM11, XMM11;
PXOR XMM12, XMM12

Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 5.06
- Reference cycles: 3.84
- UOPS_PORT_0: 5.01
- UOPS_PORT_1: 5.0

With blocking instructions for ports {'0', '5'}:

Code:

   0:	0f 6f c1             	movq   mm0,mm1
   3:	0f 6f d1             	movq   mm2,mm1
   6:	0f 6f d9             	movq   mm3,mm1
   9:	0f 6f e1             	movq   mm4,mm1
   c:	0f 6f e9             	movq   mm5,mm1
   f:	0f 6f f1             	movq   mm6,mm1
  12:	0f 6f f9             	movq   mm7,mm1
  15:	0f 6f c1             	movq   mm0,mm1
  18:	0f 6f d1             	movq   mm2,mm1
  1b:	0f 6f d9             	movq   mm3,mm1
  1e:	45 0f 46 c1          	cmovbe r8d,r9d

Init:
```
PXOR MM1, MM1
```
Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 5.06
- Reference cycles: 3.84
- UOPS_PORT_0: 5.02
- UOPS_PORT_5B: 5.01
- UOPS_PORT_5B>=2: 0.0

With blocking instructions for ports {'0', '6'}:

Code:

   0:	66 41 c1 c2 00       	rol    r10w,0x0
   5:	66 41 c1 c3 00       	rol    r11w,0x0
   a:	66 41 c1 c4 00       	rol    r12w,0x0
   f:	66 c1 c3 00          	rol    bx,0x0
  13:	66 c1 c1 00          	rol    cx,0x0
  17:	66 c1 c2 00          	rol    dx,0x0
  1b:	66 41 c1 c2 00       	rol    r10w,0x0
  20:	66 41 c1 c3 00       	rol    r11w,0x0
  25:	66 41 c1 c4 00       	rol    r12w,0x0
  2a:	66 c1 c3 00          	rol    bx,0x0
  2e:	45 0f 46 c1          	cmovbe r8d,r9d

Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 6.02
- Reference cycles: 4.48
- UOPS_PORT_6: 5.99
- UOPS_PORT_0: 6.02

⇨ 2 μops that can only use ports {'0', '6'}