AESENC (XMM, XMM)

Experiment 1

Instruction: AESENC XMM0, XMM1

Code:

   0:	66 0f 38 dc c1       	aesenc xmm0,xmm1

Init:

VZEROALL;
PXOR XMM0, XMM0;
PXOR XMM1, XMM1

Show nanoBench command
Results:
- MPERF: 2.72
- APERF: 4.05
- UOPS: 1.0

Experiment 2

Instruction: AESENC XMM0, XMM1
Chain instructions: VANDPD XMM0, XMM0, XMM0;VANDPD XMM0, XMM0, XMM0;VANDPD XMM0, XMM0, XMM0;VANDPD XMM0, XMM0, XMM0;VANDPD XMM0, XMM0, XMM0;VANDPD XMM0, XMM0, XMM0;VANDPD XMM0, XMM0, XMM0
Chain latency: 14

Code:

   0:	66 0f 38 dc c1       	aesenc xmm0,xmm1
   5:	c5 f9 54 c0          	vandpd xmm0,xmm0,xmm0
   9:	c5 f9 54 c0          	vandpd xmm0,xmm0,xmm0
   d:	c5 f9 54 c0          	vandpd xmm0,xmm0,xmm0
  11:	c5 f9 54 c0          	vandpd xmm0,xmm0,xmm0
  15:	c5 f9 54 c0          	vandpd xmm0,xmm0,xmm0
  19:	c5 f9 54 c0          	vandpd xmm0,xmm0,xmm0
  1d:	c5 f9 54 c0          	vandpd xmm0,xmm0,xmm0

Init:

VZEROALL;
PXOR XMM0, XMM0;
PXOR XMM1, XMM1

Show nanoBench command
Results:
- MPERF: 12.16
- APERF: 17.97
- UOPS: 8.0

Experiment 3

Instruction: AESENC XMM0, XMM1
Chain instructions: PSHUFD XMM0, XMM0, 0;PAND XMM0, XMM0;PAND XMM0, XMM0;PAND XMM0, XMM0;PAND XMM0, XMM0;PAND XMM0, XMM0;PAND XMM0, XMM0
Chain latency: 14

Code:

   0:	66 0f 38 dc c1       	aesenc xmm0,xmm1
   5:	66 0f 70 c0 00       	pshufd xmm0,xmm0,0x0
   a:	66 0f db c0          	pand   xmm0,xmm0
   e:	66 0f db c0          	pand   xmm0,xmm0
  12:	66 0f db c0          	pand   xmm0,xmm0
  16:	66 0f db c0          	pand   xmm0,xmm0
  1a:	66 0f db c0          	pand   xmm0,xmm0
  1e:	66 0f db c0          	pand   xmm0,xmm0

Init:

VZEROALL;
PXOR XMM0, XMM0;
PXOR XMM1, XMM1

Show nanoBench command
Results:
- MPERF: 12.16
- APERF: 17.98
- UOPS: 8.0

Experiment 4 (source registers initialized by an instruction of the same kind)

Instruction: AESENC XMM0, XMM1

Code:

   0:	66 0f 38 dc c1       	aesenc xmm0,xmm1

Init:

VZEROALL;
PXOR XMM0, XMM0;
PXOR XMM1, XMM1;
AESENC XMM0, XMM1;
AESENC XMM1, XMM0

Show nanoBench command
Results:
- MPERF: 2.79
- APERF: 4.06
- UOPS: 1.0

Experiment 5 (source registers initialized by an instruction of the same kind)

Instruction: AESENC XMM0, XMM1
Chain instructions: VANDPD XMM0, XMM0, XMM0;VANDPD XMM0, XMM0, XMM0;VANDPD XMM0, XMM0, XMM0;VANDPD XMM0, XMM0, XMM0;VANDPD XMM0, XMM0, XMM0;VANDPD XMM0, XMM0, XMM0;VANDPD XMM0, XMM0, XMM0
Chain latency: 14

Code:

   0:	66 0f 38 dc c1       	aesenc xmm0,xmm1
   5:	c5 f9 54 c0          	vandpd xmm0,xmm0,xmm0
   9:	c5 f9 54 c0          	vandpd xmm0,xmm0,xmm0
   d:	c5 f9 54 c0          	vandpd xmm0,xmm0,xmm0
  11:	c5 f9 54 c0          	vandpd xmm0,xmm0,xmm0
  15:	c5 f9 54 c0          	vandpd xmm0,xmm0,xmm0
  19:	c5 f9 54 c0          	vandpd xmm0,xmm0,xmm0
  1d:	c5 f9 54 c0          	vandpd xmm0,xmm0,xmm0

Init:

VZEROALL;
PXOR XMM0, XMM0;
PXOR XMM1, XMM1;
AESENC XMM0, XMM1;
AESENC XMM1, XMM0

Show nanoBench command
Results:
- MPERF: 12.29
- APERF: 17.98
- UOPS: 8.0

Experiment 6 (source registers initialized by an instruction of the same kind)

Instruction: AESENC XMM0, XMM1
Chain instructions: PSHUFD XMM0, XMM0, 0;PAND XMM0, XMM0;PAND XMM0, XMM0;PAND XMM0, XMM0;PAND XMM0, XMM0;PAND XMM0, XMM0;PAND XMM0, XMM0
Chain latency: 14

Code:

   0:	66 0f 38 dc c1       	aesenc xmm0,xmm1
   5:	66 0f 70 c0 00       	pshufd xmm0,xmm0,0x0
   a:	66 0f db c0          	pand   xmm0,xmm0
   e:	66 0f db c0          	pand   xmm0,xmm0
  12:	66 0f db c0          	pand   xmm0,xmm0
  16:	66 0f db c0          	pand   xmm0,xmm0
  1a:	66 0f db c0          	pand   xmm0,xmm0
  1e:	66 0f db c0          	pand   xmm0,xmm0

Init:

VZEROALL;
PXOR XMM0, XMM0;
PXOR XMM1, XMM1;
AESENC XMM0, XMM1;
AESENC XMM1, XMM0

Show nanoBench command
Results:
- MPERF: 12.16
- APERF: 17.69
- UOPS: 8.0

Experiment 1

Instruction: AESENC XMM1, XMM0
Chain instructions: VANDPD XMM0, XMM1, XMM1;VANDPD XMM0, XMM0, XMM0;VANDPD XMM0, XMM0, XMM0;VANDPD XMM0, XMM0, XMM0;VANDPD XMM0, XMM0, XMM0;VANDPD XMM0, XMM0, XMM0;VANDPD XMM0, XMM0, XMM0
Chain latency: 14

Code:

   0:	66 0f 38 dc c8       	aesenc xmm1,xmm0
   5:	c5 f1 54 c1          	vandpd xmm0,xmm1,xmm1
   9:	c5 f9 54 c0          	vandpd xmm0,xmm0,xmm0
   d:	c5 f9 54 c0          	vandpd xmm0,xmm0,xmm0
  11:	c5 f9 54 c0          	vandpd xmm0,xmm0,xmm0
  15:	c5 f9 54 c0          	vandpd xmm0,xmm0,xmm0
  19:	c5 f9 54 c0          	vandpd xmm0,xmm0,xmm0
  1d:	c5 f9 54 c0          	vandpd xmm0,xmm0,xmm0

Init:

VZEROALL;
PXOR XMM1, XMM1;
PXOR XMM0, XMM0

Show nanoBench command
Results:
- MPERF: 12.16
- APERF: 17.68
- UOPS: 8.0

Experiment 2

Instruction: AESENC XMM1, XMM0
Chain instructions: PSHUFD XMM0, XMM1, 0;PAND XMM0, XMM0;PAND XMM0, XMM0;PAND XMM0, XMM0;PAND XMM0, XMM0;PAND XMM0, XMM0;PAND XMM0, XMM0
Chain latency: 14

Code:

   0:	66 0f 38 dc c8       	aesenc xmm1,xmm0
   5:	66 0f 70 c1 00       	pshufd xmm0,xmm1,0x0
   a:	66 0f db c0          	pand   xmm0,xmm0
   e:	66 0f db c0          	pand   xmm0,xmm0
  12:	66 0f db c0          	pand   xmm0,xmm0
  16:	66 0f db c0          	pand   xmm0,xmm0
  1a:	66 0f db c0          	pand   xmm0,xmm0
  1e:	66 0f db c0          	pand   xmm0,xmm0

Init:

VZEROALL;
PXOR XMM1, XMM1;
PXOR XMM0, XMM0

Show nanoBench command
Results:
- MPERF: 12.22
- APERF: 17.98
- UOPS: 8.0

Experiment 3 (source registers initialized by an instruction of the same kind)

Instruction: AESENC XMM1, XMM0
Chain instructions: VANDPD XMM0, XMM1, XMM1;VANDPD XMM0, XMM0, XMM0;VANDPD XMM0, XMM0, XMM0;VANDPD XMM0, XMM0, XMM0;VANDPD XMM0, XMM0, XMM0;VANDPD XMM0, XMM0, XMM0;VANDPD XMM0, XMM0, XMM0
Chain latency: 14

Code:

   0:	66 0f 38 dc c8       	aesenc xmm1,xmm0
   5:	c5 f1 54 c1          	vandpd xmm0,xmm1,xmm1
   9:	c5 f9 54 c0          	vandpd xmm0,xmm0,xmm0
   d:	c5 f9 54 c0          	vandpd xmm0,xmm0,xmm0
  11:	c5 f9 54 c0          	vandpd xmm0,xmm0,xmm0
  15:	c5 f9 54 c0          	vandpd xmm0,xmm0,xmm0
  19:	c5 f9 54 c0          	vandpd xmm0,xmm0,xmm0
  1d:	c5 f9 54 c0          	vandpd xmm0,xmm0,xmm0

Init:

VZEROALL;
PXOR XMM1, XMM1;
PXOR XMM0, XMM0;
AESENC XMM1, XMM0;
AESENC XMM0, XMM1

Show nanoBench command
Results:
- MPERF: 12.16
- APERF: 17.68
- UOPS: 8.0

Experiment 4 (source registers initialized by an instruction of the same kind)

Instruction: AESENC XMM1, XMM0
Chain instructions: PSHUFD XMM0, XMM1, 0;PAND XMM0, XMM0;PAND XMM0, XMM0;PAND XMM0, XMM0;PAND XMM0, XMM0;PAND XMM0, XMM0;PAND XMM0, XMM0
Chain latency: 14

Code:

   0:	66 0f 38 dc c8       	aesenc xmm1,xmm0
   5:	66 0f 70 c1 00       	pshufd xmm0,xmm1,0x0
   a:	66 0f db c0          	pand   xmm0,xmm0
   e:	66 0f db c0          	pand   xmm0,xmm0
  12:	66 0f db c0          	pand   xmm0,xmm0
  16:	66 0f db c0          	pand   xmm0,xmm0
  1a:	66 0f db c0          	pand   xmm0,xmm0
  1e:	66 0f db c0          	pand   xmm0,xmm0

Init:

VZEROALL;
PXOR XMM1, XMM1;
PXOR XMM0, XMM0;
AESENC XMM1, XMM0;
AESENC XMM0, XMM1

Show nanoBench command
Results:
- MPERF: 12.22
- APERF: 17.99
- UOPS: 8.0

Experiment 5

Instruction: AESENC XMM1, XMM0
Chain instruction: AESENC XMM0, XMM1

Code:

   0:	66 0f 38 dc c8       	aesenc xmm1,xmm0
   5:	66 0f 38 dc c1       	aesenc xmm0,xmm1

Init:

VZEROALL;
PXOR XMM1, XMM1;
PXOR XMM0, XMM0

Show nanoBench command
Results:
- MPERF: 5.32
- APERF: 7.99
- UOPS: 2.0

Experiment 6 (with dependency-breaking instructions)

Instruction: AESENC XMM1, XMM0
Chain instructions: AESENC XMM0, XMM1;PXOR XMM1, XMM1

Code:

   0:	66 0f 38 dc c8       	aesenc xmm1,xmm0
   5:	66 0f 38 dc c1       	aesenc xmm0,xmm1
   a:	66 0f ef c9          	pxor   xmm1,xmm1

Init:

VZEROALL;
PXOR XMM1, XMM1;
PXOR XMM0, XMM0

Show nanoBench command
Results:
- MPERF: 5.51
- APERF: 7.99
- UOPS: 3.0

Experiment 7 (source registers initialized by an instruction of the same kind)

Instruction: AESENC XMM1, XMM0
Chain instruction: AESENC XMM0, XMM1

Code:

   0:	66 0f 38 dc c8       	aesenc xmm1,xmm0
   5:	66 0f 38 dc c1       	aesenc xmm0,xmm1

Init:

VZEROALL;
PXOR XMM1, XMM1;
PXOR XMM0, XMM0;
AESENC XMM1, XMM0;
AESENC XMM0, XMM1

Show nanoBench command
Results:
- MPERF: 5.7
- APERF: 8.0
- UOPS: 2.0

Experiment 8 (source registers initialized by an instruction of the same kind, with dependency-breaking instructions)

Instruction: AESENC XMM1, XMM0
Chain instructions: AESENC XMM0, XMM1;PXOR XMM1, XMM1

Code:

   0:	66 0f 38 dc c8       	aesenc xmm1,xmm0
   5:	66 0f 38 dc c1       	aesenc xmm0,xmm1
   a:	66 0f ef c9          	pxor   xmm1,xmm1

Init:

VZEROALL;
PXOR XMM1, XMM1;
PXOR XMM0, XMM0;
AESENC XMM1, XMM0;
AESENC XMM0, XMM1

Show nanoBench command
Results:
- MPERF: 5.51
- APERF: 8.01
- UOPS: 3.0

AESENC (XMM, XMM) - Latency

Operands

Latency operand 1 → 1: 3

Latency operand 2 → 1: 3

Latency operand 1 → 1: 3

Experiment 1

Experiment 2

Experiment 3

Experiment 4 (source registers initialized by an instruction of the same kind)

Experiment 5 (source registers initialized by an instruction of the same kind)

Experiment 6 (source registers initialized by an instruction of the same kind)

Latency operand 2 → 1: 3

Experiment 1

Experiment 2

Experiment 3 (source registers initialized by an instruction of the same kind)

Experiment 4 (source registers initialized by an instruction of the same kind)

Experiment 5

Experiment 6 (with dependency-breaking instructions)

Experiment 7 (source registers initialized by an instruction of the same kind)

Experiment 8 (source registers initialized by an instruction of the same kind, with dependency-breaking instructions)