VADDPS (ZMM, ZMM, ZMM)

Experiment 1

Instruction: VADDPS ZMM1, ZMM0, ZMM2
Chain instructions: VANDPD ZMM0, ZMM1, ZMM1;VANDPD ZMM0, ZMM0, ZMM0;VANDPD ZMM0, ZMM0, ZMM0;VANDPD ZMM0, ZMM0, ZMM0;VANDPD ZMM0, ZMM0, ZMM0
Chain latency: 5

Code:

   0:	62 f1 7c 48 58 ca    	vaddps zmm1,zmm0,zmm2
   6:	62 f1 f5 48 54 c1    	vandpd zmm0,zmm1,zmm1
   c:	62 f1 fd 48 54 c0    	vandpd zmm0,zmm0,zmm0
  12:	62 f1 fd 48 54 c0    	vandpd zmm0,zmm0,zmm0
  18:	62 f1 fd 48 54 c0    	vandpd zmm0,zmm0,zmm0
  1e:	62 f1 fd 48 54 c0    	vandpd zmm0,zmm0,zmm0

Init:

MOV R15, 10000;
L: VADDPS ZMM0, ZMM1, ZMM1;
VADDPS ZMM0, ZMM1, ZMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOV [R14+16], RAX;
MOV [R14+24], RAX;
MOV [R14+32], RAX;
MOV [R14+40], RAX;
MOV [R14+48], RAX;
MOV [R14+56], RAX;
VMOVUPD ZMM0, [R14];
VMOVUPD ZMM2, [R14]

Show nanoBench command
Results:
- MPERF: 6.82
- APERF: 8.01
- UOPS: 6.0

Experiment 2

Instruction: VADDPS ZMM1, ZMM0, ZMM2
Chain instructions: VPANDD ZMM0, ZMM1, ZMM1;VPANDD ZMM0, ZMM0, ZMM0;VPANDD ZMM0, ZMM0, ZMM0;VPANDD ZMM0, ZMM0, ZMM0;VPANDD ZMM0, ZMM0, ZMM0
Chain latency: 5

Code:

   0:	62 f1 7c 48 58 ca    	vaddps zmm1,zmm0,zmm2
   6:	62 f1 75 48 db c1    	vpandd zmm0,zmm1,zmm1
   c:	62 f1 7d 48 db c0    	vpandd zmm0,zmm0,zmm0
  12:	62 f1 7d 48 db c0    	vpandd zmm0,zmm0,zmm0
  18:	62 f1 7d 48 db c0    	vpandd zmm0,zmm0,zmm0
  1e:	62 f1 7d 48 db c0    	vpandd zmm0,zmm0,zmm0

Init:

MOV R15, 10000;
L: VADDPS ZMM0, ZMM1, ZMM1;
VADDPS ZMM0, ZMM1, ZMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOV [R14+16], RAX;
MOV [R14+24], RAX;
MOV [R14+32], RAX;
MOV [R14+40], RAX;
MOV [R14+48], RAX;
MOV [R14+56], RAX;
VMOVUPD ZMM0, [R14];
VMOVUPD ZMM2, [R14]

Show nanoBench command
Results:
- MPERF: 7.05
- APERF: 8.0
- UOPS: 6.0

Experiment 3 (source registers initialized by an instruction of the same kind)

Instruction: VADDPS ZMM1, ZMM0, ZMM2
Chain instructions: VANDPD ZMM0, ZMM1, ZMM1;VANDPD ZMM0, ZMM0, ZMM0;VANDPD ZMM0, ZMM0, ZMM0;VANDPD ZMM0, ZMM0, ZMM0;VANDPD ZMM0, ZMM0, ZMM0
Chain latency: 5

Code:

   0:	62 f1 7c 48 58 ca    	vaddps zmm1,zmm0,zmm2
   6:	62 f1 f5 48 54 c1    	vandpd zmm0,zmm1,zmm1
   c:	62 f1 fd 48 54 c0    	vandpd zmm0,zmm0,zmm0
  12:	62 f1 fd 48 54 c0    	vandpd zmm0,zmm0,zmm0
  18:	62 f1 fd 48 54 c0    	vandpd zmm0,zmm0,zmm0
  1e:	62 f1 fd 48 54 c0    	vandpd zmm0,zmm0,zmm0

Init:

MOV R15, 10000;
L: VADDPS ZMM0, ZMM1, ZMM1;
VADDPS ZMM0, ZMM1, ZMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOV [R14+16], RAX;
MOV [R14+24], RAX;
MOV [R14+32], RAX;
MOV [R14+40], RAX;
MOV [R14+48], RAX;
MOV [R14+56], RAX;
VMOVUPD ZMM0, [R14];
VMOVUPD ZMM2, [R14];
VADDPS ZMM0, ZMM1, ZMM2;
VADDPS ZMM2, ZMM0, ZMM1

Show nanoBench command
Results:
- MPERF: 7.05
- APERF: 8.0
- UOPS: 6.0

Experiment 4 (source registers initialized by an instruction of the same kind)

Instruction: VADDPS ZMM1, ZMM0, ZMM2
Chain instructions: VPANDD ZMM0, ZMM1, ZMM1;VPANDD ZMM0, ZMM0, ZMM0;VPANDD ZMM0, ZMM0, ZMM0;VPANDD ZMM0, ZMM0, ZMM0;VPANDD ZMM0, ZMM0, ZMM0
Chain latency: 5

Code:

   0:	62 f1 7c 48 58 ca    	vaddps zmm1,zmm0,zmm2
   6:	62 f1 75 48 db c1    	vpandd zmm0,zmm1,zmm1
   c:	62 f1 7d 48 db c0    	vpandd zmm0,zmm0,zmm0
  12:	62 f1 7d 48 db c0    	vpandd zmm0,zmm0,zmm0
  18:	62 f1 7d 48 db c0    	vpandd zmm0,zmm0,zmm0
  1e:	62 f1 7d 48 db c0    	vpandd zmm0,zmm0,zmm0

Init:

MOV R15, 10000;
L: VADDPS ZMM0, ZMM1, ZMM1;
VADDPS ZMM0, ZMM1, ZMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOV [R14+16], RAX;
MOV [R14+24], RAX;
MOV [R14+32], RAX;
MOV [R14+40], RAX;
MOV [R14+48], RAX;
MOV [R14+56], RAX;
VMOVUPD ZMM0, [R14];
VMOVUPD ZMM2, [R14];
VADDPS ZMM0, ZMM1, ZMM2;
VADDPS ZMM2, ZMM0, ZMM1

Show nanoBench command
Results:
- MPERF: 6.89
- APERF: 8.0
- UOPS: 6.0

Experiment 1

Instruction: VADDPS ZMM1, ZMM2, ZMM0
Chain instructions: VANDPD ZMM0, ZMM1, ZMM1;VANDPD ZMM0, ZMM0, ZMM0;VANDPD ZMM0, ZMM0, ZMM0;VANDPD ZMM0, ZMM0, ZMM0;VANDPD ZMM0, ZMM0, ZMM0
Chain latency: 5

Code:

   0:	62 f1 6c 48 58 c8    	vaddps zmm1,zmm2,zmm0
   6:	62 f1 f5 48 54 c1    	vandpd zmm0,zmm1,zmm1
   c:	62 f1 fd 48 54 c0    	vandpd zmm0,zmm0,zmm0
  12:	62 f1 fd 48 54 c0    	vandpd zmm0,zmm0,zmm0
  18:	62 f1 fd 48 54 c0    	vandpd zmm0,zmm0,zmm0
  1e:	62 f1 fd 48 54 c0    	vandpd zmm0,zmm0,zmm0

Init:

MOV R15, 10000;
L: VADDPS ZMM0, ZMM1, ZMM1;
VADDPS ZMM0, ZMM1, ZMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOV [R14+16], RAX;
MOV [R14+24], RAX;
MOV [R14+32], RAX;
MOV [R14+40], RAX;
MOV [R14+48], RAX;
MOV [R14+56], RAX;
VMOVUPD ZMM2, [R14];
VMOVUPD ZMM0, [R14]

Show nanoBench command
Results:
- MPERF: 6.66
- APERF: 8.0
- UOPS: 6.0

Experiment 2

Instruction: VADDPS ZMM1, ZMM2, ZMM0
Chain instructions: VPANDD ZMM0, ZMM1, ZMM1;VPANDD ZMM0, ZMM0, ZMM0;VPANDD ZMM0, ZMM0, ZMM0;VPANDD ZMM0, ZMM0, ZMM0;VPANDD ZMM0, ZMM0, ZMM0
Chain latency: 5

Code:

   0:	62 f1 6c 48 58 c8    	vaddps zmm1,zmm2,zmm0
   6:	62 f1 75 48 db c1    	vpandd zmm0,zmm1,zmm1
   c:	62 f1 7d 48 db c0    	vpandd zmm0,zmm0,zmm0
  12:	62 f1 7d 48 db c0    	vpandd zmm0,zmm0,zmm0
  18:	62 f1 7d 48 db c0    	vpandd zmm0,zmm0,zmm0
  1e:	62 f1 7d 48 db c0    	vpandd zmm0,zmm0,zmm0

Init:

MOV R15, 10000;
L: VADDPS ZMM0, ZMM1, ZMM1;
VADDPS ZMM0, ZMM1, ZMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOV [R14+16], RAX;
MOV [R14+24], RAX;
MOV [R14+32], RAX;
MOV [R14+40], RAX;
MOV [R14+48], RAX;
MOV [R14+56], RAX;
VMOVUPD ZMM2, [R14];
VMOVUPD ZMM0, [R14]

Show nanoBench command
Results:
- MPERF: 7.05
- APERF: 8.08
- UOPS: 6.0

Experiment 3 (source registers initialized by an instruction of the same kind)

Instruction: VADDPS ZMM1, ZMM2, ZMM0
Chain instructions: VANDPD ZMM0, ZMM1, ZMM1;VANDPD ZMM0, ZMM0, ZMM0;VANDPD ZMM0, ZMM0, ZMM0;VANDPD ZMM0, ZMM0, ZMM0;VANDPD ZMM0, ZMM0, ZMM0
Chain latency: 5

Code:

   0:	62 f1 6c 48 58 c8    	vaddps zmm1,zmm2,zmm0
   6:	62 f1 f5 48 54 c1    	vandpd zmm0,zmm1,zmm1
   c:	62 f1 fd 48 54 c0    	vandpd zmm0,zmm0,zmm0
  12:	62 f1 fd 48 54 c0    	vandpd zmm0,zmm0,zmm0
  18:	62 f1 fd 48 54 c0    	vandpd zmm0,zmm0,zmm0
  1e:	62 f1 fd 48 54 c0    	vandpd zmm0,zmm0,zmm0

Init:

MOV R15, 10000;
L: VADDPS ZMM0, ZMM1, ZMM1;
VADDPS ZMM0, ZMM1, ZMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOV [R14+16], RAX;
MOV [R14+24], RAX;
MOV [R14+32], RAX;
MOV [R14+40], RAX;
MOV [R14+48], RAX;
MOV [R14+56], RAX;
VMOVUPD ZMM2, [R14];
VMOVUPD ZMM0, [R14];
VADDPS ZMM2, ZMM0, ZMM1;
VADDPS ZMM0, ZMM1, ZMM2

Show nanoBench command
Results:
- MPERF: 6.97
- APERF: 8.0
- UOPS: 6.0

Experiment 4 (source registers initialized by an instruction of the same kind)

Instruction: VADDPS ZMM1, ZMM2, ZMM0
Chain instructions: VPANDD ZMM0, ZMM1, ZMM1;VPANDD ZMM0, ZMM0, ZMM0;VPANDD ZMM0, ZMM0, ZMM0;VPANDD ZMM0, ZMM0, ZMM0;VPANDD ZMM0, ZMM0, ZMM0
Chain latency: 5

Code:

   0:	62 f1 6c 48 58 c8    	vaddps zmm1,zmm2,zmm0
   6:	62 f1 75 48 db c1    	vpandd zmm0,zmm1,zmm1
   c:	62 f1 7d 48 db c0    	vpandd zmm0,zmm0,zmm0
  12:	62 f1 7d 48 db c0    	vpandd zmm0,zmm0,zmm0
  18:	62 f1 7d 48 db c0    	vpandd zmm0,zmm0,zmm0
  1e:	62 f1 7d 48 db c0    	vpandd zmm0,zmm0,zmm0

Init:

MOV R15, 10000;
L: VADDPS ZMM0, ZMM1, ZMM1;
VADDPS ZMM0, ZMM1, ZMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOV [R14+16], RAX;
MOV [R14+24], RAX;
MOV [R14+32], RAX;
MOV [R14+40], RAX;
MOV [R14+48], RAX;
MOV [R14+56], RAX;
VMOVUPD ZMM2, [R14];
VMOVUPD ZMM0, [R14];
VADDPS ZMM2, ZMM0, ZMM1;
VADDPS ZMM0, ZMM1, ZMM2

Show nanoBench command
Results:
- MPERF: 6.66
- APERF: 8.0
- UOPS: 6.0

VADDPS (ZMM, ZMM, ZMM) - Latency

Operands

Latency operand 2 → 1: 3

Latency operand 3 → 1: 3

Latency operand 2 → 1: 3

Experiment 1

Experiment 2

Experiment 3 (source registers initialized by an instruction of the same kind)

Experiment 4 (source registers initialized by an instruction of the same kind)

Latency operand 3 → 1: 3

Experiment 1

Experiment 2

Experiment 3 (source registers initialized by an instruction of the same kind)

Experiment 4 (source registers initialized by an instruction of the same kind)