MOVZX (R64, M16) - Latency

Operands

Operand 1 (w): Register (RAX, RCX, RDX, RBX, RSP, RBP, RSI, RDI, R8, R9, R10, R11, R12, R13, R14, R15)
Operand 2 (r): Memory

Latency operand 2 → 1 (address, base register): 4

Latency operand 2 → 1 (address, index register): 4

Latency operand 2 → 1 (memory): ≤5

Latency operand 2 → 1 (address, base register): 4

Experiment 1

Instruction: MOVZX R8, word ptr [R14]
Chain instructions: MOVSX R8, R8D;XOR R14, R8;XOR R14, R8;XOR R14, R8;XOR R14, R8
Chain latency: 5

Code:

   0:	4d 0f b7 06          	movzx  r8,WORD PTR [r14]
   4:	4d 63 c0             	movsxd r8,r8d
   7:	4d 31 c6             	xor    r14,r8
   a:	4d 31 c6             	xor    r14,r8
   d:	4d 31 c6             	xor    r14,r8
  10:	4d 31 c6             	xor    r14,r8

Show nanoBench command
Results:
- MPERF: 7.4
- APERF: 9.0
- UOPS: 6.0

Latency operand 2 → 1 (address, index register): 4

Experiment 1

Instruction: MOVZX R8, word ptr [R14+R13]
Chain instructions: MOVSX R8, R8D;XOR R13, R8;XOR R13, R8;XOR R13, R8;XOR R13, R8
Chain latency: 5

Code:

   0:	4f 0f b7 04 2e       	movzx  r8,WORD PTR [r14+r13*1]
   5:	4d 63 c0             	movsxd r8,r8d
   8:	4d 31 c5             	xor    r13,r8
   b:	4d 31 c5             	xor    r13,r8
   e:	4d 31 c5             	xor    r13,r8
  11:	4d 31 c5             	xor    r13,r8

Init:
```
XOR R13, R13
```
Show nanoBench command
Results:
- MPERF: 7.4
- APERF: 9.0
- UOPS: 6.0

Latency operand 2 → 1 (memory): ≤5

Experiment 1

Instruction: MOVZX R8, word ptr [R14]
Chain instructions: MOVSX R12, R8D;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;mov [R14], R12W
Chain latency: ≥5

Code:

   0:	4d 0f b7 06          	movzx  r8,WORD PTR [r14]
   4:	4d 63 e0             	movsxd r12,r8d
   7:	4d 63 e4             	movsxd r12,r12d
   a:	4d 63 e4             	movsxd r12,r12d
   d:	4d 63 e4             	movsxd r12,r12d
  10:	66 45 89 26          	mov    WORD PTR [r14],r12w

Show nanoBench command
Results:
- MPERF: 8.2
- APERF: 9.99
- UOPS: 6.0