PEXT (R64, R64, R64)

Experiment 1

Instruction: PEXT R9, R8, R10
Chain instruction: PEXT R8, R9, R10

Code:

   0:	c4 42 ba f5 ca       	pext   r9,r8,r10
   5:	c4 42 b2 f5 c2       	pext   r8,r9,r10

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL

Show nanoBench command
Results:
- MPERF: 32.04
- APERF: 38.0
- UOPS: 14.0

Experiment 2

Instruction: PEXT R9, R8, R10
Chain instructions: MOVSX R8, R9D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D
Chain latency: 23

Code:

   0:	c4 42 ba f5 ca       	pext   r9,r8,r10
   5:	4d 63 c1             	movsxd r8,r9d
   8:	4d 63 c0             	movsxd r8,r8d
   b:	4d 63 c0             	movsxd r8,r8d
   e:	4d 63 c0             	movsxd r8,r8d
  11:	4d 63 c0             	movsxd r8,r8d
  14:	4d 63 c0             	movsxd r8,r8d
  17:	4d 63 c0             	movsxd r8,r8d
  1a:	4d 63 c0             	movsxd r8,r8d
  1d:	4d 63 c0             	movsxd r8,r8d
  20:	4d 63 c0             	movsxd r8,r8d
  23:	4d 63 c0             	movsxd r8,r8d
  26:	4d 63 c0             	movsxd r8,r8d
  29:	4d 63 c0             	movsxd r8,r8d
  2c:	4d 63 c0             	movsxd r8,r8d
  2f:	4d 63 c0             	movsxd r8,r8d
  32:	4d 63 c0             	movsxd r8,r8d
  35:	4d 63 c0             	movsxd r8,r8d
  38:	4d 63 c0             	movsxd r8,r8d
  3b:	4d 63 c0             	movsxd r8,r8d
  3e:	4d 63 c0             	movsxd r8,r8d
  41:	4d 63 c0             	movsxd r8,r8d
  44:	4d 63 c0             	movsxd r8,r8d
  47:	4d 63 c0             	movsxd r8,r8d

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL

Show nanoBench command
Results:
- MPERF: 18.0
- APERF: 24.75
- UOPS: 30.0

Experiment 3 (with clean upper 32 bits)

Instruction: PEXT R9, R8, R10
Chain instruction: PEXT R8, R9, R10

Code:

   0:	c4 42 ba f5 ca       	pext   r9,r8,r10
   5:	c4 42 b2 f5 c2       	pext   r8,r9,r10

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV R10D, R10D;

Show nanoBench command
Results:
- MPERF: 32.04
- APERF: 38.0
- UOPS: 14.0

Experiment 4 (with clean upper 32 bits)

Instruction: PEXT R9, R8, R10
Chain instructions: MOVSX R8, R9D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D
Chain latency: 23

Code:

   0:	c4 42 ba f5 ca       	pext   r9,r8,r10
   5:	4d 63 c1             	movsxd r8,r9d
   8:	4d 63 c0             	movsxd r8,r8d
   b:	4d 63 c0             	movsxd r8,r8d
   e:	4d 63 c0             	movsxd r8,r8d
  11:	4d 63 c0             	movsxd r8,r8d
  14:	4d 63 c0             	movsxd r8,r8d
  17:	4d 63 c0             	movsxd r8,r8d
  1a:	4d 63 c0             	movsxd r8,r8d
  1d:	4d 63 c0             	movsxd r8,r8d
  20:	4d 63 c0             	movsxd r8,r8d
  23:	4d 63 c0             	movsxd r8,r8d
  26:	4d 63 c0             	movsxd r8,r8d
  29:	4d 63 c0             	movsxd r8,r8d
  2c:	4d 63 c0             	movsxd r8,r8d
  2f:	4d 63 c0             	movsxd r8,r8d
  32:	4d 63 c0             	movsxd r8,r8d
  35:	4d 63 c0             	movsxd r8,r8d
  38:	4d 63 c0             	movsxd r8,r8d
  3b:	4d 63 c0             	movsxd r8,r8d
  3e:	4d 63 c0             	movsxd r8,r8d
  41:	4d 63 c0             	movsxd r8,r8d
  44:	4d 63 c0             	movsxd r8,r8d
  47:	4d 63 c0             	movsxd r8,r8d

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV R10D, R10D;

Show nanoBench command
Results:
- MPERF: 20.76
- APERF: 24.75
- UOPS: 30.0

Experiment 1

Instruction: PEXT R9, R10, R8
Chain instruction: PEXT R8, R10, R9

Code:

   0:	c4 42 aa f5 c8       	pext   r9,r10,r8
   5:	c4 42 aa f5 c1       	pext   r8,r10,r9

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL

Show nanoBench command
Results:
- MPERF: 32.04
- APERF: 38.0
- UOPS: 14.0

Experiment 2

Instruction: PEXT R9, R10, R8
Chain instructions: MOVSX R8, R9D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D
Chain latency: 23

Code:

   0:	c4 42 aa f5 c8       	pext   r9,r10,r8
   5:	4d 63 c1             	movsxd r8,r9d
   8:	4d 63 c0             	movsxd r8,r8d
   b:	4d 63 c0             	movsxd r8,r8d
   e:	4d 63 c0             	movsxd r8,r8d
  11:	4d 63 c0             	movsxd r8,r8d
  14:	4d 63 c0             	movsxd r8,r8d
  17:	4d 63 c0             	movsxd r8,r8d
  1a:	4d 63 c0             	movsxd r8,r8d
  1d:	4d 63 c0             	movsxd r8,r8d
  20:	4d 63 c0             	movsxd r8,r8d
  23:	4d 63 c0             	movsxd r8,r8d
  26:	4d 63 c0             	movsxd r8,r8d
  29:	4d 63 c0             	movsxd r8,r8d
  2c:	4d 63 c0             	movsxd r8,r8d
  2f:	4d 63 c0             	movsxd r8,r8d
  32:	4d 63 c0             	movsxd r8,r8d
  35:	4d 63 c0             	movsxd r8,r8d
  38:	4d 63 c0             	movsxd r8,r8d
  3b:	4d 63 c0             	movsxd r8,r8d
  3e:	4d 63 c0             	movsxd r8,r8d
  41:	4d 63 c0             	movsxd r8,r8d
  44:	4d 63 c0             	movsxd r8,r8d
  47:	4d 63 c0             	movsxd r8,r8d

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL

Show nanoBench command
Results:
- MPERF: 34.56
- APERF: 41.0
- UOPS: 30.0

Experiment 3 (with clean upper 32 bits)

Instruction: PEXT R9, R10, R8
Chain instruction: PEXT R8, R10, R9

Code:

   0:	c4 42 aa f5 c8       	pext   r9,r10,r8
   5:	c4 42 aa f5 c1       	pext   r8,r10,r9

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV R10D, R10D;

Show nanoBench command
Results:
- MPERF: 32.04
- APERF: 38.0
- UOPS: 14.0

Experiment 4 (with clean upper 32 bits)

Instruction: PEXT R9, R10, R8
Chain instructions: MOVSX R8, R9D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D
Chain latency: 23

Code:

   0:	c4 42 aa f5 c8       	pext   r9,r10,r8
   5:	4d 63 c1             	movsxd r8,r9d
   8:	4d 63 c0             	movsxd r8,r8d
   b:	4d 63 c0             	movsxd r8,r8d
   e:	4d 63 c0             	movsxd r8,r8d
  11:	4d 63 c0             	movsxd r8,r8d
  14:	4d 63 c0             	movsxd r8,r8d
  17:	4d 63 c0             	movsxd r8,r8d
  1a:	4d 63 c0             	movsxd r8,r8d
  1d:	4d 63 c0             	movsxd r8,r8d
  20:	4d 63 c0             	movsxd r8,r8d
  23:	4d 63 c0             	movsxd r8,r8d
  26:	4d 63 c0             	movsxd r8,r8d
  29:	4d 63 c0             	movsxd r8,r8d
  2c:	4d 63 c0             	movsxd r8,r8d
  2f:	4d 63 c0             	movsxd r8,r8d
  32:	4d 63 c0             	movsxd r8,r8d
  35:	4d 63 c0             	movsxd r8,r8d
  38:	4d 63 c0             	movsxd r8,r8d
  3b:	4d 63 c0             	movsxd r8,r8d
  3e:	4d 63 c0             	movsxd r8,r8d
  41:	4d 63 c0             	movsxd r8,r8d
  44:	4d 63 c0             	movsxd r8,r8d
  47:	4d 63 c0             	movsxd r8,r8d

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV R10D, R10D;

Show nanoBench command
Results:
- MPERF: 34.56
- APERF: 41.0
- UOPS: 30.0

PEXT (R64, R64, R64) - Latency

Operands

Latency operand 2 → 1: 1

Latency operand 3 → 1: 18

Latency operand 2 → 1: 1

Experiment 1

Experiment 2

Experiment 3 (with clean upper 32 bits)

Experiment 4 (with clean upper 32 bits)

Latency operand 3 → 1: 18

Experiment 1

Experiment 2

Experiment 3 (with clean upper 32 bits)

Experiment 4 (with clean upper 32 bits)