VMASKMOVPS (YMM, YMM, M256) - Latency


Operands


Latency operand 2 → 1: 20

Latency operand 3 → 1 (address, base register): ≤16

Latency operand 3 → 1 (address, index register): ≤16

Latency operand 3 → 1 (memory): ≤4


Latency operand 2 → 1: 20

Experiment 1

Experiment 2 (source registers initialized by an instruction of the same kind)


Latency operand 3 → 1 (address, base register): ≤16

Experiment 1

Experiment 2 (source registers initialized by an instruction of the same kind)


Latency operand 3 → 1 (address, index register): ≤16

Experiment 1

Experiment 2 (source registers initialized by an instruction of the same kind)


Latency operand 3 → 1 (memory): ≤4

Experiment 1

Experiment 2 (source registers initialized by an instruction of the same kind)