PEXT (R32, R32, M32) - Latency


Operands


Latency operand 2 → 1: 0

Latency operand 3 → 1 (address, base register): 21

Latency operand 3 → 1 (address, index register): 21

Latency operand 3 → 1 (memory): ≤23


Latency operand 2 → 1: 0

Experiment 1

Experiment 2


Latency operand 3 → 1 (address, base register): 21

Experiment 1

Experiment 2 (with clean upper 32 bits)


Latency operand 3 → 1 (address, index register): 21

Experiment 1

Experiment 2 (with clean upper 32 bits)


Latency operand 3 → 1 (memory): ≤23

Experiment 1

Experiment 2 (with clean upper 32 bits)