BZHI (R32, M32, R32) - Latency


Operands


Latency operand 2 → 1 (address, base register): 5

Latency operand 2 → 1 (address, index register): 5

Latency operand 2 → 1 (memory): ≤7

Latency operand 2 → 4 (address, base register): 5

Latency operand 2 → 4 (address, index register): 5

Latency operand 2 → 4 (memory): ≤7

Latency operand 3 → 1: 1

Latency operand 3 → 4: 1


Latency operand 2 → 1 (address, base register): 5

Experiment 1


Latency operand 2 → 1 (address, index register): 5

Experiment 1


Latency operand 2 → 1 (memory): ≤7

Experiment 1


Latency operand 2 → 4 (address, base register): 5

Experiment 1

Experiment 2

Experiment 3

Experiment 4


Latency operand 2 → 4 (address, index register): 5

Experiment 1

Experiment 2

Experiment 3

Experiment 4


Latency operand 2 → 4 (memory): ≤7

Experiment 1

Experiment 2

Experiment 3

Experiment 4


Latency operand 3 → 1: 1

Experiment 1


Latency operand 3 → 4: 1

Experiment 1

Experiment 2

Experiment 3

Experiment 4