DIV (M64)

Experiment 1 (fast division)

Instruction: DIV qword ptr [R14]
Chain instructions: MOVSX R12, EAX; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; ; MOV RAX, R8;MOV RDX, R9
Chain latency: 29

Code:

   0:	49 f7 36             	div    QWORD PTR [r14]
   3:	4c 63 e0             	movsxd r12,eax
   6:	4d 31 e6             	xor    r14,r12
   9:	4d 31 e6             	xor    r14,r12
   c:	4d 31 e6             	xor    r14,r12
   f:	4d 31 e6             	xor    r14,r12
  12:	4d 31 e6             	xor    r14,r12
  15:	4d 31 e6             	xor    r14,r12
  18:	4d 31 e6             	xor    r14,r12
  1b:	4d 31 e6             	xor    r14,r12
  1e:	4d 31 e6             	xor    r14,r12
  21:	4d 31 e6             	xor    r14,r12
  24:	4d 31 e6             	xor    r14,r12
  27:	4d 31 e6             	xor    r14,r12
  2a:	4d 31 e6             	xor    r14,r12
  2d:	4d 31 e6             	xor    r14,r12
  30:	4d 31 e6             	xor    r14,r12
  33:	4d 31 e6             	xor    r14,r12
  36:	4d 31 e6             	xor    r14,r12
  39:	4d 31 e6             	xor    r14,r12
  3c:	4d 31 e6             	xor    r14,r12
  3f:	4d 31 e6             	xor    r14,r12
  42:	4d 31 e6             	xor    r14,r12
  45:	4d 31 e6             	xor    r14,r12
  48:	4d 31 e6             	xor    r14,r12
  4b:	4d 31 e6             	xor    r14,r12
  4e:	4d 31 e6             	xor    r14,r12
  51:	4d 31 e6             	xor    r14,r12
  54:	4d 31 e6             	xor    r14,r12
  57:	4d 31 e6             	xor    r14,r12
  5a:	4c 89 c0             	mov    rax,r8
  5d:	4c 89 ca             	mov    rdx,r9

Init:

MOV R8, 0;
MOV R9, 0;
MOV RCX, 1;
MOV [R14], RCX;
MOV RAX, R8;
MOV RDX, R9

Show nanoBench command
Results:
- Instructions retired: 32.0
- Core cycles: 60.33
- Reference cycles: 55.72
- UOPS_RETIRED.ANY: 63.0

Experiment 2 (slow division)

Instruction: DIV qword ptr [R14]
Chain instructions: MOVSX R12, EAX; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; ; MOV RAX, R8;MOV RDX, R9
Chain latency: 29

Code:

   0:	49 f7 36             	div    QWORD PTR [r14]
   3:	4c 63 e0             	movsxd r12,eax
   6:	4d 31 e6             	xor    r14,r12
   9:	4d 31 e6             	xor    r14,r12
   c:	4d 31 e6             	xor    r14,r12
   f:	4d 31 e6             	xor    r14,r12
  12:	4d 31 e6             	xor    r14,r12
  15:	4d 31 e6             	xor    r14,r12
  18:	4d 31 e6             	xor    r14,r12
  1b:	4d 31 e6             	xor    r14,r12
  1e:	4d 31 e6             	xor    r14,r12
  21:	4d 31 e6             	xor    r14,r12
  24:	4d 31 e6             	xor    r14,r12
  27:	4d 31 e6             	xor    r14,r12
  2a:	4d 31 e6             	xor    r14,r12
  2d:	4d 31 e6             	xor    r14,r12
  30:	4d 31 e6             	xor    r14,r12
  33:	4d 31 e6             	xor    r14,r12
  36:	4d 31 e6             	xor    r14,r12
  39:	4d 31 e6             	xor    r14,r12
  3c:	4d 31 e6             	xor    r14,r12
  3f:	4d 31 e6             	xor    r14,r12
  42:	4d 31 e6             	xor    r14,r12
  45:	4d 31 e6             	xor    r14,r12
  48:	4d 31 e6             	xor    r14,r12
  4b:	4d 31 e6             	xor    r14,r12
  4e:	4d 31 e6             	xor    r14,r12
  51:	4d 31 e6             	xor    r14,r12
  54:	4d 31 e6             	xor    r14,r12
  57:	4d 31 e6             	xor    r14,r12
  5a:	4c 89 c0             	mov    rax,r8
  5d:	4c 89 ca             	mov    rdx,r9

Init:

MOV R8, 133;
MOV R9, 0x343a9ed744556677;
MOV RCX, 0x75e6e44fccddeeff;
MOV [R14], RCX;
MOV RAX, R8;
MOV RDX, R9

Show nanoBench command
Results:
- Instructions retired: 32.0
- Core cycles: 118.66
- Reference cycles: 109.44
- UOPS_RETIRED.ANY: 71.0

Latency operand 1 → 2 (address, index register): 31 ≤ lat ≤ 89

Experiment 1 (fast division)

Instruction: DIV qword ptr [R14]
Chain instructions: MOVSX R12, EAX; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; ; MOV RAX, R8;MOV RDX, R9
Chain latency: 29

Code:

   0:	49 f7 36             	div    QWORD PTR [r14]
   3:	4c 63 e0             	movsxd r12,eax
   6:	4d 31 e6             	xor    r14,r12
   9:	4d 31 e6             	xor    r14,r12
   c:	4d 31 e6             	xor    r14,r12
   f:	4d 31 e6             	xor    r14,r12
  12:	4d 31 e6             	xor    r14,r12
  15:	4d 31 e6             	xor    r14,r12
  18:	4d 31 e6             	xor    r14,r12
  1b:	4d 31 e6             	xor    r14,r12
  1e:	4d 31 e6             	xor    r14,r12
  21:	4d 31 e6             	xor    r14,r12
  24:	4d 31 e6             	xor    r14,r12
  27:	4d 31 e6             	xor    r14,r12
  2a:	4d 31 e6             	xor    r14,r12
  2d:	4d 31 e6             	xor    r14,r12
  30:	4d 31 e6             	xor    r14,r12
  33:	4d 31 e6             	xor    r14,r12
  36:	4d 31 e6             	xor    r14,r12
  39:	4d 31 e6             	xor    r14,r12
  3c:	4d 31 e6             	xor    r14,r12
  3f:	4d 31 e6             	xor    r14,r12
  42:	4d 31 e6             	xor    r14,r12
  45:	4d 31 e6             	xor    r14,r12
  48:	4d 31 e6             	xor    r14,r12
  4b:	4d 31 e6             	xor    r14,r12
  4e:	4d 31 e6             	xor    r14,r12
  51:	4d 31 e6             	xor    r14,r12
  54:	4d 31 e6             	xor    r14,r12
  57:	4d 31 e6             	xor    r14,r12
  5a:	4c 89 c0             	mov    rax,r8
  5d:	4c 89 ca             	mov    rdx,r9

Init:

MOV R8, 0;
MOV R9, 0;
MOV RCX, 1;
MOV [R14], RCX;
MOV RAX, R8;
MOV RDX, R9

Show nanoBench command
Results:
- Instructions retired: 32.0
- Core cycles: 60.33
- Reference cycles: 55.64
- UOPS_RETIRED.ANY: 63.0

Experiment 2 (slow division)

Instruction: DIV qword ptr [R14]
Chain instructions: MOVSX R12, EAX; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; ; MOV RAX, R8;MOV RDX, R9
Chain latency: 29

Code:

   0:	49 f7 36             	div    QWORD PTR [r14]
   3:	4c 63 e0             	movsxd r12,eax
   6:	4d 31 e6             	xor    r14,r12
   9:	4d 31 e6             	xor    r14,r12
   c:	4d 31 e6             	xor    r14,r12
   f:	4d 31 e6             	xor    r14,r12
  12:	4d 31 e6             	xor    r14,r12
  15:	4d 31 e6             	xor    r14,r12
  18:	4d 31 e6             	xor    r14,r12
  1b:	4d 31 e6             	xor    r14,r12
  1e:	4d 31 e6             	xor    r14,r12
  21:	4d 31 e6             	xor    r14,r12
  24:	4d 31 e6             	xor    r14,r12
  27:	4d 31 e6             	xor    r14,r12
  2a:	4d 31 e6             	xor    r14,r12
  2d:	4d 31 e6             	xor    r14,r12
  30:	4d 31 e6             	xor    r14,r12
  33:	4d 31 e6             	xor    r14,r12
  36:	4d 31 e6             	xor    r14,r12
  39:	4d 31 e6             	xor    r14,r12
  3c:	4d 31 e6             	xor    r14,r12
  3f:	4d 31 e6             	xor    r14,r12
  42:	4d 31 e6             	xor    r14,r12
  45:	4d 31 e6             	xor    r14,r12
  48:	4d 31 e6             	xor    r14,r12
  4b:	4d 31 e6             	xor    r14,r12
  4e:	4d 31 e6             	xor    r14,r12
  51:	4d 31 e6             	xor    r14,r12
  54:	4d 31 e6             	xor    r14,r12
  57:	4d 31 e6             	xor    r14,r12
  5a:	4c 89 c0             	mov    rax,r8
  5d:	4c 89 ca             	mov    rdx,r9

Init:

MOV R8, 133;
MOV R9, 0x343a9ed744556677;
MOV RCX, 0x75e6e44fccddeeff;
MOV [R14], RCX;
MOV RAX, R8;
MOV RDX, R9

Show nanoBench command
Results:
- Instructions retired: 32.0
- Core cycles: 118.66
- Reference cycles: 109.48
- UOPS_RETIRED.ANY: 71.0

Latency operand 1 → 3 (address, base register): 29 ≤ lat ≤ 88

Experiment 1 (fast division)

Instruction: DIV qword ptr [R14]
Chain instructions: MOVSX R12, EDX; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; ; MOV RAX, R8;MOV RDX, R9
Chain latency: 29

Code:

   0:	49 f7 36             	div    QWORD PTR [r14]
   3:	4c 63 e2             	movsxd r12,edx
   6:	4d 31 e6             	xor    r14,r12
   9:	4d 31 e6             	xor    r14,r12
   c:	4d 31 e6             	xor    r14,r12
   f:	4d 31 e6             	xor    r14,r12
  12:	4d 31 e6             	xor    r14,r12
  15:	4d 31 e6             	xor    r14,r12
  18:	4d 31 e6             	xor    r14,r12
  1b:	4d 31 e6             	xor    r14,r12
  1e:	4d 31 e6             	xor    r14,r12
  21:	4d 31 e6             	xor    r14,r12
  24:	4d 31 e6             	xor    r14,r12
  27:	4d 31 e6             	xor    r14,r12
  2a:	4d 31 e6             	xor    r14,r12
  2d:	4d 31 e6             	xor    r14,r12
  30:	4d 31 e6             	xor    r14,r12
  33:	4d 31 e6             	xor    r14,r12
  36:	4d 31 e6             	xor    r14,r12
  39:	4d 31 e6             	xor    r14,r12
  3c:	4d 31 e6             	xor    r14,r12
  3f:	4d 31 e6             	xor    r14,r12
  42:	4d 31 e6             	xor    r14,r12
  45:	4d 31 e6             	xor    r14,r12
  48:	4d 31 e6             	xor    r14,r12
  4b:	4d 31 e6             	xor    r14,r12
  4e:	4d 31 e6             	xor    r14,r12
  51:	4d 31 e6             	xor    r14,r12
  54:	4d 31 e6             	xor    r14,r12
  57:	4d 31 e6             	xor    r14,r12
  5a:	4c 89 c0             	mov    rax,r8
  5d:	4c 89 ca             	mov    rdx,r9

Init:

MOV R8, 0;
MOV R9, 0;
MOV RCX, 1;
MOV [R14], RCX;
MOV RAX, R8;
MOV RDX, R9

Show nanoBench command
Results:
- Instructions retired: 32.0
- Core cycles: 58.05
- Reference cycles: 53.6
- UOPS_RETIRED.ANY: 63.0

Experiment 2 (slow division)

Instruction: DIV qword ptr [R14]
Chain instructions: MOVSX R12, EDX; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; ; MOV RAX, R8;MOV RDX, R9
Chain latency: 29

Code:

   0:	49 f7 36             	div    QWORD PTR [r14]
   3:	4c 63 e2             	movsxd r12,edx
   6:	4d 31 e6             	xor    r14,r12
   9:	4d 31 e6             	xor    r14,r12
   c:	4d 31 e6             	xor    r14,r12
   f:	4d 31 e6             	xor    r14,r12
  12:	4d 31 e6             	xor    r14,r12
  15:	4d 31 e6             	xor    r14,r12
  18:	4d 31 e6             	xor    r14,r12
  1b:	4d 31 e6             	xor    r14,r12
  1e:	4d 31 e6             	xor    r14,r12
  21:	4d 31 e6             	xor    r14,r12
  24:	4d 31 e6             	xor    r14,r12
  27:	4d 31 e6             	xor    r14,r12
  2a:	4d 31 e6             	xor    r14,r12
  2d:	4d 31 e6             	xor    r14,r12
  30:	4d 31 e6             	xor    r14,r12
  33:	4d 31 e6             	xor    r14,r12
  36:	4d 31 e6             	xor    r14,r12
  39:	4d 31 e6             	xor    r14,r12
  3c:	4d 31 e6             	xor    r14,r12
  3f:	4d 31 e6             	xor    r14,r12
  42:	4d 31 e6             	xor    r14,r12
  45:	4d 31 e6             	xor    r14,r12
  48:	4d 31 e6             	xor    r14,r12
  4b:	4d 31 e6             	xor    r14,r12
  4e:	4d 31 e6             	xor    r14,r12
  51:	4d 31 e6             	xor    r14,r12
  54:	4d 31 e6             	xor    r14,r12
  57:	4d 31 e6             	xor    r14,r12
  5a:	4c 89 c0             	mov    rax,r8
  5d:	4c 89 ca             	mov    rdx,r9

Init:

MOV R8, 133;
MOV R9, 0x343a9ed744556677;
MOV RCX, 0x75e6e44fccddeeff;
MOV [R14], RCX;
MOV RAX, R8;
MOV RDX, R9

Show nanoBench command
Results:
- Instructions retired: 32.0
- Core cycles: 117.34
- Reference cycles: 108.32
- UOPS_RETIRED.ANY: 71.0

Latency operand 1 → 3 (address, index register): 29 ≤ lat ≤ 88

Experiment 1 (fast division)

Instruction: DIV qword ptr [R14]
Chain instructions: MOVSX R12, EDX; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; ; MOV RAX, R8;MOV RDX, R9
Chain latency: 29

Code:

   0:	49 f7 36             	div    QWORD PTR [r14]
   3:	4c 63 e2             	movsxd r12,edx
   6:	4d 31 e6             	xor    r14,r12
   9:	4d 31 e6             	xor    r14,r12
   c:	4d 31 e6             	xor    r14,r12
   f:	4d 31 e6             	xor    r14,r12
  12:	4d 31 e6             	xor    r14,r12
  15:	4d 31 e6             	xor    r14,r12
  18:	4d 31 e6             	xor    r14,r12
  1b:	4d 31 e6             	xor    r14,r12
  1e:	4d 31 e6             	xor    r14,r12
  21:	4d 31 e6             	xor    r14,r12
  24:	4d 31 e6             	xor    r14,r12
  27:	4d 31 e6             	xor    r14,r12
  2a:	4d 31 e6             	xor    r14,r12
  2d:	4d 31 e6             	xor    r14,r12
  30:	4d 31 e6             	xor    r14,r12
  33:	4d 31 e6             	xor    r14,r12
  36:	4d 31 e6             	xor    r14,r12
  39:	4d 31 e6             	xor    r14,r12
  3c:	4d 31 e6             	xor    r14,r12
  3f:	4d 31 e6             	xor    r14,r12
  42:	4d 31 e6             	xor    r14,r12
  45:	4d 31 e6             	xor    r14,r12
  48:	4d 31 e6             	xor    r14,r12
  4b:	4d 31 e6             	xor    r14,r12
  4e:	4d 31 e6             	xor    r14,r12
  51:	4d 31 e6             	xor    r14,r12
  54:	4d 31 e6             	xor    r14,r12
  57:	4d 31 e6             	xor    r14,r12
  5a:	4c 89 c0             	mov    rax,r8
  5d:	4c 89 ca             	mov    rdx,r9

Init:

MOV R8, 0;
MOV R9, 0;
MOV RCX, 1;
MOV [R14], RCX;
MOV RAX, R8;
MOV RDX, R9

Show nanoBench command
Results:
- Instructions retired: 32.0
- Core cycles: 58.05
- Reference cycles: 53.64
- UOPS_RETIRED.ANY: 63.0

Experiment 2 (slow division)

Instruction: DIV qword ptr [R14]
Chain instructions: MOVSX R12, EDX; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; XOR R14, R12; ; MOV RAX, R8;MOV RDX, R9
Chain latency: 29

Code:

   0:	49 f7 36             	div    QWORD PTR [r14]
   3:	4c 63 e2             	movsxd r12,edx
   6:	4d 31 e6             	xor    r14,r12
   9:	4d 31 e6             	xor    r14,r12
   c:	4d 31 e6             	xor    r14,r12
   f:	4d 31 e6             	xor    r14,r12
  12:	4d 31 e6             	xor    r14,r12
  15:	4d 31 e6             	xor    r14,r12
  18:	4d 31 e6             	xor    r14,r12
  1b:	4d 31 e6             	xor    r14,r12
  1e:	4d 31 e6             	xor    r14,r12
  21:	4d 31 e6             	xor    r14,r12
  24:	4d 31 e6             	xor    r14,r12
  27:	4d 31 e6             	xor    r14,r12
  2a:	4d 31 e6             	xor    r14,r12
  2d:	4d 31 e6             	xor    r14,r12
  30:	4d 31 e6             	xor    r14,r12
  33:	4d 31 e6             	xor    r14,r12
  36:	4d 31 e6             	xor    r14,r12
  39:	4d 31 e6             	xor    r14,r12
  3c:	4d 31 e6             	xor    r14,r12
  3f:	4d 31 e6             	xor    r14,r12
  42:	4d 31 e6             	xor    r14,r12
  45:	4d 31 e6             	xor    r14,r12
  48:	4d 31 e6             	xor    r14,r12
  4b:	4d 31 e6             	xor    r14,r12
  4e:	4d 31 e6             	xor    r14,r12
  51:	4d 31 e6             	xor    r14,r12
  54:	4d 31 e6             	xor    r14,r12
  57:	4d 31 e6             	xor    r14,r12
  5a:	4c 89 c0             	mov    rax,r8
  5d:	4c 89 ca             	mov    rdx,r9

Init:

MOV R8, 133;
MOV R9, 0x343a9ed744556677;
MOV RCX, 0x75e6e44fccddeeff;
MOV [R14], RCX;
MOV RAX, R8;
MOV RDX, R9

Show nanoBench command
Results:
- Instructions retired: 32.0
- Core cycles: 117.34
- Reference cycles: 108.24
- UOPS_RETIRED.ANY: 71.0

Latency operand 2 → 2: 28 ≤ lat ≤ 87

Experiment 1 (fast division)

Instruction: DIV qword ptr [R14]
Chain instructions: AND RAX, R8; OR RAX, R8; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; ; MOV RDX, R9
Chain latency: 30

Code:

   0:	49 f7 36             	div    QWORD PTR [r14]
   3:	4c 21 c0             	and    rax,r8
   6:	4c 09 c0             	or     rax,r8
   9:	48 09 c0             	or     rax,rax
   c:	48 09 c0             	or     rax,rax
   f:	48 09 c0             	or     rax,rax
  12:	48 09 c0             	or     rax,rax
  15:	48 09 c0             	or     rax,rax
  18:	48 09 c0             	or     rax,rax
  1b:	48 09 c0             	or     rax,rax
  1e:	48 09 c0             	or     rax,rax
  21:	48 09 c0             	or     rax,rax
  24:	48 09 c0             	or     rax,rax
  27:	48 09 c0             	or     rax,rax
  2a:	48 09 c0             	or     rax,rax
  2d:	48 09 c0             	or     rax,rax
  30:	48 09 c0             	or     rax,rax
  33:	48 09 c0             	or     rax,rax
  36:	48 09 c0             	or     rax,rax
  39:	48 09 c0             	or     rax,rax
  3c:	48 09 c0             	or     rax,rax
  3f:	48 09 c0             	or     rax,rax
  42:	48 09 c0             	or     rax,rax
  45:	48 09 c0             	or     rax,rax
  48:	48 09 c0             	or     rax,rax
  4b:	48 09 c0             	or     rax,rax
  4e:	48 09 c0             	or     rax,rax
  51:	48 09 c0             	or     rax,rax
  54:	48 09 c0             	or     rax,rax
  57:	48 09 c0             	or     rax,rax
  5a:	48 09 c0             	or     rax,rax
  5d:	4c 89 ca             	mov    rdx,r9

Init:

MOV R8, 0;
MOV R9, 0;
MOV RCX, 1;
MOV [R14], RCX;
MOV RAX, R8;
MOV RDX, R9

Show nanoBench command
Results:
- Instructions retired: 32.0
- Core cycles: 58.0
- Reference cycles: 53.44
- UOPS_RETIRED.ANY: 63.0

Experiment 2 (slow division)

Instruction: DIV qword ptr [R14]
Chain instructions: AND RAX, R8; OR RAX, R8; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; ; MOV RDX, R9
Chain latency: 30

Code:

   0:	49 f7 36             	div    QWORD PTR [r14]
   3:	4c 21 c0             	and    rax,r8
   6:	4c 09 c0             	or     rax,r8
   9:	48 09 c0             	or     rax,rax
   c:	48 09 c0             	or     rax,rax
   f:	48 09 c0             	or     rax,rax
  12:	48 09 c0             	or     rax,rax
  15:	48 09 c0             	or     rax,rax
  18:	48 09 c0             	or     rax,rax
  1b:	48 09 c0             	or     rax,rax
  1e:	48 09 c0             	or     rax,rax
  21:	48 09 c0             	or     rax,rax
  24:	48 09 c0             	or     rax,rax
  27:	48 09 c0             	or     rax,rax
  2a:	48 09 c0             	or     rax,rax
  2d:	48 09 c0             	or     rax,rax
  30:	48 09 c0             	or     rax,rax
  33:	48 09 c0             	or     rax,rax
  36:	48 09 c0             	or     rax,rax
  39:	48 09 c0             	or     rax,rax
  3c:	48 09 c0             	or     rax,rax
  3f:	48 09 c0             	or     rax,rax
  42:	48 09 c0             	or     rax,rax
  45:	48 09 c0             	or     rax,rax
  48:	48 09 c0             	or     rax,rax
  4b:	48 09 c0             	or     rax,rax
  4e:	48 09 c0             	or     rax,rax
  51:	48 09 c0             	or     rax,rax
  54:	48 09 c0             	or     rax,rax
  57:	48 09 c0             	or     rax,rax
  5a:	48 09 c0             	or     rax,rax
  5d:	4c 89 ca             	mov    rdx,r9

Init:

MOV R8, 133;
MOV R9, 0x343a9ed744556677;
MOV RCX, 0x75e6e44fccddeeff;
MOV [R14], RCX;
MOV RAX, R8;
MOV RDX, R9

Show nanoBench command
Results:
- Instructions retired: 32.0
- Core cycles: 117.28
- Reference cycles: 108.2
- UOPS_RETIRED.ANY: 71.0

Latency operand 2 → 3: 28 ≤ lat ≤ 87

Experiment 1 (fast division)

Instruction: DIV qword ptr [R14]
Chain instructions: AND RAX, RDX; AND RAX, R8; OR RAX, R8; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; ; MOV RDX, R9
Chain latency: 31

Code:

   0:	49 f7 36             	div    QWORD PTR [r14]
   3:	48 21 d0             	and    rax,rdx
   6:	4c 21 c0             	and    rax,r8
   9:	4c 09 c0             	or     rax,r8
   c:	48 09 c0             	or     rax,rax
   f:	48 09 c0             	or     rax,rax
  12:	48 09 c0             	or     rax,rax
  15:	48 09 c0             	or     rax,rax
  18:	48 09 c0             	or     rax,rax
  1b:	48 09 c0             	or     rax,rax
  1e:	48 09 c0             	or     rax,rax
  21:	48 09 c0             	or     rax,rax
  24:	48 09 c0             	or     rax,rax
  27:	48 09 c0             	or     rax,rax
  2a:	48 09 c0             	or     rax,rax
  2d:	48 09 c0             	or     rax,rax
  30:	48 09 c0             	or     rax,rax
  33:	48 09 c0             	or     rax,rax
  36:	48 09 c0             	or     rax,rax
  39:	48 09 c0             	or     rax,rax
  3c:	48 09 c0             	or     rax,rax
  3f:	48 09 c0             	or     rax,rax
  42:	48 09 c0             	or     rax,rax
  45:	48 09 c0             	or     rax,rax
  48:	48 09 c0             	or     rax,rax
  4b:	48 09 c0             	or     rax,rax
  4e:	48 09 c0             	or     rax,rax
  51:	48 09 c0             	or     rax,rax
  54:	48 09 c0             	or     rax,rax
  57:	48 09 c0             	or     rax,rax
  5a:	48 09 c0             	or     rax,rax
  5d:	48 09 c0             	or     rax,rax
  60:	4c 89 ca             	mov    rdx,r9

Init:

MOV R8, 0;
MOV R9, 0;
MOV RCX, 1;
MOV [R14], RCX;
MOV RAX, R8;
MOV RDX, R9

Show nanoBench command
Results:
- Instructions retired: 33.0
- Core cycles: 59.13
- Reference cycles: 54.6
- UOPS_RETIRED.ANY: 64.0

Experiment 2 (slow division)

Instruction: DIV qword ptr [R14]
Chain instructions: AND RAX, RDX; AND RAX, R8; OR RAX, R8; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; OR RAX, RAX; ; MOV RDX, R9
Chain latency: 31

Code:

   0:	49 f7 36             	div    QWORD PTR [r14]
   3:	48 21 d0             	and    rax,rdx
   6:	4c 21 c0             	and    rax,r8
   9:	4c 09 c0             	or     rax,r8
   c:	48 09 c0             	or     rax,rax
   f:	48 09 c0             	or     rax,rax
  12:	48 09 c0             	or     rax,rax
  15:	48 09 c0             	or     rax,rax
  18:	48 09 c0             	or     rax,rax
  1b:	48 09 c0             	or     rax,rax
  1e:	48 09 c0             	or     rax,rax
  21:	48 09 c0             	or     rax,rax
  24:	48 09 c0             	or     rax,rax
  27:	48 09 c0             	or     rax,rax
  2a:	48 09 c0             	or     rax,rax
  2d:	48 09 c0             	or     rax,rax
  30:	48 09 c0             	or     rax,rax
  33:	48 09 c0             	or     rax,rax
  36:	48 09 c0             	or     rax,rax
  39:	48 09 c0             	or     rax,rax
  3c:	48 09 c0             	or     rax,rax
  3f:	48 09 c0             	or     rax,rax
  42:	48 09 c0             	or     rax,rax
  45:	48 09 c0             	or     rax,rax
  48:	48 09 c0             	or     rax,rax
  4b:	48 09 c0             	or     rax,rax
  4e:	48 09 c0             	or     rax,rax
  51:	48 09 c0             	or     rax,rax
  54:	48 09 c0             	or     rax,rax
  57:	48 09 c0             	or     rax,rax
  5a:	48 09 c0             	or     rax,rax
  5d:	48 09 c0             	or     rax,rax
  60:	4c 89 ca             	mov    rdx,r9

Init:

MOV R8, 133;
MOV R9, 0x343a9ed744556677;
MOV RCX, 0x75e6e44fccddeeff;
MOV [R14], RCX;
MOV RAX, R8;
MOV RDX, R9

Show nanoBench command
Results:
- Instructions retired: 33.0
- Core cycles: 118.16
- Reference cycles: 109.12
- UOPS_RETIRED.ANY: 72.0

Latency operand 3 → 2: 10 ≤ lat ≤ 82

Experiment 1 (fast division)

Instruction: DIV qword ptr [R14]
Chain instructions: AND RDX, RAX; AND RDX, R9; OR RDX, R9; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; ; MOV RAX, R8
Chain latency: 31

Code:

   0:	49 f7 36             	div    QWORD PTR [r14]
   3:	48 21 c2             	and    rdx,rax
   6:	4c 21 ca             	and    rdx,r9
   9:	4c 09 ca             	or     rdx,r9
   c:	48 09 d2             	or     rdx,rdx
   f:	48 09 d2             	or     rdx,rdx
  12:	48 09 d2             	or     rdx,rdx
  15:	48 09 d2             	or     rdx,rdx
  18:	48 09 d2             	or     rdx,rdx
  1b:	48 09 d2             	or     rdx,rdx
  1e:	48 09 d2             	or     rdx,rdx
  21:	48 09 d2             	or     rdx,rdx
  24:	48 09 d2             	or     rdx,rdx
  27:	48 09 d2             	or     rdx,rdx
  2a:	48 09 d2             	or     rdx,rdx
  2d:	48 09 d2             	or     rdx,rdx
  30:	48 09 d2             	or     rdx,rdx
  33:	48 09 d2             	or     rdx,rdx
  36:	48 09 d2             	or     rdx,rdx
  39:	48 09 d2             	or     rdx,rdx
  3c:	48 09 d2             	or     rdx,rdx
  3f:	48 09 d2             	or     rdx,rdx
  42:	48 09 d2             	or     rdx,rdx
  45:	48 09 d2             	or     rdx,rdx
  48:	48 09 d2             	or     rdx,rdx
  4b:	48 09 d2             	or     rdx,rdx
  4e:	48 09 d2             	or     rdx,rdx
  51:	48 09 d2             	or     rdx,rdx
  54:	48 09 d2             	or     rdx,rdx
  57:	48 09 d2             	or     rdx,rdx
  5a:	48 09 d2             	or     rdx,rdx
  5d:	48 09 d2             	or     rdx,rdx
  60:	4c 89 c0             	mov    rax,r8

Init:

MOV R8, 0;
MOV R9, 0;
MOV RCX, 1;
MOV [R14], RCX;
MOV RAX, R8;
MOV RDX, R9

Show nanoBench command
Results:
- Instructions retired: 33.0
- Core cycles: 40.96
- Reference cycles: 37.8
- UOPS_RETIRED.ANY: 64.0

Experiment 2 (slow division)

Instruction: DIV qword ptr [R14]
Chain instructions: AND RDX, RAX; AND RDX, R9; OR RDX, R9; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; ; MOV RAX, R8
Chain latency: 31

Code:

   0:	49 f7 36             	div    QWORD PTR [r14]
   3:	48 21 c2             	and    rdx,rax
   6:	4c 21 ca             	and    rdx,r9
   9:	4c 09 ca             	or     rdx,r9
   c:	48 09 d2             	or     rdx,rdx
   f:	48 09 d2             	or     rdx,rdx
  12:	48 09 d2             	or     rdx,rdx
  15:	48 09 d2             	or     rdx,rdx
  18:	48 09 d2             	or     rdx,rdx
  1b:	48 09 d2             	or     rdx,rdx
  1e:	48 09 d2             	or     rdx,rdx
  21:	48 09 d2             	or     rdx,rdx
  24:	48 09 d2             	or     rdx,rdx
  27:	48 09 d2             	or     rdx,rdx
  2a:	48 09 d2             	or     rdx,rdx
  2d:	48 09 d2             	or     rdx,rdx
  30:	48 09 d2             	or     rdx,rdx
  33:	48 09 d2             	or     rdx,rdx
  36:	48 09 d2             	or     rdx,rdx
  39:	48 09 d2             	or     rdx,rdx
  3c:	48 09 d2             	or     rdx,rdx
  3f:	48 09 d2             	or     rdx,rdx
  42:	48 09 d2             	or     rdx,rdx
  45:	48 09 d2             	or     rdx,rdx
  48:	48 09 d2             	or     rdx,rdx
  4b:	48 09 d2             	or     rdx,rdx
  4e:	48 09 d2             	or     rdx,rdx
  51:	48 09 d2             	or     rdx,rdx
  54:	48 09 d2             	or     rdx,rdx
  57:	48 09 d2             	or     rdx,rdx
  5a:	48 09 d2             	or     rdx,rdx
  5d:	48 09 d2             	or     rdx,rdx
  60:	4c 89 c0             	mov    rax,r8

Init:

MOV R8, 133;
MOV R9, 0x343a9ed744556677;
MOV RCX, 0x75e6e44fccddeeff;
MOV [R14], RCX;
MOV RAX, R8;
MOV RDX, R9

Show nanoBench command
Results:
- Instructions retired: 33.0
- Core cycles: 112.91
- Reference cycles: 104.2
- UOPS_RETIRED.ANY: 72.0

Latency operand 3 → 3: 9 ≤ lat ≤ 78

Experiment 1 (fast division)

Instruction: DIV qword ptr [R14]
Chain instructions: AND RDX, R9; OR RDX, R9; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; ; MOV RAX, R8
Chain latency: 30

Code:

   0:	49 f7 36             	div    QWORD PTR [r14]
   3:	4c 21 ca             	and    rdx,r9
   6:	4c 09 ca             	or     rdx,r9
   9:	48 09 d2             	or     rdx,rdx
   c:	48 09 d2             	or     rdx,rdx
   f:	48 09 d2             	or     rdx,rdx
  12:	48 09 d2             	or     rdx,rdx
  15:	48 09 d2             	or     rdx,rdx
  18:	48 09 d2             	or     rdx,rdx
  1b:	48 09 d2             	or     rdx,rdx
  1e:	48 09 d2             	or     rdx,rdx
  21:	48 09 d2             	or     rdx,rdx
  24:	48 09 d2             	or     rdx,rdx
  27:	48 09 d2             	or     rdx,rdx
  2a:	48 09 d2             	or     rdx,rdx
  2d:	48 09 d2             	or     rdx,rdx
  30:	48 09 d2             	or     rdx,rdx
  33:	48 09 d2             	or     rdx,rdx
  36:	48 09 d2             	or     rdx,rdx
  39:	48 09 d2             	or     rdx,rdx
  3c:	48 09 d2             	or     rdx,rdx
  3f:	48 09 d2             	or     rdx,rdx
  42:	48 09 d2             	or     rdx,rdx
  45:	48 09 d2             	or     rdx,rdx
  48:	48 09 d2             	or     rdx,rdx
  4b:	48 09 d2             	or     rdx,rdx
  4e:	48 09 d2             	or     rdx,rdx
  51:	48 09 d2             	or     rdx,rdx
  54:	48 09 d2             	or     rdx,rdx
  57:	48 09 d2             	or     rdx,rdx
  5a:	48 09 d2             	or     rdx,rdx
  5d:	4c 89 c0             	mov    rax,r8

Init:

MOV R8, 0;
MOV R9, 0;
MOV RCX, 1;
MOV [R14], RCX;
MOV RAX, R8;
MOV RDX, R9

Show nanoBench command
Results:
- Instructions retired: 32.0
- Core cycles: 39.72
- Reference cycles: 36.72
- UOPS_RETIRED.ANY: 63.0

Experiment 2 (slow division)

Instruction: DIV qword ptr [R14]
Chain instructions: AND RDX, R9; OR RDX, R9; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; OR RDX, RDX; ; MOV RAX, R8
Chain latency: 30

Code:

   0:	49 f7 36             	div    QWORD PTR [r14]
   3:	4c 21 ca             	and    rdx,r9
   6:	4c 09 ca             	or     rdx,r9
   9:	48 09 d2             	or     rdx,rdx
   c:	48 09 d2             	or     rdx,rdx
   f:	48 09 d2             	or     rdx,rdx
  12:	48 09 d2             	or     rdx,rdx
  15:	48 09 d2             	or     rdx,rdx
  18:	48 09 d2             	or     rdx,rdx
  1b:	48 09 d2             	or     rdx,rdx
  1e:	48 09 d2             	or     rdx,rdx
  21:	48 09 d2             	or     rdx,rdx
  24:	48 09 d2             	or     rdx,rdx
  27:	48 09 d2             	or     rdx,rdx
  2a:	48 09 d2             	or     rdx,rdx
  2d:	48 09 d2             	or     rdx,rdx
  30:	48 09 d2             	or     rdx,rdx
  33:	48 09 d2             	or     rdx,rdx
  36:	48 09 d2             	or     rdx,rdx
  39:	48 09 d2             	or     rdx,rdx
  3c:	48 09 d2             	or     rdx,rdx
  3f:	48 09 d2             	or     rdx,rdx
  42:	48 09 d2             	or     rdx,rdx
  45:	48 09 d2             	or     rdx,rdx
  48:	48 09 d2             	or     rdx,rdx
  4b:	48 09 d2             	or     rdx,rdx
  4e:	48 09 d2             	or     rdx,rdx
  51:	48 09 d2             	or     rdx,rdx
  54:	48 09 d2             	or     rdx,rdx
  57:	48 09 d2             	or     rdx,rdx
  5a:	48 09 d2             	or     rdx,rdx
  5d:	4c 89 c0             	mov    rax,r8

Init:

MOV R8, 133;
MOV R9, 0x343a9ed744556677;
MOV RCX, 0x75e6e44fccddeeff;
MOV [R14], RCX;
MOV RAX, R8;
MOV RDX, R9

Show nanoBench command
Results:
- Instructions retired: 32.0
- Core cycles: 108.57
- Reference cycles: 100.16
- UOPS_RETIRED.ANY: 71.0

DIV (M64) - Latency

Operands

Latency operand 1 → 2 (address, base register): 31 ≤ lat ≤ 89

Latency operand 1 → 2 (address, index register): 31 ≤ lat ≤ 89

Latency operand 1 → 3 (address, base register): 29 ≤ lat ≤ 88

Latency operand 1 → 3 (address, index register): 29 ≤ lat ≤ 88

Latency operand 2 → 2: 28 ≤ lat ≤ 87

Latency operand 2 → 3: 28 ≤ lat ≤ 87

Latency operand 3 → 2: 10 ≤ lat ≤ 82

Latency operand 3 → 3: 9 ≤ lat ≤ 78

Latency operand 1 → 2 (address, base register): 31 ≤ lat ≤ 89

Experiment 1 (fast division)

Experiment 2 (slow division)

Latency operand 1 → 2 (address, index register): 31 ≤ lat ≤ 89

Experiment 1 (fast division)

Experiment 2 (slow division)

Latency operand 1 → 3 (address, base register): 29 ≤ lat ≤ 88

Experiment 1 (fast division)

Experiment 2 (slow division)

Latency operand 1 → 3 (address, index register): 29 ≤ lat ≤ 88

Experiment 1 (fast division)

Experiment 2 (slow division)

Latency operand 2 → 2: 28 ≤ lat ≤ 87

Experiment 1 (fast division)

Experiment 2 (slow division)

Latency operand 2 → 3: 28 ≤ lat ≤ 87

Experiment 1 (fast division)

Experiment 2 (slow division)

Latency operand 3 → 2: 10 ≤ lat ≤ 82

Experiment 1 (fast division)

Experiment 2 (slow division)

Latency operand 3 → 3: 9 ≤ lat ≤ 78

Experiment 1 (fast division)

Experiment 2 (slow division)