ROL (R32, I8) - Latency

Operands

Operand 1 (r/w): Register (EAX, ECX, EDX, EBX, ESP, EBP, ESI, EDI, R8D, R9D, R10D, R11D, R12D, R13D, R14D, R15D)
Operand 2 (r): 8-bit immediate
Operand 3 (w, suppressed): Flags (CF: w, OF: undef)

Latency operand 1 → 1: 1

Latency operand 1 → 3: 9

Latency operand 1 → 1: 1

Experiment 1

Instruction: ROL R8D, 2

Code:

   0:	41 c1 c0 02          	rol    r8d,0x2

Show nanoBench command
Results:
- Instructions retired: 1.0
- Core cycles: 1.0
- Reference cycles: 1.01
- RS_UOPS_DISPATCHED: 1.0

Experiment 2

Instruction: ROL R8D, 2
Chain instructions: MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D
Chain latency: 5

Code:

   0:	41 c1 c0 02          	rol    r8d,0x2
   4:	4d 63 c0             	movsxd r8,r8d
   7:	4d 63 c0             	movsxd r8,r8d
   a:	4d 63 c0             	movsxd r8,r8d
   d:	4d 63 c0             	movsxd r8,r8d
  10:	4d 63 c0             	movsxd r8,r8d

Show nanoBench command
Results:
- Instructions retired: 6.0
- Core cycles: 6.01
- Reference cycles: 6.02
- RS_UOPS_DISPATCHED: 6.0

Latency operand 1 → 3: 9

Experiment 1

Instruction: ROL R8D, 2
Chain instructions: CMOVC R15D, R15D;MOVSX R8, R15D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D
Chain latency: 7

Code:

   0:	41 c1 c0 02          	rol    r8d,0x2
   4:	45 0f 42 ff          	cmovb  r15d,r15d
   8:	4d 63 c7             	movsxd r8,r15d
   b:	4d 63 c0             	movsxd r8,r8d
   e:	4d 63 c0             	movsxd r8,r8d
  11:	4d 63 c0             	movsxd r8,r8d
  14:	4d 63 c0             	movsxd r8,r8d

Show nanoBench command
Results:
- Instructions retired: 7.0
- Core cycles: 16.0
- Reference cycles: 16.02
- RS_UOPS_DISPATCHED: 8.0