BTS (M32, R32)

Experiment 1 (with R8D=0)

Instruction: BTS dword ptr [R14], R8D
Chain instructions: MOV R12D, [R14];MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;XOR R14, R12; XOR R14, R12
Chain latency: ≥12

Code:

   0:	45 0f ab 06          	bts    DWORD PTR [r14],r8d
   4:	45 8b 26             	mov    r12d,DWORD PTR [r14]
   7:	4d 63 e4             	movsxd r12,r12d
   a:	4d 63 e4             	movsxd r12,r12d
   d:	4d 63 e4             	movsxd r12,r12d
  10:	4d 63 e4             	movsxd r12,r12d
  13:	4d 63 e4             	movsxd r12,r12d
  16:	4d 63 e4             	movsxd r12,r12d
  19:	4d 63 e4             	movsxd r12,r12d
  1c:	4d 63 e4             	movsxd r12,r12d
  1f:	4d 63 e4             	movsxd r12,r12d
  22:	4d 63 e4             	movsxd r12,r12d
  25:	4d 31 e6             	xor    r14,r12
  28:	4d 31 e6             	xor    r14,r12

Init:
```
MOV R8D, 0
```
Show nanoBench command
Results:
- Instructions retired: 14.0
- Core cycles: 23.06
- Reference cycles: 13.51
- UOPS_EXECUTED.THREAD: 24.01

Experiment 2 (with R8D=1)

Instruction: BTS dword ptr [R14], R8D
Chain instructions: MOV R12D, [R14];MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;XOR R14, R12; XOR R14, R12
Chain latency: ≥12

Code:

   0:	45 0f ab 06          	bts    DWORD PTR [r14],r8d
   4:	45 8b 26             	mov    r12d,DWORD PTR [r14]
   7:	4d 63 e4             	movsxd r12,r12d
   a:	4d 63 e4             	movsxd r12,r12d
   d:	4d 63 e4             	movsxd r12,r12d
  10:	4d 63 e4             	movsxd r12,r12d
  13:	4d 63 e4             	movsxd r12,r12d
  16:	4d 63 e4             	movsxd r12,r12d
  19:	4d 63 e4             	movsxd r12,r12d
  1c:	4d 63 e4             	movsxd r12,r12d
  1f:	4d 63 e4             	movsxd r12,r12d
  22:	4d 63 e4             	movsxd r12,r12d
  25:	4d 31 e6             	xor    r14,r12
  28:	4d 31 e6             	xor    r14,r12

Init:
```
MOV R8D, 1
```
Show nanoBench command
Results:
- Instructions retired: 14.0
- Core cycles: 23.06
- Reference cycles: 13.75
- UOPS_EXECUTED.THREAD: 24.01

Experiment 3 (with R8D=2)

Instruction: BTS dword ptr [R14], R8D
Chain instructions: MOV R12D, [R14];MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;XOR R14, R12; XOR R14, R12
Chain latency: ≥12

Code:

   0:	45 0f ab 06          	bts    DWORD PTR [r14],r8d
   4:	45 8b 26             	mov    r12d,DWORD PTR [r14]
   7:	4d 63 e4             	movsxd r12,r12d
   a:	4d 63 e4             	movsxd r12,r12d
   d:	4d 63 e4             	movsxd r12,r12d
  10:	4d 63 e4             	movsxd r12,r12d
  13:	4d 63 e4             	movsxd r12,r12d
  16:	4d 63 e4             	movsxd r12,r12d
  19:	4d 63 e4             	movsxd r12,r12d
  1c:	4d 63 e4             	movsxd r12,r12d
  1f:	4d 63 e4             	movsxd r12,r12d
  22:	4d 63 e4             	movsxd r12,r12d
  25:	4d 31 e6             	xor    r14,r12
  28:	4d 31 e6             	xor    r14,r12

Init:
```
MOV R8D, 2
```
Show nanoBench command
Results:
- Instructions retired: 14.0
- Core cycles: 23.06
- Reference cycles: 13.87
- UOPS_EXECUTED.THREAD: 24.01

Experiment 4 (with additional nop, with R8D=0)

Instruction: BTS dword ptr [R14], R8D
Chain instructions: MOV R12D, [R14];MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;XOR R14, R12; XOR R14, R12;nop
Chain latency: ≥12

Code:

   0:	45 0f ab 06          	bts    DWORD PTR [r14],r8d
   4:	45 8b 26             	mov    r12d,DWORD PTR [r14]
   7:	4d 63 e4             	movsxd r12,r12d
   a:	4d 63 e4             	movsxd r12,r12d
   d:	4d 63 e4             	movsxd r12,r12d
  10:	4d 63 e4             	movsxd r12,r12d
  13:	4d 63 e4             	movsxd r12,r12d
  16:	4d 63 e4             	movsxd r12,r12d
  19:	4d 63 e4             	movsxd r12,r12d
  1c:	4d 63 e4             	movsxd r12,r12d
  1f:	4d 63 e4             	movsxd r12,r12d
  22:	4d 63 e4             	movsxd r12,r12d
  25:	4d 31 e6             	xor    r14,r12
  28:	4d 31 e6             	xor    r14,r12
  2b:	90                   	nop

Init:
```
MOV R8D, 0
```
Show nanoBench command
Results:
- Instructions retired: 15.0
- Core cycles: 23.1
- Reference cycles: 13.87
- UOPS_EXECUTED.THREAD: 24.0

Experiment 5 (with additional nop, with R8D=1)

Instruction: BTS dword ptr [R14], R8D
Chain instructions: MOV R12D, [R14];MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;XOR R14, R12; XOR R14, R12;nop
Chain latency: ≥12

Code:

   0:	45 0f ab 06          	bts    DWORD PTR [r14],r8d
   4:	45 8b 26             	mov    r12d,DWORD PTR [r14]
   7:	4d 63 e4             	movsxd r12,r12d
   a:	4d 63 e4             	movsxd r12,r12d
   d:	4d 63 e4             	movsxd r12,r12d
  10:	4d 63 e4             	movsxd r12,r12d
  13:	4d 63 e4             	movsxd r12,r12d
  16:	4d 63 e4             	movsxd r12,r12d
  19:	4d 63 e4             	movsxd r12,r12d
  1c:	4d 63 e4             	movsxd r12,r12d
  1f:	4d 63 e4             	movsxd r12,r12d
  22:	4d 63 e4             	movsxd r12,r12d
  25:	4d 31 e6             	xor    r14,r12
  28:	4d 31 e6             	xor    r14,r12
  2b:	90                   	nop

Init:
```
MOV R8D, 1
```
Show nanoBench command
Results:
- Instructions retired: 15.0
- Core cycles: 23.1
- Reference cycles: 13.87
- UOPS_EXECUTED.THREAD: 24.0

Experiment 6 (with additional nop, with R8D=2)

Instruction: BTS dword ptr [R14], R8D
Chain instructions: MOV R12D, [R14];MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;XOR R14, R12; XOR R14, R12;nop
Chain latency: ≥12

Code:

   0:	45 0f ab 06          	bts    DWORD PTR [r14],r8d
   4:	45 8b 26             	mov    r12d,DWORD PTR [r14]
   7:	4d 63 e4             	movsxd r12,r12d
   a:	4d 63 e4             	movsxd r12,r12d
   d:	4d 63 e4             	movsxd r12,r12d
  10:	4d 63 e4             	movsxd r12,r12d
  13:	4d 63 e4             	movsxd r12,r12d
  16:	4d 63 e4             	movsxd r12,r12d
  19:	4d 63 e4             	movsxd r12,r12d
  1c:	4d 63 e4             	movsxd r12,r12d
  1f:	4d 63 e4             	movsxd r12,r12d
  22:	4d 63 e4             	movsxd r12,r12d
  25:	4d 31 e6             	xor    r14,r12
  28:	4d 31 e6             	xor    r14,r12
  2b:	90                   	nop

Init:
```
MOV R8D, 2
```
Show nanoBench command
Results:
- Instructions retired: 15.0
- Core cycles: 23.1
- Reference cycles: 13.87
- UOPS_EXECUTED.THREAD: 24.0

Latency operand 1 → 1 (address, index register): ≤11

Experiment 1

Instruction: BTS dword ptr [R14+R13], R8D
Chain instructions: MOV R12D, [R14+R13];MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;XOR R13, R12; XOR R13, R12
Chain latency: ≥12

Code:

   0:	47 0f ab 04 2e       	bts    DWORD PTR [r14+r13*1],r8d
   5:	47 8b 24 2e          	mov    r12d,DWORD PTR [r14+r13*1]
   9:	4d 63 e4             	movsxd r12,r12d
   c:	4d 63 e4             	movsxd r12,r12d
   f:	4d 63 e4             	movsxd r12,r12d
  12:	4d 63 e4             	movsxd r12,r12d
  15:	4d 63 e4             	movsxd r12,r12d
  18:	4d 63 e4             	movsxd r12,r12d
  1b:	4d 63 e4             	movsxd r12,r12d
  1e:	4d 63 e4             	movsxd r12,r12d
  21:	4d 63 e4             	movsxd r12,r12d
  24:	4d 63 e4             	movsxd r12,r12d
  27:	4d 31 e5             	xor    r13,r12
  2a:	4d 31 e5             	xor    r13,r12

Init:
```
XOR R13, R13
```
Show nanoBench command
Results:
- Instructions retired: 14.0
- Core cycles: 23.08
- Reference cycles: 13.87
- UOPS_EXECUTED.THREAD: 24.01

Experiment 2 (with additional nop)

Instruction: BTS dword ptr [R14+R13], R8D
Chain instructions: MOV R12D, [R14+R13];MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;XOR R13, R12; XOR R13, R12;nop
Chain latency: ≥12

Code:

   0:	47 0f ab 04 2e       	bts    DWORD PTR [r14+r13*1],r8d
   5:	47 8b 24 2e          	mov    r12d,DWORD PTR [r14+r13*1]
   9:	4d 63 e4             	movsxd r12,r12d
   c:	4d 63 e4             	movsxd r12,r12d
   f:	4d 63 e4             	movsxd r12,r12d
  12:	4d 63 e4             	movsxd r12,r12d
  15:	4d 63 e4             	movsxd r12,r12d
  18:	4d 63 e4             	movsxd r12,r12d
  1b:	4d 63 e4             	movsxd r12,r12d
  1e:	4d 63 e4             	movsxd r12,r12d
  21:	4d 63 e4             	movsxd r12,r12d
  24:	4d 63 e4             	movsxd r12,r12d
  27:	4d 31 e5             	xor    r13,r12
  2a:	4d 31 e5             	xor    r13,r12
  2d:	90                   	nop

Init:
```
XOR R13, R13
```
Show nanoBench command
Results:
- Instructions retired: 15.0
- Core cycles: 23.17
- Reference cycles: 13.87
- UOPS_EXECUTED.THREAD: 24.0

Latency operand 1 → 1 (memory): 7

Experiment 1 (with R8D=0)

Instruction: BTS dword ptr [R14], R8D

Code:

   0:	45 0f ab 06          	bts    DWORD PTR [r14],r8d

Init:
```
MOV R8D, 0
```
Show nanoBench command
Results:
- Instructions retired: 1.0
- Core cycles: 7.54
- Reference cycles: 4.38
- UOPS_EXECUTED.THREAD: 11.04

Experiment 2 (with R8D=1)

Instruction: BTS dword ptr [R14], R8D

Code:

   0:	45 0f ab 06          	bts    DWORD PTR [r14],r8d

Init:
```
MOV R8D, 1
```
Show nanoBench command
Results:
- Instructions retired: 1.0
- Core cycles: 7.13
- Reference cycles: 4.14
- UOPS_EXECUTED.THREAD: 11.02

Experiment 3 (with R8D=2)

Instruction: BTS dword ptr [R14], R8D

Code:

   0:	45 0f ab 06          	bts    DWORD PTR [r14],r8d

Init:
```
MOV R8D, 2
```
Show nanoBench command
Results:
- Instructions retired: 1.0
- Core cycles: 7.54
- Reference cycles: 4.5
- UOPS_EXECUTED.THREAD: 11.02

Experiment 4 (with R8D=0)

Instruction: BTS dword ptr [R14], R8D
Chain instructions: MOV R12D, [R14];MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOV [R14], R12D
Chain latency: 10

Code:

   0:	45 0f ab 06          	bts    DWORD PTR [r14],r8d
   4:	45 8b 26             	mov    r12d,DWORD PTR [r14]
   7:	4d 63 e4             	movsxd r12,r12d
   a:	4d 63 e4             	movsxd r12,r12d
   d:	4d 63 e4             	movsxd r12,r12d
  10:	4d 63 e4             	movsxd r12,r12d
  13:	4d 63 e4             	movsxd r12,r12d
  16:	4d 63 e4             	movsxd r12,r12d
  19:	4d 63 e4             	movsxd r12,r12d
  1c:	4d 63 e4             	movsxd r12,r12d
  1f:	4d 63 e4             	movsxd r12,r12d
  22:	4d 63 e4             	movsxd r12,r12d
  25:	45 89 26             	mov    DWORD PTR [r14],r12d

Init:
```
MOV R8D, 0
```
Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 21.69
- Reference cycles: 12.9
- UOPS_EXECUTED.THREAD: 24.04

Experiment 5 (with R8D=1)

Instruction: BTS dword ptr [R14], R8D
Chain instructions: MOV R12D, [R14];MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOV [R14], R12D
Chain latency: 10

Code:

   0:	45 0f ab 06          	bts    DWORD PTR [r14],r8d
   4:	45 8b 26             	mov    r12d,DWORD PTR [r14]
   7:	4d 63 e4             	movsxd r12,r12d
   a:	4d 63 e4             	movsxd r12,r12d
   d:	4d 63 e4             	movsxd r12,r12d
  10:	4d 63 e4             	movsxd r12,r12d
  13:	4d 63 e4             	movsxd r12,r12d
  16:	4d 63 e4             	movsxd r12,r12d
  19:	4d 63 e4             	movsxd r12,r12d
  1c:	4d 63 e4             	movsxd r12,r12d
  1f:	4d 63 e4             	movsxd r12,r12d
  22:	4d 63 e4             	movsxd r12,r12d
  25:	45 89 26             	mov    DWORD PTR [r14],r12d

Init:
```
MOV R8D, 1
```
Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 21.62
- Reference cycles: 12.9
- UOPS_EXECUTED.THREAD: 24.04

Experiment 6 (with R8D=2)

Instruction: BTS dword ptr [R14], R8D
Chain instructions: MOV R12D, [R14];MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOV [R14], R12D
Chain latency: 10

Code:

   0:	45 0f ab 06          	bts    DWORD PTR [r14],r8d
   4:	45 8b 26             	mov    r12d,DWORD PTR [r14]
   7:	4d 63 e4             	movsxd r12,r12d
   a:	4d 63 e4             	movsxd r12,r12d
   d:	4d 63 e4             	movsxd r12,r12d
  10:	4d 63 e4             	movsxd r12,r12d
  13:	4d 63 e4             	movsxd r12,r12d
  16:	4d 63 e4             	movsxd r12,r12d
  19:	4d 63 e4             	movsxd r12,r12d
  1c:	4d 63 e4             	movsxd r12,r12d
  1f:	4d 63 e4             	movsxd r12,r12d
  22:	4d 63 e4             	movsxd r12,r12d
  25:	45 89 26             	mov    DWORD PTR [r14],r12d

Init:
```
MOV R8D, 2
```
Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 21.69
- Reference cycles: 13.02
- UOPS_EXECUTED.THREAD: 24.01

Latency operand 1 → 3 (address, base register): 7

Experiment 1 (with R8D=0)

Instruction: BTS dword ptr [R14], R8D
Chain instruction: CMOVC R14, R14
Chain latency: 1

Code:

   0:	45 0f ab 06          	bts    DWORD PTR [r14],r8d
   4:	4d 0f 42 f6          	cmovb  r14,r14

Init:
```
MOV R8D, 0
```
Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 8.0
- Reference cycles: 4.62
- UOPS_EXECUTED.THREAD: 12.0

Experiment 2 (with R8D=0, with dependency-breaking instructions)

Instruction: BTS dword ptr [R14], R8D
Chain instructions: CMOVC R14, R14;MOV dword ptr [R14], 0
Chain latency: 1

Code:

   0:	45 0f ab 06          	bts    DWORD PTR [r14],r8d
   4:	4d 0f 42 f6          	cmovb  r14,r14
   8:	41 c7 06 00 00 00 00 	mov    DWORD PTR [r14],0x0

Init:
```
MOV R8D, 0
```
Show nanoBench command
Results:
- Instructions retired: 3.0
- Core cycles: 14.0
- Reference cycles: 8.52
- UOPS_EXECUTED.THREAD: 14.0

Experiment 3 (with R8D=1)

Instruction: BTS dword ptr [R14], R8D
Chain instruction: CMOVC R14, R14
Chain latency: 1

Code:

   0:	45 0f ab 06          	bts    DWORD PTR [r14],r8d
   4:	4d 0f 42 f6          	cmovb  r14,r14

Init:
```
MOV R8D, 1
```
Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 8.0
- Reference cycles: 4.5
- UOPS_EXECUTED.THREAD: 12.0

Experiment 4 (with R8D=1, with dependency-breaking instructions)

Instruction: BTS dword ptr [R14], R8D
Chain instructions: CMOVC R14, R14;MOV dword ptr [R14], 0
Chain latency: 1

Code:

   0:	45 0f ab 06          	bts    DWORD PTR [r14],r8d
   4:	4d 0f 42 f6          	cmovb  r14,r14
   8:	41 c7 06 00 00 00 00 	mov    DWORD PTR [r14],0x0

Init:
```
MOV R8D, 1
```
Show nanoBench command
Results:
- Instructions retired: 3.0
- Core cycles: 14.0
- Reference cycles: 8.76
- UOPS_EXECUTED.THREAD: 14.0

Experiment 5 (with R8D=2)

Instruction: BTS dword ptr [R14], R8D
Chain instruction: CMOVC R14, R14
Chain latency: 1

Code:

   0:	45 0f ab 06          	bts    DWORD PTR [r14],r8d
   4:	4d 0f 42 f6          	cmovb  r14,r14

Init:
```
MOV R8D, 2
```
Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 8.0
- Reference cycles: 4.87
- UOPS_EXECUTED.THREAD: 12.0

Experiment 6 (with R8D=2, with dependency-breaking instructions)

Instruction: BTS dword ptr [R14], R8D
Chain instructions: CMOVC R14, R14;MOV dword ptr [R14], 0
Chain latency: 1

Code:

   0:	45 0f ab 06          	bts    DWORD PTR [r14],r8d
   4:	4d 0f 42 f6          	cmovb  r14,r14
   8:	41 c7 06 00 00 00 00 	mov    DWORD PTR [r14],0x0

Init:
```
MOV R8D, 2
```
Show nanoBench command
Results:
- Instructions retired: 3.0
- Core cycles: 14.0
- Reference cycles: 8.76
- UOPS_EXECUTED.THREAD: 14.0

Latency operand 1 → 3 (address, index register): 7

Experiment 1

Instruction: BTS dword ptr [R14+R13], R8D
Chain instruction: CMOVC R13, R13
Chain latency: 1

Code:

   0:	47 0f ab 04 2e       	bts    DWORD PTR [r14+r13*1],r8d
   5:	4d 0f 42 ed          	cmovb  r13,r13

Init:
```
XOR R13, R13
```
Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 8.0
- Reference cycles: 4.62
- UOPS_EXECUTED.THREAD: 12.0

Experiment 2 (with dependency-breaking instructions)

Instruction: BTS dword ptr [R14+R13], R8D
Chain instructions: CMOVC R13, R13;MOV dword ptr [R14], 0
Chain latency: 1

Code:

   0:	47 0f ab 04 2e       	bts    DWORD PTR [r14+r13*1],r8d
   5:	4d 0f 42 ed          	cmovb  r13,r13
   9:	41 c7 06 00 00 00 00 	mov    DWORD PTR [r14],0x0

Init:
```
XOR R13, R13
```
Show nanoBench command
Results:
- Instructions retired: 3.0
- Core cycles: 8.0
- Reference cycles: 4.75
- UOPS_EXECUTED.THREAD: 14.0

Latency operand 1 → 3 (memory): ≤6

Experiment 1 (with R8D=0)

Instruction: BTS dword ptr [R14], R8D
Chain instructions: CMOVC R12, R12;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;mov [R14], R12D
Chain latency: ≥11

Code:

   0:	45 0f ab 06          	bts    DWORD PTR [r14],r8d
   4:	4d 0f 42 e4          	cmovb  r12,r12
   8:	4d 63 e4             	movsxd r12,r12d
   b:	4d 63 e4             	movsxd r12,r12d
   e:	4d 63 e4             	movsxd r12,r12d
  11:	4d 63 e4             	movsxd r12,r12d
  14:	4d 63 e4             	movsxd r12,r12d
  17:	4d 63 e4             	movsxd r12,r12d
  1a:	4d 63 e4             	movsxd r12,r12d
  1d:	4d 63 e4             	movsxd r12,r12d
  20:	4d 63 e4             	movsxd r12,r12d
  23:	4d 63 e4             	movsxd r12,r12d
  26:	45 89 26             	mov    DWORD PTR [r14],r12d

Init:
```
MOV R8D, 0
```
Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 17.0
- Reference cycles: 9.86
- UOPS_EXECUTED.THREAD: 24.0

Experiment 2 (with R8D=1)

Instruction: BTS dword ptr [R14], R8D
Chain instructions: CMOVC R12, R12;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;mov [R14], R12D
Chain latency: ≥11

Code:

   0:	45 0f ab 06          	bts    DWORD PTR [r14],r8d
   4:	4d 0f 42 e4          	cmovb  r12,r12
   8:	4d 63 e4             	movsxd r12,r12d
   b:	4d 63 e4             	movsxd r12,r12d
   e:	4d 63 e4             	movsxd r12,r12d
  11:	4d 63 e4             	movsxd r12,r12d
  14:	4d 63 e4             	movsxd r12,r12d
  17:	4d 63 e4             	movsxd r12,r12d
  1a:	4d 63 e4             	movsxd r12,r12d
  1d:	4d 63 e4             	movsxd r12,r12d
  20:	4d 63 e4             	movsxd r12,r12d
  23:	4d 63 e4             	movsxd r12,r12d
  26:	45 89 26             	mov    DWORD PTR [r14],r12d

Init:
```
MOV R8D, 1
```
Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 17.0
- Reference cycles: 10.22
- UOPS_EXECUTED.THREAD: 24.0

Experiment 3 (with R8D=2)

Instruction: BTS dword ptr [R14], R8D
Chain instructions: CMOVC R12, R12;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;mov [R14], R12D
Chain latency: ≥11

Code:

   0:	45 0f ab 06          	bts    DWORD PTR [r14],r8d
   4:	4d 0f 42 e4          	cmovb  r12,r12
   8:	4d 63 e4             	movsxd r12,r12d
   b:	4d 63 e4             	movsxd r12,r12d
   e:	4d 63 e4             	movsxd r12,r12d
  11:	4d 63 e4             	movsxd r12,r12d
  14:	4d 63 e4             	movsxd r12,r12d
  17:	4d 63 e4             	movsxd r12,r12d
  1a:	4d 63 e4             	movsxd r12,r12d
  1d:	4d 63 e4             	movsxd r12,r12d
  20:	4d 63 e4             	movsxd r12,r12d
  23:	4d 63 e4             	movsxd r12,r12d
  26:	45 89 26             	mov    DWORD PTR [r14],r12d

Init:
```
MOV R8D, 2
```
Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 17.0
- Reference cycles: 10.1
- UOPS_EXECUTED.THREAD: 24.0

BTS (M32, R32) - Latency

Operands

Latency operand 1 → 1 (address, base register): ≤11

Latency operand 1 → 1 (address, index register): ≤11

Latency operand 1 → 1 (memory): 7

Latency operand 1 → 3 (address, base register): 7

Latency operand 1 → 3 (address, index register): 7

Latency operand 1 → 3 (memory): ≤6

Latency operand 2 → 1: ≤18

Latency operand 2 → 3: 10

Latency operand 1 → 1 (address, base register): ≤11

Experiment 1 (with R8D=0)

Experiment 2 (with R8D=1)

Experiment 3 (with R8D=2)

Experiment 4 (with additional nop, with R8D=0)

Experiment 5 (with additional nop, with R8D=1)

Experiment 6 (with additional nop, with R8D=2)

Latency operand 1 → 1 (address, index register): ≤11

Experiment 1

Experiment 2 (with additional nop)

Latency operand 1 → 1 (memory): 7

Experiment 1 (with R8D=0)

Experiment 2 (with R8D=1)

Experiment 3 (with R8D=2)

Experiment 4 (with R8D=0)

Experiment 5 (with R8D=1)

Experiment 6 (with R8D=2)

Latency operand 1 → 3 (address, base register): 7

Experiment 1 (with R8D=0)

Experiment 2 (with R8D=0, with dependency-breaking instructions)

Experiment 3 (with R8D=1)

Experiment 4 (with R8D=1, with dependency-breaking instructions)

Experiment 5 (with R8D=2)

Experiment 6 (with R8D=2, with dependency-breaking instructions)

Latency operand 1 → 3 (address, index register): 7

Experiment 1

Experiment 2 (with dependency-breaking instructions)

Latency operand 1 → 3 (memory): ≤6

Experiment 1 (with R8D=0)

Experiment 2 (with R8D=1)

Experiment 3 (with R8D=2)

Latency operand 2 → 1: ≤18

Experiment 1

Latency operand 2 → 3: 10

Experiment 1