PHMINPOSUW (XMM, XMM) - Latency


Operands


Latency operand 2 → 1: 5


Latency operand 2 → 1: 5

Experiment 1

Experiment 2

Experiment 3 (source registers initialized by an instruction of the same kind)

Experiment 4 (source registers initialized by an instruction of the same kind)

Experiment 5 (with the same register for different operands)

Experiment 6 (with the same register for different operands)

Experiment 7 (with the same register for different operands)

Experiment 8 (source registers initialized by an instruction of the same kind, with the same register for different operands)

Experiment 9 (source registers initialized by an instruction of the same kind, with the same register for different operands)

Experiment 10 (source registers initialized by an instruction of the same kind, with the same register for different operands)