CVTSI2SD (XMM, R32) - Latency

Experiment 1

• Instruction: CVTSI2SD XMM0, R8D
• Code:

     0:	f2 41 0f 2a c0       	cvtsi2sd xmm0,r8d
  

• Init:

  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOVUPD XMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 1.0
  • Core cycles: 4.0
  • Reference cycles: 2.88
  • UOPS_EXECUTED.THREAD: 2.0

Experiment 2

• Instruction: CVTSI2SD XMM0, R8D
• Chain instructions: SHUFPD XMM0, XMM0, 0;SHUFPD XMM0, XMM0, 0;SHUFPD XMM0, XMM0, 0;SHUFPD XMM0, XMM0, 0;SHUFPD XMM0, XMM0, 0;SHUFPD XMM0, XMM0, 0;SHUFPD XMM0, XMM0, 0
• Chain latency: 7
• Code:

     0:	f2 41 0f 2a c0       	cvtsi2sd xmm0,r8d
     5:	66 0f c6 c0 00       	shufpd xmm0,xmm0,0x0
     a:	66 0f c6 c0 00       	shufpd xmm0,xmm0,0x0
     f:	66 0f c6 c0 00       	shufpd xmm0,xmm0,0x0
    14:	66 0f c6 c0 00       	shufpd xmm0,xmm0,0x0
    19:	66 0f c6 c0 00       	shufpd xmm0,xmm0,0x0
    1e:	66 0f c6 c0 00       	shufpd xmm0,xmm0,0x0
    23:	66 0f c6 c0 00       	shufpd xmm0,xmm0,0x0
  

• Init:

  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOVUPD XMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 8.0
  • Core cycles: 11.0
  • Reference cycles: 10.64
  • UOPS_EXECUTED.THREAD: 9.0

Experiment 3

• Instruction: CVTSI2SD XMM0, R8D
• Chain instructions: PSHUFD XMM0, XMM0, 0;PAND XMM0, XMM0;PAND XMM0, XMM0;PAND XMM0, XMM0;PAND XMM0, XMM0;PAND XMM0, XMM0;PAND XMM0, XMM0
• Chain latency: 7
• Code:

     0:	f2 41 0f 2a c0       	cvtsi2sd xmm0,r8d
     5:	66 0f 70 c0 00       	pshufd xmm0,xmm0,0x0
     a:	66 0f db c0          	pand   xmm0,xmm0
     e:	66 0f db c0          	pand   xmm0,xmm0
    12:	66 0f db c0          	pand   xmm0,xmm0
    16:	66 0f db c0          	pand   xmm0,xmm0
    1a:	66 0f db c0          	pand   xmm0,xmm0
    1e:	66 0f db c0          	pand   xmm0,xmm0
  

• Init:

  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOVUPD XMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 8.0
  • Core cycles: 12.0
  • Reference cycles: 10.64
  • UOPS_EXECUTED.THREAD: 9.0

Experiment 4 (source registers initialized by an instruction of the same kind)

• Instruction: CVTSI2SD XMM0, R8D
• Code:

     0:	f2 41 0f 2a c0       	cvtsi2sd xmm0,r8d
  

• Init:

  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOVUPD XMM0, [R14];
  CVTSI2SD XMM0, R8D

• Show nanoBench command
• Results:
  • Instructions retired: 1.0
  • Core cycles: 4.0
  • Reference cycles: 3.99
  • UOPS_EXECUTED.THREAD: 2.0

Experiment 5 (source registers initialized by an instruction of the same kind)

• Instruction: CVTSI2SD XMM0, R8D
• Chain instructions: SHUFPD XMM0, XMM0, 0;SHUFPD XMM0, XMM0, 0;SHUFPD XMM0, XMM0, 0;SHUFPD XMM0, XMM0, 0;SHUFPD XMM0, XMM0, 0;SHUFPD XMM0, XMM0, 0;SHUFPD XMM0, XMM0, 0
• Chain latency: 7
• Code:

     0:	f2 41 0f 2a c0       	cvtsi2sd xmm0,r8d
     5:	66 0f c6 c0 00       	shufpd xmm0,xmm0,0x0
     a:	66 0f c6 c0 00       	shufpd xmm0,xmm0,0x0
     f:	66 0f c6 c0 00       	shufpd xmm0,xmm0,0x0
    14:	66 0f c6 c0 00       	shufpd xmm0,xmm0,0x0
    19:	66 0f c6 c0 00       	shufpd xmm0,xmm0,0x0
    1e:	66 0f c6 c0 00       	shufpd xmm0,xmm0,0x0
    23:	66 0f c6 c0 00       	shufpd xmm0,xmm0,0x0
  

• Init:

  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOVUPD XMM0, [R14];
  CVTSI2SD XMM0, R8D

• Show nanoBench command
• Results:
  • Instructions retired: 8.0
  • Core cycles: 11.0
  • Reference cycles: 10.42
  • UOPS_EXECUTED.THREAD: 9.0

Experiment 6 (source registers initialized by an instruction of the same kind)

• Instruction: CVTSI2SD XMM0, R8D
• Chain instructions: PSHUFD XMM0, XMM0, 0;PAND XMM0, XMM0;PAND XMM0, XMM0;PAND XMM0, XMM0;PAND XMM0, XMM0;PAND XMM0, XMM0;PAND XMM0, XMM0
• Chain latency: 7
• Code:

     0:	f2 41 0f 2a c0       	cvtsi2sd xmm0,r8d
     5:	66 0f 70 c0 00       	pshufd xmm0,xmm0,0x0
     a:	66 0f db c0          	pand   xmm0,xmm0
     e:	66 0f db c0          	pand   xmm0,xmm0
    12:	66 0f db c0          	pand   xmm0,xmm0
    16:	66 0f db c0          	pand   xmm0,xmm0
    1a:	66 0f db c0          	pand   xmm0,xmm0
    1e:	66 0f db c0          	pand   xmm0,xmm0
  

• Init:

  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOVUPD XMM0, [R14];
  CVTSI2SD XMM0, R8D

• Show nanoBench command
• Results:
  • Instructions retired: 8.0
  • Core cycles: 11.99
  • Reference cycles: 10.64
  • UOPS_EXECUTED.THREAD: 9.0

Experiment 1

• Instruction: CVTSI2SD XMM0, R8D
• Chain instruction: CVTSD2SI R8D, XMM0
• Chain latency: ≥1
• Code:

     0:	f2 41 0f 2a c0       	cvtsi2sd xmm0,r8d
     5:	f2 44 0f 2d c0       	cvtsd2si r8d,xmm0
  

• Init:

  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOVUPD XMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 2.0
  • Core cycles: 12.0
  • Reference cycles: 10.86
  • UOPS_EXECUTED.THREAD: 4.0

Experiment 2 (with dependency-breaking instructions)

• Instruction: CVTSI2SD XMM0, R8D
• Chain instructions: CVTSD2SI R8D, XMM0;MOVUPD XMM0, XMM15
• Chain latency: ≥1
• Code:

     0:	f2 41 0f 2a c0       	cvtsi2sd xmm0,r8d
     5:	f2 44 0f 2d c0       	cvtsd2si r8d,xmm0
     a:	66 41 0f 10 c7       	movupd xmm0,xmm15
  

• Init:

  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOVUPD XMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 3.0
  • Core cycles: 12.0
  • Reference cycles: 10.86
  • UOPS_EXECUTED.THREAD: 4.0

Experiment 3

• Instruction: CVTSI2SD XMM0, R8D
• Chain instruction: CVTSD2SI R8, XMM0
• Chain latency: ≥1
• Code:

     0:	f2 41 0f 2a c0       	cvtsi2sd xmm0,r8d
     5:	f2 4c 0f 2d c0       	cvtsd2si r8,xmm0
  

• Init:

  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOVUPD XMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 2.0
  • Core cycles: 12.0
  • Reference cycles: 10.64
  • UOPS_EXECUTED.THREAD: 4.0

Experiment 4 (with dependency-breaking instructions)

• Instruction: CVTSI2SD XMM0, R8D
• Chain instructions: CVTSD2SI R8, XMM0;MOVUPD XMM0, XMM15
• Chain latency: ≥1
• Code:

     0:	f2 41 0f 2a c0       	cvtsi2sd xmm0,r8d
     5:	f2 4c 0f 2d c0       	cvtsd2si r8,xmm0
     a:	66 41 0f 10 c7       	movupd xmm0,xmm15
  

• Init:

  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOVUPD XMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 3.0
  • Core cycles: 12.0
  • Reference cycles: 10.42
  • UOPS_EXECUTED.THREAD: 4.0

Experiment 5

• Instruction: CVTSI2SD XMM0, R8D
• Chain instruction: CVTTSD2SI R8D, XMM0
• Chain latency: ≥1
• Code:

     0:	f2 41 0f 2a c0       	cvtsi2sd xmm0,r8d
     5:	f2 44 0f 2c c0       	cvttsd2si r8d,xmm0
  

• Init:

  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOVUPD XMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 2.0
  • Core cycles: 12.0
  • Reference cycles: 10.86
  • UOPS_EXECUTED.THREAD: 4.0

Experiment 6 (with dependency-breaking instructions)

• Instruction: CVTSI2SD XMM0, R8D
• Chain instructions: CVTTSD2SI R8D, XMM0;MOVUPD XMM0, XMM15
• Chain latency: ≥1
• Code:

     0:	f2 41 0f 2a c0       	cvtsi2sd xmm0,r8d
     5:	f2 44 0f 2c c0       	cvttsd2si r8d,xmm0
     a:	66 41 0f 10 c7       	movupd xmm0,xmm15
  

• Init:

  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOVUPD XMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 3.0
  • Core cycles: 12.0
  • Reference cycles: 10.64
  • UOPS_EXECUTED.THREAD: 4.0

Experiment 7

• Instruction: CVTSI2SD XMM0, R8D
• Chain instruction: CVTTSD2SI R8, XMM0
• Chain latency: ≥1
• Code:

     0:	f2 41 0f 2a c0       	cvtsi2sd xmm0,r8d
     5:	f2 4c 0f 2c c0       	cvttsd2si r8,xmm0
  

• Init:

  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOVUPD XMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 2.0
  • Core cycles: 12.0
  • Reference cycles: 10.64
  • UOPS_EXECUTED.THREAD: 4.0

Experiment 8 (with dependency-breaking instructions)

• Instruction: CVTSI2SD XMM0, R8D
• Chain instructions: CVTTSD2SI R8, XMM0;MOVUPD XMM0, XMM15
• Chain latency: ≥1
• Code:

     0:	f2 41 0f 2a c0       	cvtsi2sd xmm0,r8d
     5:	f2 4c 0f 2c c0       	cvttsd2si r8,xmm0
     a:	66 41 0f 10 c7       	movupd xmm0,xmm15
  

• Init:

  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOVUPD XMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 3.0
  • Core cycles: 11.99
  • Reference cycles: 10.64
  • UOPS_EXECUTED.THREAD: 4.0

Experiment 9

• Instruction: CVTSI2SD XMM0, R8D
• Chain instruction: MOVD R8D, XMM0
• Chain latency: ≥1
• Code:

     0:	f2 41 0f 2a c0       	cvtsi2sd xmm0,r8d
     5:	66 41 0f 7e c0       	movd   r8d,xmm0
  

• Init:

  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOVUPD XMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 2.0
  • Core cycles: 8.0
  • Reference cycles: 7.54
  • UOPS_EXECUTED.THREAD: 3.0

Experiment 10 (with dependency-breaking instructions)

• Instruction: CVTSI2SD XMM0, R8D
• Chain instructions: MOVD R8D, XMM0;MOVUPD XMM0, XMM15
• Chain latency: ≥1
• Code:

     0:	f2 41 0f 2a c0       	cvtsi2sd xmm0,r8d
     5:	66 41 0f 7e c0       	movd   r8d,xmm0
     a:	66 41 0f 10 c7       	movupd xmm0,xmm15
  

• Init:

  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOVUPD XMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 3.0
  • Core cycles: 8.0
  • Reference cycles: 6.65
  • UOPS_EXECUTED.THREAD: 3.0

Experiment 11

• Instruction: CVTSI2SD XMM0, R8D
• Chain instruction: MOVQ R8, XMM0
• Chain latency: ≥1
• Code:

     0:	f2 41 0f 2a c0       	cvtsi2sd xmm0,r8d
     5:	66 49 0f 7e c0       	movq   r8,xmm0
  

• Init:

  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOVUPD XMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 2.0
  • Core cycles: 8.0
  • Reference cycles: 7.98
  • UOPS_EXECUTED.THREAD: 3.0

Experiment 12 (with dependency-breaking instructions)

• Instruction: CVTSI2SD XMM0, R8D
• Chain instructions: MOVQ R8, XMM0;MOVUPD XMM0, XMM15
• Chain latency: ≥1
• Code:

     0:	f2 41 0f 2a c0       	cvtsi2sd xmm0,r8d
     5:	66 49 0f 7e c0       	movq   r8,xmm0
     a:	66 41 0f 10 c7       	movupd xmm0,xmm15
  

• Init:

  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOVUPD XMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 3.0
  • Core cycles: 8.0
  • Reference cycles: 7.98
  • UOPS_EXECUTED.THREAD: 3.0

Experiment 13

• Instruction: CVTSI2SD XMM0, R8D
• Chain instruction: PEXTRB R8D, XMM0, 2
• Chain latency: ≥1
• Code:

     0:	f2 41 0f 2a c0       	cvtsi2sd xmm0,r8d
     5:	66 41 0f 3a 14 c0 02 	pextrb r8d,xmm0,0x2
  

• Init:

  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOVUPD XMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 2.0
  • Core cycles: 9.0
  • Reference cycles: 8.2
  • UOPS_EXECUTED.THREAD: 4.0

Experiment 14 (with dependency-breaking instructions)

• Instruction: CVTSI2SD XMM0, R8D
• Chain instructions: PEXTRB R8D, XMM0, 2;MOVUPD XMM0, XMM15
• Chain latency: ≥1
• Code:

     0:	f2 41 0f 2a c0       	cvtsi2sd xmm0,r8d
     5:	66 41 0f 3a 14 c0 02 	pextrb r8d,xmm0,0x2
     c:	66 41 0f 10 c7       	movupd xmm0,xmm15
  

• Init:

  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOVUPD XMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 3.0
  • Core cycles: 9.0
  • Reference cycles: 7.98
  • UOPS_EXECUTED.THREAD: 4.0

Experiment 15

• Instruction: CVTSI2SD XMM0, R8D
• Chain instruction: PEXTRD R8D, XMM0, 2
• Chain latency: ≥1
• Code:

     0:	f2 41 0f 2a c0       	cvtsi2sd xmm0,r8d
     5:	66 41 0f 3a 16 c0 02 	pextrd r8d,xmm0,0x2
  

• Init:

  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOVUPD XMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 2.0
  • Core cycles: 9.0
  • Reference cycles: 7.98
  • UOPS_EXECUTED.THREAD: 4.0

Experiment 16 (with dependency-breaking instructions)

• Instruction: CVTSI2SD XMM0, R8D
• Chain instructions: PEXTRD R8D, XMM0, 2;MOVUPD XMM0, XMM15
• Chain latency: ≥1
• Code:

     0:	f2 41 0f 2a c0       	cvtsi2sd xmm0,r8d
     5:	66 41 0f 3a 16 c0 02 	pextrd r8d,xmm0,0x2
     c:	66 41 0f 10 c7       	movupd xmm0,xmm15
  

• Init:

  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOVUPD XMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 3.0
  • Core cycles: 9.0
  • Reference cycles: 8.2
  • UOPS_EXECUTED.THREAD: 4.0

Experiment 17

• Instruction: CVTSI2SD XMM0, R8D
• Chain instruction: PEXTRQ R8, XMM0, 2
• Chain latency: ≥1
• Code:

     0:	f2 41 0f 2a c0       	cvtsi2sd xmm0,r8d
     5:	66 49 0f 3a 16 c0 02 	pextrq r8,xmm0,0x2
  

• Init:

  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOVUPD XMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 2.0
  • Core cycles: 9.0
  • Reference cycles: 7.98
  • UOPS_EXECUTED.THREAD: 4.0

Experiment 18 (with dependency-breaking instructions)

• Instruction: CVTSI2SD XMM0, R8D
• Chain instructions: PEXTRQ R8, XMM0, 2;MOVUPD XMM0, XMM15
• Chain latency: ≥1
• Code:

     0:	f2 41 0f 2a c0       	cvtsi2sd xmm0,r8d
     5:	66 49 0f 3a 16 c0 02 	pextrq r8,xmm0,0x2
     c:	66 41 0f 10 c7       	movupd xmm0,xmm15
  

• Init:

  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOVUPD XMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 3.0
  • Core cycles: 9.0
  • Reference cycles: 7.98
  • UOPS_EXECUTED.THREAD: 4.0

Experiment 19

• Instruction: CVTSI2SD XMM0, R8D
• Chain instruction: PEXTRW R8D, XMM0, 2
• Chain latency: ≥1
• Code:

     0:	f2 41 0f 2a c0       	cvtsi2sd xmm0,r8d
     5:	66 44 0f c5 c0 02    	pextrw r8d,xmm0,0x2
  

• Init:

  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOVUPD XMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 2.0
  • Core cycles: 9.0
  • Reference cycles: 7.98
  • UOPS_EXECUTED.THREAD: 4.0

Experiment 20 (with dependency-breaking instructions)

• Instruction: CVTSI2SD XMM0, R8D
• Chain instructions: PEXTRW R8D, XMM0, 2;MOVUPD XMM0, XMM15
• Chain latency: ≥1
• Code:

     0:	f2 41 0f 2a c0       	cvtsi2sd xmm0,r8d
     5:	66 44 0f c5 c0 02    	pextrw r8d,xmm0,0x2
     b:	66 41 0f 10 c7       	movupd xmm0,xmm15
  

• Init:

  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOVUPD XMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 3.0
  • Core cycles: 9.0
  • Reference cycles: 7.98
  • UOPS_EXECUTED.THREAD: 4.0

Experiment 21

• Instruction: CVTSI2SD XMM0, R8D
• Chain instruction: PMOVMSKB R8D, XMM0
• Chain latency: ≥1
• Code:

     0:	f2 41 0f 2a c0       	cvtsi2sd xmm0,r8d
     5:	66 44 0f d7 c0       	pmovmskb r8d,xmm0
  

• Init:

  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOVUPD XMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 2.0
  • Core cycles: 8.0
  • Reference cycles: 7.32
  • UOPS_EXECUTED.THREAD: 3.0

Experiment 22 (with dependency-breaking instructions)

• Instruction: CVTSI2SD XMM0, R8D
• Chain instructions: PMOVMSKB R8D, XMM0;MOVUPD XMM0, XMM15
• Chain latency: ≥1
• Code:

     0:	f2 41 0f 2a c0       	cvtsi2sd xmm0,r8d
     5:	66 44 0f d7 c0       	pmovmskb r8d,xmm0
     a:	66 41 0f 10 c7       	movupd xmm0,xmm15
  

• Init:

  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOVUPD XMM0, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 3.0
  • Core cycles: 8.0
  • Reference cycles: 6.65
  • UOPS_EXECUTED.THREAD: 3.0

Experiment 23 (source registers initialized by an instruction of the same kind)

• Instruction: CVTSI2SD XMM0, R8D
• Chain instruction: CVTSD2SI R8D, XMM0
• Chain latency: ≥1
• Code:

     0:	f2 41 0f 2a c0       	cvtsi2sd xmm0,r8d
     5:	f2 44 0f 2d c0       	cvtsd2si r8d,xmm0
  

• Init:

  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOVUPD XMM0, [R14];
  CVTSI2SD XMM0, R8D

• Show nanoBench command
• Results:
  • Instructions retired: 2.0
  • Core cycles: 12.0
  • Reference cycles: 10.64
  • UOPS_EXECUTED.THREAD: 4.0

Experiment 24 (source registers initialized by an instruction of the same kind, with dependency-breaking instructions)

• Instruction: CVTSI2SD XMM0, R8D
• Chain instructions: CVTSD2SI R8D, XMM0;MOVUPD XMM0, XMM15
• Chain latency: ≥1
• Code:

     0:	f2 41 0f 2a c0       	cvtsi2sd xmm0,r8d
     5:	f2 44 0f 2d c0       	cvtsd2si r8d,xmm0
     a:	66 41 0f 10 c7       	movupd xmm0,xmm15
  

• Init:

  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOVUPD XMM0, [R14];
  CVTSI2SD XMM0, R8D

• Show nanoBench command
• Results:
  • Instructions retired: 3.0
  • Core cycles: 12.01
  • Reference cycles: 10.86
  • UOPS_EXECUTED.THREAD: 4.0

Experiment 25 (source registers initialized by an instruction of the same kind)

• Instruction: CVTSI2SD XMM0, R8D
• Chain instruction: CVTSD2SI R8, XMM0
• Chain latency: ≥1
• Code:

     0:	f2 41 0f 2a c0       	cvtsi2sd xmm0,r8d
     5:	f2 4c 0f 2d c0       	cvtsd2si r8,xmm0
  

• Init:

  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOVUPD XMM0, [R14];
  CVTSI2SD XMM0, R8D

• Show nanoBench command
• Results:
  • Instructions retired: 2.0
  • Core cycles: 12.0
  • Reference cycles: 10.64
  • UOPS_EXECUTED.THREAD: 4.0

Experiment 26 (source registers initialized by an instruction of the same kind, with dependency-breaking instructions)

• Instruction: CVTSI2SD XMM0, R8D
• Chain instructions: CVTSD2SI R8, XMM0;MOVUPD XMM0, XMM15
• Chain latency: ≥1
• Code:

     0:	f2 41 0f 2a c0       	cvtsi2sd xmm0,r8d
     5:	f2 4c 0f 2d c0       	cvtsd2si r8,xmm0
     a:	66 41 0f 10 c7       	movupd xmm0,xmm15
  

• Init:

  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOVUPD XMM0, [R14];
  CVTSI2SD XMM0, R8D

• Show nanoBench command
• Results:
  • Instructions retired: 3.0
  • Core cycles: 12.0
  • Reference cycles: 10.64
  • UOPS_EXECUTED.THREAD: 4.0

Experiment 27 (source registers initialized by an instruction of the same kind)

• Instruction: CVTSI2SD XMM0, R8D
• Chain instruction: CVTTSD2SI R8D, XMM0
• Chain latency: ≥1
• Code:

     0:	f2 41 0f 2a c0       	cvtsi2sd xmm0,r8d
     5:	f2 44 0f 2c c0       	cvttsd2si r8d,xmm0
  

• Init:

  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOVUPD XMM0, [R14];
  CVTSI2SD XMM0, R8D

• Show nanoBench command
• Results:
  • Instructions retired: 2.0
  • Core cycles: 12.0
  • Reference cycles: 10.64
  • UOPS_EXECUTED.THREAD: 4.0

Experiment 28 (source registers initialized by an instruction of the same kind, with dependency-breaking instructions)

• Instruction: CVTSI2SD XMM0, R8D
• Chain instructions: CVTTSD2SI R8D, XMM0;MOVUPD XMM0, XMM15
• Chain latency: ≥1
• Code:

     0:	f2 41 0f 2a c0       	cvtsi2sd xmm0,r8d
     5:	f2 44 0f 2c c0       	cvttsd2si r8d,xmm0
     a:	66 41 0f 10 c7       	movupd xmm0,xmm15
  

• Init:

  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOVUPD XMM0, [R14];
  CVTSI2SD XMM0, R8D

• Show nanoBench command
• Results:
  • Instructions retired: 3.0
  • Core cycles: 12.0
  • Reference cycles: 10.42
  • UOPS_EXECUTED.THREAD: 4.0

Experiment 29 (source registers initialized by an instruction of the same kind)

• Instruction: CVTSI2SD XMM0, R8D
• Chain instruction: CVTTSD2SI R8, XMM0
• Chain latency: ≥1
• Code:

     0:	f2 41 0f 2a c0       	cvtsi2sd xmm0,r8d
     5:	f2 4c 0f 2c c0       	cvttsd2si r8,xmm0
  

• Init:

  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOVUPD XMM0, [R14];
  CVTSI2SD XMM0, R8D

• Show nanoBench command
• Results:
  • Instructions retired: 2.0
  • Core cycles: 12.0
  • Reference cycles: 10.64
  • UOPS_EXECUTED.THREAD: 4.0

Experiment 30 (source registers initialized by an instruction of the same kind, with dependency-breaking instructions)

• Instruction: CVTSI2SD XMM0, R8D
• Chain instructions: CVTTSD2SI R8, XMM0;MOVUPD XMM0, XMM15
• Chain latency: ≥1
• Code:

     0:	f2 41 0f 2a c0       	cvtsi2sd xmm0,r8d
     5:	f2 4c 0f 2c c0       	cvttsd2si r8,xmm0
     a:	66 41 0f 10 c7       	movupd xmm0,xmm15
  

• Init:

  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOVUPD XMM0, [R14];
  CVTSI2SD XMM0, R8D

• Show nanoBench command
• Results:
  • Instructions retired: 3.0
  • Core cycles: 12.0
  • Reference cycles: 10.64
  • UOPS_EXECUTED.THREAD: 4.0

Experiment 31 (source registers initialized by an instruction of the same kind)

• Instruction: CVTSI2SD XMM0, R8D
• Chain instruction: MOVD R8D, XMM0
• Chain latency: ≥1
• Code:

     0:	f2 41 0f 2a c0       	cvtsi2sd xmm0,r8d
     5:	66 41 0f 7e c0       	movd   r8d,xmm0
  

• Init:

  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOVUPD XMM0, [R14];
  CVTSI2SD XMM0, R8D

• Show nanoBench command
• Results:
  • Instructions retired: 2.0
  • Core cycles: 8.0
  • Reference cycles: 7.76
  • UOPS_EXECUTED.THREAD: 3.0

Experiment 32 (source registers initialized by an instruction of the same kind, with dependency-breaking instructions)

• Instruction: CVTSI2SD XMM0, R8D
• Chain instructions: MOVD R8D, XMM0;MOVUPD XMM0, XMM15
• Chain latency: ≥1
• Code:

     0:	f2 41 0f 2a c0       	cvtsi2sd xmm0,r8d
     5:	66 41 0f 7e c0       	movd   r8d,xmm0
     a:	66 41 0f 10 c7       	movupd xmm0,xmm15
  

• Init:

  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOVUPD XMM0, [R14];
  CVTSI2SD XMM0, R8D

• Show nanoBench command
• Results:
  • Instructions retired: 3.0
  • Core cycles: 8.0
  • Reference cycles: 7.98
  • UOPS_EXECUTED.THREAD: 3.0

Experiment 33 (source registers initialized by an instruction of the same kind)

• Instruction: CVTSI2SD XMM0, R8D
• Chain instruction: MOVQ R8, XMM0
• Chain latency: ≥1
• Code:

     0:	f2 41 0f 2a c0       	cvtsi2sd xmm0,r8d
     5:	66 49 0f 7e c0       	movq   r8,xmm0
  

• Init:

  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOVUPD XMM0, [R14];
  CVTSI2SD XMM0, R8D

• Show nanoBench command
• Results:
  • Instructions retired: 2.0
  • Core cycles: 8.0
  • Reference cycles: 6.43
  • UOPS_EXECUTED.THREAD: 3.0

Experiment 34 (source registers initialized by an instruction of the same kind, with dependency-breaking instructions)

• Instruction: CVTSI2SD XMM0, R8D
• Chain instructions: MOVQ R8, XMM0;MOVUPD XMM0, XMM15
• Chain latency: ≥1
• Code:

     0:	f2 41 0f 2a c0       	cvtsi2sd xmm0,r8d
     5:	66 49 0f 7e c0       	movq   r8,xmm0
     a:	66 41 0f 10 c7       	movupd xmm0,xmm15
  

• Init:

  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOVUPD XMM0, [R14];
  CVTSI2SD XMM0, R8D

• Show nanoBench command
• Results:
  • Instructions retired: 3.0
  • Core cycles: 8.0
  • Reference cycles: 6.21
  • UOPS_EXECUTED.THREAD: 3.0

Experiment 35 (source registers initialized by an instruction of the same kind)

• Instruction: CVTSI2SD XMM0, R8D
• Chain instruction: PEXTRB R8D, XMM0, 2
• Chain latency: ≥1
• Code:

     0:	f2 41 0f 2a c0       	cvtsi2sd xmm0,r8d
     5:	66 41 0f 3a 14 c0 02 	pextrb r8d,xmm0,0x2
  

• Init:

  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOVUPD XMM0, [R14];
  CVTSI2SD XMM0, R8D

• Show nanoBench command
• Results:
  • Instructions retired: 2.0
  • Core cycles: 9.0
  • Reference cycles: 8.2
  • UOPS_EXECUTED.THREAD: 4.0

Experiment 36 (source registers initialized by an instruction of the same kind, with dependency-breaking instructions)

• Instruction: CVTSI2SD XMM0, R8D
• Chain instructions: PEXTRB R8D, XMM0, 2;MOVUPD XMM0, XMM15
• Chain latency: ≥1
• Code:

     0:	f2 41 0f 2a c0       	cvtsi2sd xmm0,r8d
     5:	66 41 0f 3a 14 c0 02 	pextrb r8d,xmm0,0x2
     c:	66 41 0f 10 c7       	movupd xmm0,xmm15
  

• Init:

  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOVUPD XMM0, [R14];
  CVTSI2SD XMM0, R8D

• Show nanoBench command
• Results:
  • Instructions retired: 3.0
  • Core cycles: 9.0
  • Reference cycles: 7.98
  • UOPS_EXECUTED.THREAD: 4.0

Experiment 37 (source registers initialized by an instruction of the same kind)

• Instruction: CVTSI2SD XMM0, R8D
• Chain instruction: PEXTRD R8D, XMM0, 2
• Chain latency: ≥1
• Code:

     0:	f2 41 0f 2a c0       	cvtsi2sd xmm0,r8d
     5:	66 41 0f 3a 16 c0 02 	pextrd r8d,xmm0,0x2
  

• Init:

  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOVUPD XMM0, [R14];
  CVTSI2SD XMM0, R8D

• Show nanoBench command
• Results:
  • Instructions retired: 2.0
  • Core cycles: 9.0
  • Reference cycles: 8.42
  • UOPS_EXECUTED.THREAD: 4.0

Experiment 38 (source registers initialized by an instruction of the same kind, with dependency-breaking instructions)

• Instruction: CVTSI2SD XMM0, R8D
• Chain instructions: PEXTRD R8D, XMM0, 2;MOVUPD XMM0, XMM15
• Chain latency: ≥1
• Code:

     0:	f2 41 0f 2a c0       	cvtsi2sd xmm0,r8d
     5:	66 41 0f 3a 16 c0 02 	pextrd r8d,xmm0,0x2
     c:	66 41 0f 10 c7       	movupd xmm0,xmm15
  

• Init:

  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOVUPD XMM0, [R14];
  CVTSI2SD XMM0, R8D

• Show nanoBench command
• Results:
  • Instructions retired: 3.0
  • Core cycles: 9.0
  • Reference cycles: 7.98
  • UOPS_EXECUTED.THREAD: 4.0

Experiment 39 (source registers initialized by an instruction of the same kind)

• Instruction: CVTSI2SD XMM0, R8D
• Chain instruction: PEXTRQ R8, XMM0, 2
• Chain latency: ≥1
• Code:

     0:	f2 41 0f 2a c0       	cvtsi2sd xmm0,r8d
     5:	66 49 0f 3a 16 c0 02 	pextrq r8,xmm0,0x2
  

• Init:

  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOVUPD XMM0, [R14];
  CVTSI2SD XMM0, R8D

• Show nanoBench command
• Results:
  • Instructions retired: 2.0
  • Core cycles: 9.0
  • Reference cycles: 8.42
  • UOPS_EXECUTED.THREAD: 4.0

Experiment 40 (source registers initialized by an instruction of the same kind, with dependency-breaking instructions)

• Instruction: CVTSI2SD XMM0, R8D
• Chain instructions: PEXTRQ R8, XMM0, 2;MOVUPD XMM0, XMM15
• Chain latency: ≥1
• Code:

     0:	f2 41 0f 2a c0       	cvtsi2sd xmm0,r8d
     5:	66 49 0f 3a 16 c0 02 	pextrq r8,xmm0,0x2
     c:	66 41 0f 10 c7       	movupd xmm0,xmm15
  

• Init:

  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOVUPD XMM0, [R14];
  CVTSI2SD XMM0, R8D

• Show nanoBench command
• Results:
  • Instructions retired: 3.0
  • Core cycles: 9.0
  • Reference cycles: 7.54
  • UOPS_EXECUTED.THREAD: 4.0

Experiment 41 (source registers initialized by an instruction of the same kind)

• Instruction: CVTSI2SD XMM0, R8D
• Chain instruction: PEXTRW R8D, XMM0, 2
• Chain latency: ≥1
• Code:

     0:	f2 41 0f 2a c0       	cvtsi2sd xmm0,r8d
     5:	66 44 0f c5 c0 02    	pextrw r8d,xmm0,0x2
  

• Init:

  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOVUPD XMM0, [R14];
  CVTSI2SD XMM0, R8D

• Show nanoBench command
• Results:
  • Instructions retired: 2.0
  • Core cycles: 9.0
  • Reference cycles: 7.98
  • UOPS_EXECUTED.THREAD: 4.0

Experiment 42 (source registers initialized by an instruction of the same kind, with dependency-breaking instructions)

• Instruction: CVTSI2SD XMM0, R8D
• Chain instructions: PEXTRW R8D, XMM0, 2;MOVUPD XMM0, XMM15
• Chain latency: ≥1
• Code:

     0:	f2 41 0f 2a c0       	cvtsi2sd xmm0,r8d
     5:	66 44 0f c5 c0 02    	pextrw r8d,xmm0,0x2
     b:	66 41 0f 10 c7       	movupd xmm0,xmm15
  

• Init:

  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOVUPD XMM0, [R14];
  CVTSI2SD XMM0, R8D

• Show nanoBench command
• Results:
  • Instructions retired: 3.0
  • Core cycles: 9.0
  • Reference cycles: 7.98
  • UOPS_EXECUTED.THREAD: 4.0

Experiment 43 (source registers initialized by an instruction of the same kind)

• Instruction: CVTSI2SD XMM0, R8D
• Chain instruction: PMOVMSKB R8D, XMM0
• Chain latency: ≥1
• Code:

     0:	f2 41 0f 2a c0       	cvtsi2sd xmm0,r8d
     5:	66 44 0f d7 c0       	pmovmskb r8d,xmm0
  

• Init:

  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOVUPD XMM0, [R14];
  CVTSI2SD XMM0, R8D

• Show nanoBench command
• Results:
  • Instructions retired: 2.0
  • Core cycles: 8.0
  • Reference cycles: 7.98
  • UOPS_EXECUTED.THREAD: 3.0

Experiment 44 (source registers initialized by an instruction of the same kind, with dependency-breaking instructions)

• Instruction: CVTSI2SD XMM0, R8D
• Chain instructions: PMOVMSKB R8D, XMM0;MOVUPD XMM0, XMM15
• Chain latency: ≥1
• Code:

     0:	f2 41 0f 2a c0       	cvtsi2sd xmm0,r8d
     5:	66 44 0f d7 c0       	pmovmskb r8d,xmm0
     a:	66 41 0f 10 c7       	movupd xmm0,xmm15
  

• Init:

  VZEROALL;
  MOV RAX, 0x4000000040000000;
  MOV [R14+0], RAX;
  MOV [R14+8], RAX;
  MOVUPD XMM0, [R14];
  CVTSI2SD XMM0, R8D

• Show nanoBench command
• Results:
  • Instructions retired: 3.0
  • Core cycles: 8.0
  • Reference cycles: 6.43
  • UOPS_EXECUTED.THREAD: 3.0