XADD_LOCK (M32, R32)

Experiment 1

Instruction: LOCK XADD dword ptr [R14], R8D
Chain instructions: MOV R12D, [R14];MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;XOR R14, R12; XOR R14, R12
Chain latency: ≥22

Code:

   0:	f0 45 0f c1 06       	lock xadd DWORD PTR [r14],r8d
   5:	45 8b 26             	mov    r12d,DWORD PTR [r14]
   8:	4d 63 e4             	movsxd r12,r12d
   b:	4d 63 e4             	movsxd r12,r12d
   e:	4d 63 e4             	movsxd r12,r12d
  11:	4d 63 e4             	movsxd r12,r12d
  14:	4d 63 e4             	movsxd r12,r12d
  17:	4d 63 e4             	movsxd r12,r12d
  1a:	4d 63 e4             	movsxd r12,r12d
  1d:	4d 63 e4             	movsxd r12,r12d
  20:	4d 63 e4             	movsxd r12,r12d
  23:	4d 63 e4             	movsxd r12,r12d
  26:	4d 63 e4             	movsxd r12,r12d
  29:	4d 63 e4             	movsxd r12,r12d
  2c:	4d 63 e4             	movsxd r12,r12d
  2f:	4d 63 e4             	movsxd r12,r12d
  32:	4d 63 e4             	movsxd r12,r12d
  35:	4d 63 e4             	movsxd r12,r12d
  38:	4d 63 e4             	movsxd r12,r12d
  3b:	4d 63 e4             	movsxd r12,r12d
  3e:	4d 63 e4             	movsxd r12,r12d
  41:	4d 63 e4             	movsxd r12,r12d
  44:	4d 31 e6             	xor    r14,r12
  47:	4d 31 e6             	xor    r14,r12

Show nanoBench command
Results:
- Instructions retired: 24.0
- Core cycles: 41.95
- Reference cycles: 33.15
- UOPS_RETIRED.ALL: 28.0

Experiment 2 (with additional nop)

Instruction: LOCK XADD dword ptr [R14], R8D
Chain instructions: MOV R12D, [R14];MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;XOR R14, R12; XOR R14, R12;nop
Chain latency: ≥22

Code:

   0:	f0 45 0f c1 06       	lock xadd DWORD PTR [r14],r8d
   5:	45 8b 26             	mov    r12d,DWORD PTR [r14]
   8:	4d 63 e4             	movsxd r12,r12d
   b:	4d 63 e4             	movsxd r12,r12d
   e:	4d 63 e4             	movsxd r12,r12d
  11:	4d 63 e4             	movsxd r12,r12d
  14:	4d 63 e4             	movsxd r12,r12d
  17:	4d 63 e4             	movsxd r12,r12d
  1a:	4d 63 e4             	movsxd r12,r12d
  1d:	4d 63 e4             	movsxd r12,r12d
  20:	4d 63 e4             	movsxd r12,r12d
  23:	4d 63 e4             	movsxd r12,r12d
  26:	4d 63 e4             	movsxd r12,r12d
  29:	4d 63 e4             	movsxd r12,r12d
  2c:	4d 63 e4             	movsxd r12,r12d
  2f:	4d 63 e4             	movsxd r12,r12d
  32:	4d 63 e4             	movsxd r12,r12d
  35:	4d 63 e4             	movsxd r12,r12d
  38:	4d 63 e4             	movsxd r12,r12d
  3b:	4d 63 e4             	movsxd r12,r12d
  3e:	4d 63 e4             	movsxd r12,r12d
  41:	4d 63 e4             	movsxd r12,r12d
  44:	4d 31 e6             	xor    r14,r12
  47:	4d 31 e6             	xor    r14,r12
  4a:	90                   	nop

Show nanoBench command
Results:
- Instructions retired: 25.0
- Core cycles: 41.95
- Reference cycles: 33.28
- UOPS_RETIRED.ALL: 29.0

Latency operand 1 → 1 (address, index register): ≤20

Experiment 1

Instruction: LOCK XADD dword ptr [R14+R13], R8D
Chain instructions: MOV R12D, [R14+R13];MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;XOR R13, R12; XOR R13, R12
Chain latency: ≥22

Code:

   0:	f0 47 0f c1 04 2e    	lock xadd DWORD PTR [r14+r13*1],r8d
   6:	47 8b 24 2e          	mov    r12d,DWORD PTR [r14+r13*1]
   a:	4d 63 e4             	movsxd r12,r12d
   d:	4d 63 e4             	movsxd r12,r12d
  10:	4d 63 e4             	movsxd r12,r12d
  13:	4d 63 e4             	movsxd r12,r12d
  16:	4d 63 e4             	movsxd r12,r12d
  19:	4d 63 e4             	movsxd r12,r12d
  1c:	4d 63 e4             	movsxd r12,r12d
  1f:	4d 63 e4             	movsxd r12,r12d
  22:	4d 63 e4             	movsxd r12,r12d
  25:	4d 63 e4             	movsxd r12,r12d
  28:	4d 63 e4             	movsxd r12,r12d
  2b:	4d 63 e4             	movsxd r12,r12d
  2e:	4d 63 e4             	movsxd r12,r12d
  31:	4d 63 e4             	movsxd r12,r12d
  34:	4d 63 e4             	movsxd r12,r12d
  37:	4d 63 e4             	movsxd r12,r12d
  3a:	4d 63 e4             	movsxd r12,r12d
  3d:	4d 63 e4             	movsxd r12,r12d
  40:	4d 63 e4             	movsxd r12,r12d
  43:	4d 63 e4             	movsxd r12,r12d
  46:	4d 31 e5             	xor    r13,r12
  49:	4d 31 e5             	xor    r13,r12

Init:
```
XOR R13, R13
```
Show nanoBench command
Results:
- Instructions retired: 24.0
- Core cycles: 41.96
- Reference cycles: 33.54
- UOPS_RETIRED.ALL: 28.0

Experiment 2 (with additional nop)

Instruction: LOCK XADD dword ptr [R14+R13], R8D
Chain instructions: MOV R12D, [R14+R13];MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;XOR R13, R12; XOR R13, R12;nop
Chain latency: ≥22

Code:

   0:	f0 47 0f c1 04 2e    	lock xadd DWORD PTR [r14+r13*1],r8d
   6:	47 8b 24 2e          	mov    r12d,DWORD PTR [r14+r13*1]
   a:	4d 63 e4             	movsxd r12,r12d
   d:	4d 63 e4             	movsxd r12,r12d
  10:	4d 63 e4             	movsxd r12,r12d
  13:	4d 63 e4             	movsxd r12,r12d
  16:	4d 63 e4             	movsxd r12,r12d
  19:	4d 63 e4             	movsxd r12,r12d
  1c:	4d 63 e4             	movsxd r12,r12d
  1f:	4d 63 e4             	movsxd r12,r12d
  22:	4d 63 e4             	movsxd r12,r12d
  25:	4d 63 e4             	movsxd r12,r12d
  28:	4d 63 e4             	movsxd r12,r12d
  2b:	4d 63 e4             	movsxd r12,r12d
  2e:	4d 63 e4             	movsxd r12,r12d
  31:	4d 63 e4             	movsxd r12,r12d
  34:	4d 63 e4             	movsxd r12,r12d
  37:	4d 63 e4             	movsxd r12,r12d
  3a:	4d 63 e4             	movsxd r12,r12d
  3d:	4d 63 e4             	movsxd r12,r12d
  40:	4d 63 e4             	movsxd r12,r12d
  43:	4d 63 e4             	movsxd r12,r12d
  46:	4d 31 e5             	xor    r13,r12
  49:	4d 31 e5             	xor    r13,r12
  4c:	90                   	nop

Init:
```
XOR R13, R13
```
Show nanoBench command
Results:
- Instructions retired: 25.0
- Core cycles: 41.98
- Reference cycles: 33.54
- UOPS_RETIRED.ALL: 29.0

Latency operand 1 → 1 (memory): 18

Experiment 1

Instruction: LOCK XADD dword ptr [R14], R8D

Code:

   0:	f0 45 0f c1 06       	lock xadd DWORD PTR [r14],r8d

Show nanoBench command
Results:
- Instructions retired: 1.0
- Core cycles: 18.13
- Reference cycles: 14.3
- UOPS_RETIRED.ALL: 5.0

Experiment 2 (with dependency-breaking instructions)

Instruction: LOCK XADD dword ptr [R14], R8D
Chain instruction: MOV R8D, 0

Code:

   0:	f0 45 0f c1 06       	lock xadd DWORD PTR [r14],r8d
   5:	41 b8 00 00 00 00    	mov    r8d,0x0

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 18.13
- Reference cycles: 14.56
- UOPS_RETIRED.ALL: 6.0

Experiment 3

Instruction: LOCK XADD dword ptr [R14], R8D
Chain instructions: MOV R12D, [R14];MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOV [R14], R12D
Chain latency: 10

Code:

   0:	f0 45 0f c1 06       	lock xadd DWORD PTR [r14],r8d
   5:	45 8b 26             	mov    r12d,DWORD PTR [r14]
   8:	4d 63 e4             	movsxd r12,r12d
   b:	4d 63 e4             	movsxd r12,r12d
   e:	4d 63 e4             	movsxd r12,r12d
  11:	4d 63 e4             	movsxd r12,r12d
  14:	4d 63 e4             	movsxd r12,r12d
  17:	4d 63 e4             	movsxd r12,r12d
  1a:	4d 63 e4             	movsxd r12,r12d
  1d:	4d 63 e4             	movsxd r12,r12d
  20:	4d 63 e4             	movsxd r12,r12d
  23:	4d 63 e4             	movsxd r12,r12d
  26:	45 89 26             	mov    DWORD PTR [r14],r12d

Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 29.39
- Reference cycles: 23.27
- UOPS_RETIRED.ALL: 17.0

Experiment 4 (with dependency-breaking instructions)

Instruction: LOCK XADD dword ptr [R14], R8D
Chain instructions: MOV R12D, [R14];MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOVSX R12, R12D;MOV [R14], R12D;MOV R8D, 0
Chain latency: 10

Code:

   0:	f0 45 0f c1 06       	lock xadd DWORD PTR [r14],r8d
   5:	45 8b 26             	mov    r12d,DWORD PTR [r14]
   8:	4d 63 e4             	movsxd r12,r12d
   b:	4d 63 e4             	movsxd r12,r12d
   e:	4d 63 e4             	movsxd r12,r12d
  11:	4d 63 e4             	movsxd r12,r12d
  14:	4d 63 e4             	movsxd r12,r12d
  17:	4d 63 e4             	movsxd r12,r12d
  1a:	4d 63 e4             	movsxd r12,r12d
  1d:	4d 63 e4             	movsxd r12,r12d
  20:	4d 63 e4             	movsxd r12,r12d
  23:	4d 63 e4             	movsxd r12,r12d
  26:	45 89 26             	mov    DWORD PTR [r14],r12d
  29:	41 b8 00 00 00 00    	mov    r8d,0x0

Show nanoBench command
Results:
- Instructions retired: 14.0
- Core cycles: 29.36
- Reference cycles: 23.4
- UOPS_RETIRED.ALL: 18.0

Latency operand 1 → 2 (address, base register): 14

Latency operand 1 → 2 (address, index register): 14

Latency operand 1 → 2 (memory): ≤14

Latency operand 1 → 3 (address, base register): 16

Experiment 1

Instruction: LOCK XADD dword ptr [R14], R8D
Chain instruction: CMOVC R14, R14
Chain latency: 2

Code:

   0:	f0 45 0f c1 06       	lock xadd DWORD PTR [r14],r8d
   5:	4d 0f 42 f6          	cmovb  r14,r14

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 17.98
- Reference cycles: 14.43
- UOPS_RETIRED.ALL: 6.0

Experiment 2 (with dependency-breaking instructions)

Instruction: LOCK XADD dword ptr [R14], R8D
Chain instructions: CMOVC R14, R14;MOV dword ptr [R14], 0
Chain latency: 2

Code:

   0:	f0 45 0f c1 06       	lock xadd DWORD PTR [r14],r8d
   5:	4d 0f 42 f6          	cmovb  r14,r14
   9:	41 c7 06 00 00 00 00 	mov    DWORD PTR [r14],0x0

Show nanoBench command
Results:
- Instructions retired: 3.0
- Core cycles: 33.0
- Reference cycles: 25.74
- UOPS_RETIRED.ALL: 7.0

Experiment 3

Instruction: LOCK XADD dword ptr [R14], R8D
Chain instruction: CMOVS R14, R14
Chain latency: 2

Code:

   0:	f0 45 0f c1 06       	lock xadd DWORD PTR [r14],r8d
   5:	4d 0f 48 f6          	cmovs  r14,r14

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 17.98
- Reference cycles: 14.3
- UOPS_RETIRED.ALL: 6.0

Experiment 4 (with dependency-breaking instructions)

Instruction: LOCK XADD dword ptr [R14], R8D
Chain instructions: CMOVS R14, R14;MOV dword ptr [R14], 0
Chain latency: 2

Code:

   0:	f0 45 0f c1 06       	lock xadd DWORD PTR [r14],r8d
   5:	4d 0f 48 f6          	cmovs  r14,r14
   9:	41 c7 06 00 00 00 00 	mov    DWORD PTR [r14],0x0

Show nanoBench command
Results:
- Instructions retired: 3.0
- Core cycles: 32.99
- Reference cycles: 26.13
- UOPS_RETIRED.ALL: 7.0

Experiment 5

Instruction: LOCK XADD dword ptr [R14], R8D
Chain instruction: CMOVZ R14, R14
Chain latency: 2

Code:

   0:	f0 45 0f c1 06       	lock xadd DWORD PTR [r14],r8d
   5:	4d 0f 44 f6          	cmove  r14,r14

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 17.98
- Reference cycles: 14.3
- UOPS_RETIRED.ALL: 6.0

Experiment 6 (with dependency-breaking instructions)

Instruction: LOCK XADD dword ptr [R14], R8D
Chain instructions: CMOVZ R14, R14;MOV dword ptr [R14], 0
Chain latency: 2

Code:

   0:	f0 45 0f c1 06       	lock xadd DWORD PTR [r14],r8d
   5:	4d 0f 44 f6          	cmove  r14,r14
   9:	41 c7 06 00 00 00 00 	mov    DWORD PTR [r14],0x0

Show nanoBench command
Results:
- Instructions retired: 3.0
- Core cycles: 33.0
- Reference cycles: 25.87
- UOPS_RETIRED.ALL: 7.0

Experiment 7

Instruction: LOCK XADD dword ptr [R14], R8D
Chain instruction: CMOVO R14, R14
Chain latency: 2

Code:

   0:	f0 45 0f c1 06       	lock xadd DWORD PTR [r14],r8d
   5:	4d 0f 40 f6          	cmovo  r14,r14

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 18.0
- Reference cycles: 14.43
- UOPS_RETIRED.ALL: 6.0

Experiment 8 (with dependency-breaking instructions)

Instruction: LOCK XADD dword ptr [R14], R8D
Chain instructions: CMOVO R14, R14;MOV dword ptr [R14], 0
Chain latency: 2

Code:

   0:	f0 45 0f c1 06       	lock xadd DWORD PTR [r14],r8d
   5:	4d 0f 40 f6          	cmovo  r14,r14
   9:	41 c7 06 00 00 00 00 	mov    DWORD PTR [r14],0x0

Show nanoBench command
Results:
- Instructions retired: 3.0
- Core cycles: 33.0
- Reference cycles: 25.87
- UOPS_RETIRED.ALL: 7.0

Experiment 9

Instruction: LOCK XADD dword ptr [R14], R8D
Chain instruction: CMOVP R14, R14
Chain latency: 2

Code:

   0:	f0 45 0f c1 06       	lock xadd DWORD PTR [r14],r8d
   5:	4d 0f 4a f6          	cmovp  r14,r14

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 18.0
- Reference cycles: 14.04
- UOPS_RETIRED.ALL: 6.0

Experiment 10 (with dependency-breaking instructions)

Instruction: LOCK XADD dword ptr [R14], R8D
Chain instructions: CMOVP R14, R14;MOV dword ptr [R14], 0
Chain latency: 2

Code:

   0:	f0 45 0f c1 06       	lock xadd DWORD PTR [r14],r8d
   5:	4d 0f 4a f6          	cmovp  r14,r14
   9:	41 c7 06 00 00 00 00 	mov    DWORD PTR [r14],0x0

Show nanoBench command
Results:
- Instructions retired: 3.0
- Core cycles: 32.96
- Reference cycles: 26.13
- UOPS_RETIRED.ALL: 7.0

Latency operand 1 → 3 (address, index register): 16

Experiment 1

Instruction: LOCK XADD dword ptr [R14+R13], R8D
Chain instruction: CMOVC R13, R13
Chain latency: 2

Code:

   0:	f0 47 0f c1 04 2e    	lock xadd DWORD PTR [r14+r13*1],r8d
   6:	4d 0f 42 ed          	cmovb  r13,r13

Init:
```
XOR R13, R13
```
Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 18.0
- Reference cycles: 14.43
- UOPS_RETIRED.ALL: 6.0

Experiment 2 (with dependency-breaking instructions)

Instruction: LOCK XADD dword ptr [R14+R13], R8D
Chain instructions: CMOVC R13, R13;MOV dword ptr [R14], 0
Chain latency: 2

Code:

   0:	f0 47 0f c1 04 2e    	lock xadd DWORD PTR [r14+r13*1],r8d
   6:	4d 0f 42 ed          	cmovb  r13,r13
   a:	41 c7 06 00 00 00 00 	mov    DWORD PTR [r14],0x0

Init:
```
XOR R13, R13
```
Show nanoBench command
Results:
- Instructions retired: 3.0
- Core cycles: 18.99
- Reference cycles: 14.82
- UOPS_RETIRED.ALL: 7.0

Experiment 3

Instruction: LOCK XADD dword ptr [R14+R13], R8D
Chain instruction: CMOVS R13, R13
Chain latency: 2

Code:

   0:	f0 47 0f c1 04 2e    	lock xadd DWORD PTR [r14+r13*1],r8d
   6:	4d 0f 48 ed          	cmovs  r13,r13

Init:
```
XOR R13, R13
```
Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 17.99
- Reference cycles: 14.04
- UOPS_RETIRED.ALL: 6.0

Experiment 4 (with dependency-breaking instructions)

Instruction: LOCK XADD dword ptr [R14+R13], R8D
Chain instructions: CMOVS R13, R13;MOV dword ptr [R14], 0
Chain latency: 2

Code:

   0:	f0 47 0f c1 04 2e    	lock xadd DWORD PTR [r14+r13*1],r8d
   6:	4d 0f 48 ed          	cmovs  r13,r13
   a:	41 c7 06 00 00 00 00 	mov    DWORD PTR [r14],0x0

Init:
```
XOR R13, R13
```
Show nanoBench command
Results:
- Instructions retired: 3.0
- Core cycles: 19.82
- Reference cycles: 26.26
- UOPS_RETIRED.ALL: 7.0

Experiment 5

Instruction: LOCK XADD dword ptr [R14+R13], R8D
Chain instruction: CMOVZ R13, R13
Chain latency: 2

Code:

   0:	f0 47 0f c1 04 2e    	lock xadd DWORD PTR [r14+r13*1],r8d
   6:	4d 0f 44 ed          	cmove  r13,r13

Init:
```
XOR R13, R13
```
Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 17.99
- Reference cycles: 14.17
- UOPS_RETIRED.ALL: 6.0

Experiment 6 (with dependency-breaking instructions)

Instruction: LOCK XADD dword ptr [R14+R13], R8D
Chain instructions: CMOVZ R13, R13;MOV dword ptr [R14], 0
Chain latency: 2

Code:

   0:	f0 47 0f c1 04 2e    	lock xadd DWORD PTR [r14+r13*1],r8d
   6:	4d 0f 44 ed          	cmove  r13,r13
   a:	41 c7 06 00 00 00 00 	mov    DWORD PTR [r14],0x0

Init:
```
XOR R13, R13
```
Show nanoBench command
Results:
- Instructions retired: 3.0
- Core cycles: 19.83
- Reference cycles: 15.73
- UOPS_RETIRED.ALL: 7.0

Experiment 7

Instruction: LOCK XADD dword ptr [R14+R13], R8D
Chain instruction: CMOVO R13, R13
Chain latency: 2

Code:

   0:	f0 47 0f c1 04 2e    	lock xadd DWORD PTR [r14+r13*1],r8d
   6:	4d 0f 40 ed          	cmovo  r13,r13

Init:
```
XOR R13, R13
```
Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 18.0
- Reference cycles: 14.17
- UOPS_RETIRED.ALL: 6.0

Experiment 8 (with dependency-breaking instructions)

Instruction: LOCK XADD dword ptr [R14+R13], R8D
Chain instructions: CMOVO R13, R13;MOV dword ptr [R14], 0
Chain latency: 2

Code:

   0:	f0 47 0f c1 04 2e    	lock xadd DWORD PTR [r14+r13*1],r8d
   6:	4d 0f 40 ed          	cmovo  r13,r13
   a:	41 c7 06 00 00 00 00 	mov    DWORD PTR [r14],0x0

Init:
```
XOR R13, R13
```
Show nanoBench command
Results:
- Instructions retired: 3.0
- Core cycles: 19.83
- Reference cycles: 15.73
- UOPS_RETIRED.ALL: 7.0

Experiment 9

Instruction: LOCK XADD dword ptr [R14+R13], R8D
Chain instruction: CMOVP R13, R13
Chain latency: 2

Code:

   0:	f0 47 0f c1 04 2e    	lock xadd DWORD PTR [r14+r13*1],r8d
   6:	4d 0f 4a ed          	cmovp  r13,r13

Init:
```
XOR R13, R13
```
Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 18.0
- Reference cycles: 14.3
- UOPS_RETIRED.ALL: 6.0

Experiment 10 (with dependency-breaking instructions)

Instruction: LOCK XADD dword ptr [R14+R13], R8D
Chain instructions: CMOVP R13, R13;MOV dword ptr [R14], 0
Chain latency: 2

Code:

   0:	f0 47 0f c1 04 2e    	lock xadd DWORD PTR [r14+r13*1],r8d
   6:	4d 0f 4a ed          	cmovp  r13,r13
   a:	41 c7 06 00 00 00 00 	mov    DWORD PTR [r14],0x0

Init:
```
XOR R13, R13
```
Show nanoBench command
Results:
- Instructions retired: 3.0
- Core cycles: 19.0
- Reference cycles: 15.21
- UOPS_RETIRED.ALL: 7.0

Latency operand 1 → 3 (memory): ≤14

Experiment 1

Instruction: LOCK XADD dword ptr [R14], R8D
Chain instructions: CMOVC R12, R12;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;mov [R14], R12D
Chain latency: ≥22

Code:

   0:	f0 45 0f c1 06       	lock xadd DWORD PTR [r14],r8d
   5:	4d 0f 42 e4          	cmovb  r12,r12
   9:	4d 63 e4             	movsxd r12,r12d
   c:	4d 63 e4             	movsxd r12,r12d
   f:	4d 63 e4             	movsxd r12,r12d
  12:	4d 63 e4             	movsxd r12,r12d
  15:	4d 63 e4             	movsxd r12,r12d
  18:	4d 63 e4             	movsxd r12,r12d
  1b:	4d 63 e4             	movsxd r12,r12d
  1e:	4d 63 e4             	movsxd r12,r12d
  21:	4d 63 e4             	movsxd r12,r12d
  24:	4d 63 e4             	movsxd r12,r12d
  27:	4d 63 e4             	movsxd r12,r12d
  2a:	4d 63 e4             	movsxd r12,r12d
  2d:	4d 63 e4             	movsxd r12,r12d
  30:	4d 63 e4             	movsxd r12,r12d
  33:	4d 63 e4             	movsxd r12,r12d
  36:	4d 63 e4             	movsxd r12,r12d
  39:	4d 63 e4             	movsxd r12,r12d
  3c:	4d 63 e4             	movsxd r12,r12d
  3f:	4d 63 e4             	movsxd r12,r12d
  42:	4d 63 e4             	movsxd r12,r12d
  45:	45 89 26             	mov    DWORD PTR [r14],r12d

Show nanoBench command
Results:
- Instructions retired: 23.0
- Core cycles: 36.15
- Reference cycles: 28.73
- UOPS_RETIRED.ALL: 27.0

Experiment 2

Instruction: LOCK XADD dword ptr [R14], R8D
Chain instructions: CMOVS R12, R12;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;mov [R14], R12D
Chain latency: ≥22

Code:

   0:	f0 45 0f c1 06       	lock xadd DWORD PTR [r14],r8d
   5:	4d 0f 48 e4          	cmovs  r12,r12
   9:	4d 63 e4             	movsxd r12,r12d
   c:	4d 63 e4             	movsxd r12,r12d
   f:	4d 63 e4             	movsxd r12,r12d
  12:	4d 63 e4             	movsxd r12,r12d
  15:	4d 63 e4             	movsxd r12,r12d
  18:	4d 63 e4             	movsxd r12,r12d
  1b:	4d 63 e4             	movsxd r12,r12d
  1e:	4d 63 e4             	movsxd r12,r12d
  21:	4d 63 e4             	movsxd r12,r12d
  24:	4d 63 e4             	movsxd r12,r12d
  27:	4d 63 e4             	movsxd r12,r12d
  2a:	4d 63 e4             	movsxd r12,r12d
  2d:	4d 63 e4             	movsxd r12,r12d
  30:	4d 63 e4             	movsxd r12,r12d
  33:	4d 63 e4             	movsxd r12,r12d
  36:	4d 63 e4             	movsxd r12,r12d
  39:	4d 63 e4             	movsxd r12,r12d
  3c:	4d 63 e4             	movsxd r12,r12d
  3f:	4d 63 e4             	movsxd r12,r12d
  42:	4d 63 e4             	movsxd r12,r12d
  45:	45 89 26             	mov    DWORD PTR [r14],r12d

Show nanoBench command
Results:
- Instructions retired: 23.0
- Core cycles: 36.15
- Reference cycles: 28.6
- UOPS_RETIRED.ALL: 27.0

Experiment 3

Instruction: LOCK XADD dword ptr [R14], R8D
Chain instructions: CMOVZ R12, R12;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;mov [R14], R12D
Chain latency: ≥22

Code:

   0:	f0 45 0f c1 06       	lock xadd DWORD PTR [r14],r8d
   5:	4d 0f 44 e4          	cmove  r12,r12
   9:	4d 63 e4             	movsxd r12,r12d
   c:	4d 63 e4             	movsxd r12,r12d
   f:	4d 63 e4             	movsxd r12,r12d
  12:	4d 63 e4             	movsxd r12,r12d
  15:	4d 63 e4             	movsxd r12,r12d
  18:	4d 63 e4             	movsxd r12,r12d
  1b:	4d 63 e4             	movsxd r12,r12d
  1e:	4d 63 e4             	movsxd r12,r12d
  21:	4d 63 e4             	movsxd r12,r12d
  24:	4d 63 e4             	movsxd r12,r12d
  27:	4d 63 e4             	movsxd r12,r12d
  2a:	4d 63 e4             	movsxd r12,r12d
  2d:	4d 63 e4             	movsxd r12,r12d
  30:	4d 63 e4             	movsxd r12,r12d
  33:	4d 63 e4             	movsxd r12,r12d
  36:	4d 63 e4             	movsxd r12,r12d
  39:	4d 63 e4             	movsxd r12,r12d
  3c:	4d 63 e4             	movsxd r12,r12d
  3f:	4d 63 e4             	movsxd r12,r12d
  42:	4d 63 e4             	movsxd r12,r12d
  45:	45 89 26             	mov    DWORD PTR [r14],r12d

Show nanoBench command
Results:
- Instructions retired: 23.0
- Core cycles: 35.98
- Reference cycles: 28.21
- UOPS_RETIRED.ALL: 27.0

Experiment 4

Instruction: LOCK XADD dword ptr [R14], R8D
Chain instructions: CMOVO R12, R12;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;mov [R14], R12D
Chain latency: ≥22

Code:

   0:	f0 45 0f c1 06       	lock xadd DWORD PTR [r14],r8d
   5:	4d 0f 40 e4          	cmovo  r12,r12
   9:	4d 63 e4             	movsxd r12,r12d
   c:	4d 63 e4             	movsxd r12,r12d
   f:	4d 63 e4             	movsxd r12,r12d
  12:	4d 63 e4             	movsxd r12,r12d
  15:	4d 63 e4             	movsxd r12,r12d
  18:	4d 63 e4             	movsxd r12,r12d
  1b:	4d 63 e4             	movsxd r12,r12d
  1e:	4d 63 e4             	movsxd r12,r12d
  21:	4d 63 e4             	movsxd r12,r12d
  24:	4d 63 e4             	movsxd r12,r12d
  27:	4d 63 e4             	movsxd r12,r12d
  2a:	4d 63 e4             	movsxd r12,r12d
  2d:	4d 63 e4             	movsxd r12,r12d
  30:	4d 63 e4             	movsxd r12,r12d
  33:	4d 63 e4             	movsxd r12,r12d
  36:	4d 63 e4             	movsxd r12,r12d
  39:	4d 63 e4             	movsxd r12,r12d
  3c:	4d 63 e4             	movsxd r12,r12d
  3f:	4d 63 e4             	movsxd r12,r12d
  42:	4d 63 e4             	movsxd r12,r12d
  45:	45 89 26             	mov    DWORD PTR [r14],r12d

Show nanoBench command
Results:
- Instructions retired: 23.0
- Core cycles: 35.98
- Reference cycles: 28.34
- UOPS_RETIRED.ALL: 27.0

Experiment 5

Instruction: LOCK XADD dword ptr [R14], R8D
Chain instructions: CMOVP R12, R12;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;MOVSX R12, R12d;mov [R14], R12D
Chain latency: ≥22

Code:

   0:	f0 45 0f c1 06       	lock xadd DWORD PTR [r14],r8d
   5:	4d 0f 4a e4          	cmovp  r12,r12
   9:	4d 63 e4             	movsxd r12,r12d
   c:	4d 63 e4             	movsxd r12,r12d
   f:	4d 63 e4             	movsxd r12,r12d
  12:	4d 63 e4             	movsxd r12,r12d
  15:	4d 63 e4             	movsxd r12,r12d
  18:	4d 63 e4             	movsxd r12,r12d
  1b:	4d 63 e4             	movsxd r12,r12d
  1e:	4d 63 e4             	movsxd r12,r12d
  21:	4d 63 e4             	movsxd r12,r12d
  24:	4d 63 e4             	movsxd r12,r12d
  27:	4d 63 e4             	movsxd r12,r12d
  2a:	4d 63 e4             	movsxd r12,r12d
  2d:	4d 63 e4             	movsxd r12,r12d
  30:	4d 63 e4             	movsxd r12,r12d
  33:	4d 63 e4             	movsxd r12,r12d
  36:	4d 63 e4             	movsxd r12,r12d
  39:	4d 63 e4             	movsxd r12,r12d
  3c:	4d 63 e4             	movsxd r12,r12d
  3f:	4d 63 e4             	movsxd r12,r12d
  42:	4d 63 e4             	movsxd r12,r12d
  45:	45 89 26             	mov    DWORD PTR [r14],r12d

Show nanoBench command
Results:
- Instructions retired: 23.0
- Core cycles: 36.0
- Reference cycles: 28.21
- UOPS_RETIRED.ALL: 27.0

Latency operand 2 → 1: ≤17

Latency operand 2 → 2: 12

Experiment 1

Instruction: LOCK XADD dword ptr [R14], R8D
Chain instructions: MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D
Chain latency: 21

Code:

   0:	f0 45 0f c1 06       	lock xadd DWORD PTR [r14],r8d
   5:	4d 63 c0             	movsxd r8,r8d
   8:	4d 63 c0             	movsxd r8,r8d
   b:	4d 63 c0             	movsxd r8,r8d
   e:	4d 63 c0             	movsxd r8,r8d
  11:	4d 63 c0             	movsxd r8,r8d
  14:	4d 63 c0             	movsxd r8,r8d
  17:	4d 63 c0             	movsxd r8,r8d
  1a:	4d 63 c0             	movsxd r8,r8d
  1d:	4d 63 c0             	movsxd r8,r8d
  20:	4d 63 c0             	movsxd r8,r8d
  23:	4d 63 c0             	movsxd r8,r8d
  26:	4d 63 c0             	movsxd r8,r8d
  29:	4d 63 c0             	movsxd r8,r8d
  2c:	4d 63 c0             	movsxd r8,r8d
  2f:	4d 63 c0             	movsxd r8,r8d
  32:	4d 63 c0             	movsxd r8,r8d
  35:	4d 63 c0             	movsxd r8,r8d
  38:	4d 63 c0             	movsxd r8,r8d
  3b:	4d 63 c0             	movsxd r8,r8d
  3e:	4d 63 c0             	movsxd r8,r8d
  41:	4d 63 c0             	movsxd r8,r8d

Show nanoBench command
Results:
- Instructions retired: 22.0
- Core cycles: 33.47
- Reference cycles: 26.78
- UOPS_RETIRED.ALL: 26.0

Experiment 2

Instruction: LOCK XADD dword ptr [R14], R8D

Code:

   0:	f0 45 0f c1 06       	lock xadd DWORD PTR [r14],r8d

Show nanoBench command
Results:
- Instructions retired: 1.0
- Core cycles: 18.0
- Reference cycles: 14.3
- UOPS_RETIRED.ALL: 5.0

Experiment 3 (with dependency-breaking instructions)

Instruction: LOCK XADD dword ptr [R14], R8D
Chain instruction: MOV dword ptr [R14], 0

Code:

   0:	f0 45 0f c1 06       	lock xadd DWORD PTR [r14],r8d
   5:	41 c7 06 00 00 00 00 	mov    DWORD PTR [r14],0x0

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 20.97
- Reference cycles: 16.51
- UOPS_RETIRED.ALL: 6.0

Latency operand 2 → 3: 12

Experiment 1

Instruction: LOCK XADD dword ptr [R14], R8D
Chain instructions: CMOVC R15D, R15D;MOVSX R8, R15D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D
Chain latency: 23

Code:

   0:	f0 45 0f c1 06       	lock xadd DWORD PTR [r14],r8d
   5:	45 0f 42 ff          	cmovb  r15d,r15d
   9:	4d 63 c7             	movsxd r8,r15d
   c:	4d 63 c0             	movsxd r8,r8d
   f:	4d 63 c0             	movsxd r8,r8d
  12:	4d 63 c0             	movsxd r8,r8d
  15:	4d 63 c0             	movsxd r8,r8d
  18:	4d 63 c0             	movsxd r8,r8d
  1b:	4d 63 c0             	movsxd r8,r8d
  1e:	4d 63 c0             	movsxd r8,r8d
  21:	4d 63 c0             	movsxd r8,r8d
  24:	4d 63 c0             	movsxd r8,r8d
  27:	4d 63 c0             	movsxd r8,r8d
  2a:	4d 63 c0             	movsxd r8,r8d
  2d:	4d 63 c0             	movsxd r8,r8d
  30:	4d 63 c0             	movsxd r8,r8d
  33:	4d 63 c0             	movsxd r8,r8d
  36:	4d 63 c0             	movsxd r8,r8d
  39:	4d 63 c0             	movsxd r8,r8d
  3c:	4d 63 c0             	movsxd r8,r8d
  3f:	4d 63 c0             	movsxd r8,r8d
  42:	4d 63 c0             	movsxd r8,r8d
  45:	4d 63 c0             	movsxd r8,r8d

Show nanoBench command
Results:
- Instructions retired: 23.0
- Core cycles: 35.48
- Reference cycles: 27.82
- UOPS_RETIRED.ALL: 27.0

Experiment 2

Instruction: LOCK XADD dword ptr [R14], R8D
Chain instructions: CMOVS R15D, R15D;MOVSX R8, R15D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D
Chain latency: 23

Code:

   0:	f0 45 0f c1 06       	lock xadd DWORD PTR [r14],r8d
   5:	45 0f 48 ff          	cmovs  r15d,r15d
   9:	4d 63 c7             	movsxd r8,r15d
   c:	4d 63 c0             	movsxd r8,r8d
   f:	4d 63 c0             	movsxd r8,r8d
  12:	4d 63 c0             	movsxd r8,r8d
  15:	4d 63 c0             	movsxd r8,r8d
  18:	4d 63 c0             	movsxd r8,r8d
  1b:	4d 63 c0             	movsxd r8,r8d
  1e:	4d 63 c0             	movsxd r8,r8d
  21:	4d 63 c0             	movsxd r8,r8d
  24:	4d 63 c0             	movsxd r8,r8d
  27:	4d 63 c0             	movsxd r8,r8d
  2a:	4d 63 c0             	movsxd r8,r8d
  2d:	4d 63 c0             	movsxd r8,r8d
  30:	4d 63 c0             	movsxd r8,r8d
  33:	4d 63 c0             	movsxd r8,r8d
  36:	4d 63 c0             	movsxd r8,r8d
  39:	4d 63 c0             	movsxd r8,r8d
  3c:	4d 63 c0             	movsxd r8,r8d
  3f:	4d 63 c0             	movsxd r8,r8d
  42:	4d 63 c0             	movsxd r8,r8d
  45:	4d 63 c0             	movsxd r8,r8d

Show nanoBench command
Results:
- Instructions retired: 23.0
- Core cycles: 35.48
- Reference cycles: 28.08
- UOPS_RETIRED.ALL: 27.0

Experiment 3

Instruction: LOCK XADD dword ptr [R14], R8D
Chain instructions: CMOVZ R15D, R15D;MOVSX R8, R15D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D
Chain latency: 23

Code:

   0:	f0 45 0f c1 06       	lock xadd DWORD PTR [r14],r8d
   5:	45 0f 44 ff          	cmove  r15d,r15d
   9:	4d 63 c7             	movsxd r8,r15d
   c:	4d 63 c0             	movsxd r8,r8d
   f:	4d 63 c0             	movsxd r8,r8d
  12:	4d 63 c0             	movsxd r8,r8d
  15:	4d 63 c0             	movsxd r8,r8d
  18:	4d 63 c0             	movsxd r8,r8d
  1b:	4d 63 c0             	movsxd r8,r8d
  1e:	4d 63 c0             	movsxd r8,r8d
  21:	4d 63 c0             	movsxd r8,r8d
  24:	4d 63 c0             	movsxd r8,r8d
  27:	4d 63 c0             	movsxd r8,r8d
  2a:	4d 63 c0             	movsxd r8,r8d
  2d:	4d 63 c0             	movsxd r8,r8d
  30:	4d 63 c0             	movsxd r8,r8d
  33:	4d 63 c0             	movsxd r8,r8d
  36:	4d 63 c0             	movsxd r8,r8d
  39:	4d 63 c0             	movsxd r8,r8d
  3c:	4d 63 c0             	movsxd r8,r8d
  3f:	4d 63 c0             	movsxd r8,r8d
  42:	4d 63 c0             	movsxd r8,r8d
  45:	4d 63 c0             	movsxd r8,r8d

Show nanoBench command
Results:
- Instructions retired: 23.0
- Core cycles: 35.5
- Reference cycles: 28.34
- UOPS_RETIRED.ALL: 27.0

Experiment 4

Instruction: LOCK XADD dword ptr [R14], R8D
Chain instructions: CMOVO R15D, R15D;MOVSX R8, R15D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D
Chain latency: 23

Code:

   0:	f0 45 0f c1 06       	lock xadd DWORD PTR [r14],r8d
   5:	45 0f 40 ff          	cmovo  r15d,r15d
   9:	4d 63 c7             	movsxd r8,r15d
   c:	4d 63 c0             	movsxd r8,r8d
   f:	4d 63 c0             	movsxd r8,r8d
  12:	4d 63 c0             	movsxd r8,r8d
  15:	4d 63 c0             	movsxd r8,r8d
  18:	4d 63 c0             	movsxd r8,r8d
  1b:	4d 63 c0             	movsxd r8,r8d
  1e:	4d 63 c0             	movsxd r8,r8d
  21:	4d 63 c0             	movsxd r8,r8d
  24:	4d 63 c0             	movsxd r8,r8d
  27:	4d 63 c0             	movsxd r8,r8d
  2a:	4d 63 c0             	movsxd r8,r8d
  2d:	4d 63 c0             	movsxd r8,r8d
  30:	4d 63 c0             	movsxd r8,r8d
  33:	4d 63 c0             	movsxd r8,r8d
  36:	4d 63 c0             	movsxd r8,r8d
  39:	4d 63 c0             	movsxd r8,r8d
  3c:	4d 63 c0             	movsxd r8,r8d
  3f:	4d 63 c0             	movsxd r8,r8d
  42:	4d 63 c0             	movsxd r8,r8d
  45:	4d 63 c0             	movsxd r8,r8d

Show nanoBench command
Results:
- Instructions retired: 23.0
- Core cycles: 35.5
- Reference cycles: 28.08
- UOPS_RETIRED.ALL: 27.0

Experiment 5

Instruction: LOCK XADD dword ptr [R14], R8D
Chain instructions: CMOVP R15D, R15D;MOVSX R8, R15D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D
Chain latency: 23

Code:

   0:	f0 45 0f c1 06       	lock xadd DWORD PTR [r14],r8d
   5:	45 0f 4a ff          	cmovp  r15d,r15d
   9:	4d 63 c7             	movsxd r8,r15d
   c:	4d 63 c0             	movsxd r8,r8d
   f:	4d 63 c0             	movsxd r8,r8d
  12:	4d 63 c0             	movsxd r8,r8d
  15:	4d 63 c0             	movsxd r8,r8d
  18:	4d 63 c0             	movsxd r8,r8d
  1b:	4d 63 c0             	movsxd r8,r8d
  1e:	4d 63 c0             	movsxd r8,r8d
  21:	4d 63 c0             	movsxd r8,r8d
  24:	4d 63 c0             	movsxd r8,r8d
  27:	4d 63 c0             	movsxd r8,r8d
  2a:	4d 63 c0             	movsxd r8,r8d
  2d:	4d 63 c0             	movsxd r8,r8d
  30:	4d 63 c0             	movsxd r8,r8d
  33:	4d 63 c0             	movsxd r8,r8d
  36:	4d 63 c0             	movsxd r8,r8d
  39:	4d 63 c0             	movsxd r8,r8d
  3c:	4d 63 c0             	movsxd r8,r8d
  3f:	4d 63 c0             	movsxd r8,r8d
  42:	4d 63 c0             	movsxd r8,r8d
  45:	4d 63 c0             	movsxd r8,r8d

Show nanoBench command
Results:
- Instructions retired: 23.0
- Core cycles: 35.5
- Reference cycles: 28.08
- UOPS_RETIRED.ALL: 27.0

XADD_LOCK (M32, R32) - Latency

Operands

Latency operand 1 → 1 (address, base register): ≤20

Latency operand 1 → 1 (address, index register): ≤20

Latency operand 1 → 1 (memory): 18

Latency operand 1 → 2 (address, base register): 14

Latency operand 1 → 2 (address, index register): 14

Latency operand 1 → 2 (memory): ≤14

Latency operand 1 → 3 (address, base register): 16

Latency operand 1 → 3 (address, index register): 16

Latency operand 1 → 3 (memory): ≤14

Latency operand 2 → 1: ≤17

Latency operand 2 → 2: 12

Latency operand 2 → 3: 12

Latency operand 1 → 1 (address, base register): ≤20

Experiment 1

Experiment 2 (with additional nop)

Latency operand 1 → 1 (address, index register): ≤20

Experiment 1

Experiment 2 (with additional nop)

Latency operand 1 → 1 (memory): 18

Experiment 1

Experiment 2 (with dependency-breaking instructions)

Experiment 3

Experiment 4 (with dependency-breaking instructions)

Latency operand 1 → 2 (address, base register): 14

Experiment 1

Latency operand 1 → 2 (address, index register): 14

Experiment 1

Latency operand 1 → 2 (memory): ≤14

Experiment 1

Latency operand 1 → 3 (address, base register): 16

Experiment 1

Experiment 2 (with dependency-breaking instructions)

Experiment 3

Experiment 4 (with dependency-breaking instructions)

Experiment 5

Experiment 6 (with dependency-breaking instructions)

Experiment 7

Experiment 8 (with dependency-breaking instructions)

Experiment 9

Experiment 10 (with dependency-breaking instructions)

Latency operand 1 → 3 (address, index register): 16

Experiment 1

Experiment 2 (with dependency-breaking instructions)

Experiment 3

Experiment 4 (with dependency-breaking instructions)

Experiment 5

Experiment 6 (with dependency-breaking instructions)

Experiment 7

Experiment 8 (with dependency-breaking instructions)

Experiment 9

Experiment 10 (with dependency-breaking instructions)

Latency operand 1 → 3 (memory): ≤14

Experiment 1

Experiment 2

Experiment 3

Experiment 4

Experiment 5

Latency operand 2 → 1: ≤17

Experiment 1

Latency operand 2 → 2: 12

Experiment 1

Experiment 2

Experiment 3 (with dependency-breaking instructions)

Latency operand 2 → 3: 12

Experiment 1

Experiment 2

Experiment 3

Experiment 4

Experiment 5