VCOMPRESSPD (YMM, K, YMM)

Experiment 1

Instruction: VCOMPRESSPD YMM0 {K1}, YMM1

Code:

   0:	62 f2 fd 29 8a c8    	vcompresspd ymm0{k1},ymm1

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOV [R14+16], RAX;
MOV [R14+24], RAX;
VMOVUPD YMM0, [R14];
VMOVUPD YMM1, [R14]

Show nanoBench command
Results:
- Instructions retired: 1.0
- Core cycles: 3.0
- Reference cycles: 0.98
- UOPS_EXECUTED.THREAD: 2.0

Experiment 2

Instruction: VCOMPRESSPD YMM0 {K1}, YMM1
Chain instructions: VSHUFPD YMM0, YMM0, YMM0, 0;VSHUFPD YMM0, YMM0, YMM0, 0;VSHUFPD YMM0, YMM0, YMM0, 0;VSHUFPD YMM0, YMM0, YMM0, 0;VSHUFPD YMM0, YMM0, YMM0, 0;VSHUFPD YMM0, YMM0, YMM0, 0;VSHUFPD YMM0, YMM0, YMM0, 0
Chain latency: 7

Code:

   0:	62 f2 fd 29 8a c8    	vcompresspd ymm0{k1},ymm1
   6:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
   b:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
  10:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
  15:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
  1a:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
  1f:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
  24:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOV [R14+16], RAX;
MOV [R14+24], RAX;
VMOVUPD YMM0, [R14];
VMOVUPD YMM1, [R14]

Show nanoBench command
Results:
- Instructions retired: 8.0
- Core cycles: 10.66
- Reference cycles: 3.67
- UOPS_EXECUTED.THREAD: 9.0

Experiment 3

Instruction: VCOMPRESSPD YMM0 {K1}, YMM1
Chain instructions: VPAND YMM0, YMM0, YMM0;VPAND YMM0, YMM0, YMM0;VPAND YMM0, YMM0, YMM0;VPAND YMM0, YMM0, YMM0;VPAND YMM0, YMM0, YMM0;VPAND YMM0, YMM0, YMM0;VPAND YMM0, YMM0, YMM0
Chain latency: 7

Code:

   0:	62 f2 fd 29 8a c8    	vcompresspd ymm0{k1},ymm1
   6:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
   a:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
   e:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
  12:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
  16:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
  1a:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
  1e:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOV [R14+16], RAX;
MOV [R14+24], RAX;
VMOVUPD YMM0, [R14];
VMOVUPD YMM1, [R14]

Show nanoBench command
Results:
- Instructions retired: 8.0
- Core cycles: 10.59
- Reference cycles: 3.62
- UOPS_EXECUTED.THREAD: 9.0

Experiment 4 (source registers initialized by an instruction of the same kind)

Instruction: VCOMPRESSPD YMM0 {K1}, YMM1

Code:

   0:	62 f2 fd 29 8a c8    	vcompresspd ymm0{k1},ymm1

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOV [R14+16], RAX;
MOV [R14+24], RAX;
VMOVUPD YMM0, [R14];
VMOVUPD YMM1, [R14];
VCOMPRESSPD YMM0  {K1}, YMM1;
VCOMPRESSPD YMM1  {K1}, YMM0

Show nanoBench command
Results:
- Instructions retired: 1.0
- Core cycles: 3.05
- Reference cycles: 0.98
- UOPS_EXECUTED.THREAD: 2.04

Experiment 5 (source registers initialized by an instruction of the same kind)

Instruction: VCOMPRESSPD YMM0 {K1}, YMM1
Chain instructions: VSHUFPD YMM0, YMM0, YMM0, 0;VSHUFPD YMM0, YMM0, YMM0, 0;VSHUFPD YMM0, YMM0, YMM0, 0;VSHUFPD YMM0, YMM0, YMM0, 0;VSHUFPD YMM0, YMM0, YMM0, 0;VSHUFPD YMM0, YMM0, YMM0, 0;VSHUFPD YMM0, YMM0, YMM0, 0
Chain latency: 7

Code:

   0:	62 f2 fd 29 8a c8    	vcompresspd ymm0{k1},ymm1
   6:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
   b:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
  10:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
  15:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
  1a:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
  1f:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
  24:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOV [R14+16], RAX;
MOV [R14+24], RAX;
VMOVUPD YMM0, [R14];
VMOVUPD YMM1, [R14];
VCOMPRESSPD YMM0  {K1}, YMM1;
VCOMPRESSPD YMM1  {K1}, YMM0

Show nanoBench command
Results:
- Instructions retired: 8.0
- Core cycles: 10.81
- Reference cycles: 3.51
- UOPS_EXECUTED.THREAD: 9.0

Experiment 6 (source registers initialized by an instruction of the same kind)

Instruction: VCOMPRESSPD YMM0 {K1}, YMM1
Chain instructions: VPAND YMM0, YMM0, YMM0;VPAND YMM0, YMM0, YMM0;VPAND YMM0, YMM0, YMM0;VPAND YMM0, YMM0, YMM0;VPAND YMM0, YMM0, YMM0;VPAND YMM0, YMM0, YMM0;VPAND YMM0, YMM0, YMM0
Chain latency: 7

Code:

   0:	62 f2 fd 29 8a c8    	vcompresspd ymm0{k1},ymm1
   6:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
   a:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
   e:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
  12:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
  16:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
  1a:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
  1e:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOV [R14+16], RAX;
MOV [R14+24], RAX;
VMOVUPD YMM0, [R14];
VMOVUPD YMM1, [R14];
VCOMPRESSPD YMM0  {K1}, YMM1;
VCOMPRESSPD YMM1  {K1}, YMM0

Show nanoBench command
Results:
- Instructions retired: 8.0
- Core cycles: 10.63
- Reference cycles: 3.46
- UOPS_EXECUTED.THREAD: 9.0

Latency operand 2 → 1: 6

Experiment 1

Instruction: VCOMPRESSPD YMM0 {K1}, YMM1
Chain instruction: VPMOVQ2M K1, YMM0
Chain latency: 3

Code:

   0:	62 f2 fd 29 8a c8    	vcompresspd ymm0{k1},ymm1
   6:	62 f2 fe 28 39 c8    	vpmovq2m k1,ymm0

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOV [R14+16], RAX;
MOV [R14+24], RAX;
VMOVUPD YMM0, [R14];
VMOVUPD YMM1, [R14]

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 9.0
- Reference cycles: 2.95
- UOPS_EXECUTED.THREAD: 3.0

Experiment 2 (with dependency-breaking instructions)

Instruction: VCOMPRESSPD YMM0 {K1}, YMM1
Chain instructions: VPMOVQ2M K1, YMM0;;VMOVUPD YMM0, YMM15
Chain latency: 3

Code:

   0:	62 f2 fd 29 8a c8    	vcompresspd ymm0{k1},ymm1
   6:	62 f2 fe 28 39 c8    	vpmovq2m k1,ymm0
   c:	c5 7d 11 f8          	vmovupd ymm0,ymm15

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOV [R14+16], RAX;
MOV [R14+24], RAX;
VMOVUPD YMM0, [R14];
VMOVUPD YMM1, [R14]

Show nanoBench command
Results:
- Instructions retired: 3.0
- Core cycles: 9.0
- Reference cycles: 2.89
- UOPS_EXECUTED.THREAD: 3.0

Experiment 3

Instruction: VCOMPRESSPD YMM0 {K1}, YMM1
Chain instruction: VPTESTNMQ K1 {K1}, YMM0, YMM0
Chain latency: 3

Code:

   0:	62 f2 fd 29 8a c8    	vcompresspd ymm0{k1},ymm1
   6:	62 f2 fe 29 27 c8    	vptestnmq k1{k1},ymm0,ymm0

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOV [R14+16], RAX;
MOV [R14+24], RAX;
VMOVUPD YMM0, [R14];
VMOVUPD YMM1, [R14]

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 9.0
- Reference cycles: 3.1
- UOPS_EXECUTED.THREAD: 3.0

Experiment 4 (with dependency-breaking instructions)

Instruction: VCOMPRESSPD YMM0 {K1}, YMM1
Chain instructions: VPTESTNMQ K1 {K1}, YMM0, YMM0;;VMOVUPD YMM0, YMM15
Chain latency: 3

Code:

   0:	62 f2 fd 29 8a c8    	vcompresspd ymm0{k1},ymm1
   6:	62 f2 fe 29 27 c8    	vptestnmq k1{k1},ymm0,ymm0
   c:	c5 7d 11 f8          	vmovupd ymm0,ymm15

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOV [R14+16], RAX;
MOV [R14+24], RAX;
VMOVUPD YMM0, [R14];
VMOVUPD YMM1, [R14]

Show nanoBench command
Results:
- Instructions retired: 3.0
- Core cycles: 8.99
- Reference cycles: 3.1
- UOPS_EXECUTED.THREAD: 3.0

Experiment 5 (source registers initialized by an instruction of the same kind)

Instruction: VCOMPRESSPD YMM0 {K1}, YMM1
Chain instruction: VPMOVQ2M K1, YMM0
Chain latency: 3

Code:

   0:	62 f2 fd 29 8a c8    	vcompresspd ymm0{k1},ymm1
   6:	62 f2 fe 28 39 c8    	vpmovq2m k1,ymm0

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOV [R14+16], RAX;
MOV [R14+24], RAX;
VMOVUPD YMM0, [R14];
VMOVUPD YMM1, [R14];
VCOMPRESSPD YMM0  {K1}, YMM1;
VCOMPRESSPD YMM1  {K1}, YMM0

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 9.0
- Reference cycles: 3.0
- UOPS_EXECUTED.THREAD: 3.0

Experiment 6 (source registers initialized by an instruction of the same kind, with dependency-breaking instructions)

Instruction: VCOMPRESSPD YMM0 {K1}, YMM1
Chain instructions: VPMOVQ2M K1, YMM0;;VMOVUPD YMM0, YMM15
Chain latency: 3

Code:

   0:	62 f2 fd 29 8a c8    	vcompresspd ymm0{k1},ymm1
   6:	62 f2 fe 28 39 c8    	vpmovq2m k1,ymm0
   c:	c5 7d 11 f8          	vmovupd ymm0,ymm15

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOV [R14+16], RAX;
MOV [R14+24], RAX;
VMOVUPD YMM0, [R14];
VMOVUPD YMM1, [R14];
VCOMPRESSPD YMM0  {K1}, YMM1;
VCOMPRESSPD YMM1  {K1}, YMM0

Show nanoBench command
Results:
- Instructions retired: 3.0
- Core cycles: 9.0
- Reference cycles: 3.1
- UOPS_EXECUTED.THREAD: 3.0

Experiment 7 (source registers initialized by an instruction of the same kind)

Instruction: VCOMPRESSPD YMM0 {K1}, YMM1
Chain instruction: VPTESTNMQ K1 {K1}, YMM0, YMM0
Chain latency: 3

Code:

   0:	62 f2 fd 29 8a c8    	vcompresspd ymm0{k1},ymm1
   6:	62 f2 fe 29 27 c8    	vptestnmq k1{k1},ymm0,ymm0

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOV [R14+16], RAX;
MOV [R14+24], RAX;
VMOVUPD YMM0, [R14];
VMOVUPD YMM1, [R14];
VCOMPRESSPD YMM0  {K1}, YMM1;
VCOMPRESSPD YMM1  {K1}, YMM0

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 9.0
- Reference cycles: 2.89
- UOPS_EXECUTED.THREAD: 3.0

Experiment 8 (source registers initialized by an instruction of the same kind, with dependency-breaking instructions)

Instruction: VCOMPRESSPD YMM0 {K1}, YMM1
Chain instructions: VPTESTNMQ K1 {K1}, YMM0, YMM0;;VMOVUPD YMM0, YMM15
Chain latency: 3

Code:

   0:	62 f2 fd 29 8a c8    	vcompresspd ymm0{k1},ymm1
   6:	62 f2 fe 29 27 c8    	vptestnmq k1{k1},ymm0,ymm0
   c:	c5 7d 11 f8          	vmovupd ymm0,ymm15

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOV [R14+16], RAX;
MOV [R14+24], RAX;
VMOVUPD YMM0, [R14];
VMOVUPD YMM1, [R14];
VCOMPRESSPD YMM0  {K1}, YMM1;
VCOMPRESSPD YMM1  {K1}, YMM0

Show nanoBench command
Results:
- Instructions retired: 3.0
- Core cycles: 8.99
- Reference cycles: 3.0
- UOPS_EXECUTED.THREAD: 3.0

Latency operand 3 → 1: 3

Experiment 1

Instruction: VCOMPRESSPD YMM1 {K1}, YMM0
Chain instruction: VCOMPRESSPD YMM0 {K1}, YMM1

Code:

   0:	62 f2 fd 29 8a c1    	vcompresspd ymm1{k1},ymm0
   6:	62 f2 fd 29 8a c8    	vcompresspd ymm0{k1},ymm1

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOV [R14+16], RAX;
MOV [R14+24], RAX;
VMOVUPD YMM1, [R14];
VMOVUPD YMM0, [R14]

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 6.0
- Reference cycles: 1.96
- UOPS_EXECUTED.THREAD: 4.0

Experiment 2 (with dependency-breaking instructions)

Instruction: VCOMPRESSPD YMM1 {K1}, YMM0
Chain instructions: VCOMPRESSPD YMM0 {K1}, YMM1;VMOVUPD YMM1, YMM15

Code:

   0:	62 f2 fd 29 8a c1    	vcompresspd ymm1{k1},ymm0
   6:	62 f2 fd 29 8a c8    	vcompresspd ymm0{k1},ymm1
   c:	c5 7d 11 f9          	vmovupd ymm1,ymm15

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOV [R14+16], RAX;
MOV [R14+24], RAX;
VMOVUPD YMM1, [R14];
VMOVUPD YMM0, [R14]

Show nanoBench command
Results:
- Instructions retired: 3.0
- Core cycles: 6.0
- Reference cycles: 2.07
- UOPS_EXECUTED.THREAD: 4.0

Experiment 3

Instruction: VCOMPRESSPD YMM1 {K1}, YMM0
Chain instructions: VSHUFPD YMM0, YMM1, YMM1, 0;VSHUFPD YMM0, YMM0, YMM0, 0;VSHUFPD YMM0, YMM0, YMM0, 0;VSHUFPD YMM0, YMM0, YMM0, 0;VSHUFPD YMM0, YMM0, YMM0, 0;VSHUFPD YMM0, YMM0, YMM0, 0;VSHUFPD YMM0, YMM0, YMM0, 0
Chain latency: 7

Code:

   0:	62 f2 fd 29 8a c1    	vcompresspd ymm1{k1},ymm0
   6:	c5 f5 c6 c1 00       	vshufpd ymm0,ymm1,ymm1,0x0
   b:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
  10:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
  15:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
  1a:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
  1f:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
  24:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOV [R14+16], RAX;
MOV [R14+24], RAX;
VMOVUPD YMM1, [R14];
VMOVUPD YMM0, [R14]

Show nanoBench command
Results:
- Instructions retired: 8.0
- Core cycles: 10.69
- Reference cycles: 3.67
- UOPS_EXECUTED.THREAD: 9.0

Experiment 4 (with dependency-breaking instructions)

Instruction: VCOMPRESSPD YMM1 {K1}, YMM0
Chain instructions: VSHUFPD YMM0, YMM1, YMM1, 0;VSHUFPD YMM0, YMM0, YMM0, 0;VSHUFPD YMM0, YMM0, YMM0, 0;VSHUFPD YMM0, YMM0, YMM0, 0;VSHUFPD YMM0, YMM0, YMM0, 0;VSHUFPD YMM0, YMM0, YMM0, 0;VSHUFPD YMM0, YMM0, YMM0, 0;;VMOVUPD YMM1, YMM15
Chain latency: 7

Code:

   0:	62 f2 fd 29 8a c1    	vcompresspd ymm1{k1},ymm0
   6:	c5 f5 c6 c1 00       	vshufpd ymm0,ymm1,ymm1,0x0
   b:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
  10:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
  15:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
  1a:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
  1f:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
  24:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
  29:	c5 7d 11 f9          	vmovupd ymm1,ymm15

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOV [R14+16], RAX;
MOV [R14+24], RAX;
VMOVUPD YMM1, [R14];
VMOVUPD YMM0, [R14]

Show nanoBench command
Results:
- Instructions retired: 9.0
- Core cycles: 10.48
- Reference cycles: 3.41
- UOPS_EXECUTED.THREAD: 9.05

Experiment 5

Instruction: VCOMPRESSPD YMM1 {K1}, YMM0
Chain instructions: VPAND YMM0, YMM1, YMM1;VPAND YMM0, YMM0, YMM0;VPAND YMM0, YMM0, YMM0;VPAND YMM0, YMM0, YMM0;VPAND YMM0, YMM0, YMM0;VPAND YMM0, YMM0, YMM0;VPAND YMM0, YMM0, YMM0
Chain latency: 7

Code:

   0:	62 f2 fd 29 8a c1    	vcompresspd ymm1{k1},ymm0
   6:	c5 f5 db c1          	vpand  ymm0,ymm1,ymm1
   a:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
   e:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
  12:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
  16:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
  1a:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
  1e:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOV [R14+16], RAX;
MOV [R14+24], RAX;
VMOVUPD YMM1, [R14];
VMOVUPD YMM0, [R14]

Show nanoBench command
Results:
- Instructions retired: 8.0
- Core cycles: 10.45
- Reference cycles: 3.57
- UOPS_EXECUTED.THREAD: 9.0

Experiment 6 (with dependency-breaking instructions)

Instruction: VCOMPRESSPD YMM1 {K1}, YMM0
Chain instructions: VPAND YMM0, YMM1, YMM1;VPAND YMM0, YMM0, YMM0;VPAND YMM0, YMM0, YMM0;VPAND YMM0, YMM0, YMM0;VPAND YMM0, YMM0, YMM0;VPAND YMM0, YMM0, YMM0;VPAND YMM0, YMM0, YMM0;;VMOVUPD YMM1, YMM15
Chain latency: 7

Code:

   0:	62 f2 fd 29 8a c1    	vcompresspd ymm1{k1},ymm0
   6:	c5 f5 db c1          	vpand  ymm0,ymm1,ymm1
   a:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
   e:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
  12:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
  16:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
  1a:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
  1e:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
  22:	c5 7d 11 f9          	vmovupd ymm1,ymm15

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOV [R14+16], RAX;
MOV [R14+24], RAX;
VMOVUPD YMM1, [R14];
VMOVUPD YMM0, [R14]

Show nanoBench command
Results:
- Instructions retired: 9.0
- Core cycles: 10.56
- Reference cycles: 3.57
- UOPS_EXECUTED.THREAD: 9.05

Experiment 7 (source registers initialized by an instruction of the same kind)

Instruction: VCOMPRESSPD YMM1 {K1}, YMM0
Chain instruction: VCOMPRESSPD YMM0 {K1}, YMM1

Code:

   0:	62 f2 fd 29 8a c1    	vcompresspd ymm1{k1},ymm0
   6:	62 f2 fd 29 8a c8    	vcompresspd ymm0{k1},ymm1

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOV [R14+16], RAX;
MOV [R14+24], RAX;
VMOVUPD YMM1, [R14];
VMOVUPD YMM0, [R14];
VCOMPRESSPD YMM1  {K1}, YMM0;
VCOMPRESSPD YMM0  {K1}, YMM1

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 6.0
- Reference cycles: 2.17
- UOPS_EXECUTED.THREAD: 4.0

Experiment 8 (source registers initialized by an instruction of the same kind, with dependency-breaking instructions)

Instruction: VCOMPRESSPD YMM1 {K1}, YMM0
Chain instructions: VCOMPRESSPD YMM0 {K1}, YMM1;VMOVUPD YMM1, YMM15

Code:

   0:	62 f2 fd 29 8a c1    	vcompresspd ymm1{k1},ymm0
   6:	62 f2 fd 29 8a c8    	vcompresspd ymm0{k1},ymm1
   c:	c5 7d 11 f9          	vmovupd ymm1,ymm15

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOV [R14+16], RAX;
MOV [R14+24], RAX;
VMOVUPD YMM1, [R14];
VMOVUPD YMM0, [R14];
VCOMPRESSPD YMM1  {K1}, YMM0;
VCOMPRESSPD YMM0  {K1}, YMM1

Show nanoBench command
Results:
- Instructions retired: 3.0
- Core cycles: 6.0
- Reference cycles: 2.02
- UOPS_EXECUTED.THREAD: 4.0

Experiment 9 (source registers initialized by an instruction of the same kind)

Instruction: VCOMPRESSPD YMM1 {K1}, YMM0
Chain instructions: VSHUFPD YMM0, YMM1, YMM1, 0;VSHUFPD YMM0, YMM0, YMM0, 0;VSHUFPD YMM0, YMM0, YMM0, 0;VSHUFPD YMM0, YMM0, YMM0, 0;VSHUFPD YMM0, YMM0, YMM0, 0;VSHUFPD YMM0, YMM0, YMM0, 0;VSHUFPD YMM0, YMM0, YMM0, 0
Chain latency: 7

Code:

   0:	62 f2 fd 29 8a c1    	vcompresspd ymm1{k1},ymm0
   6:	c5 f5 c6 c1 00       	vshufpd ymm0,ymm1,ymm1,0x0
   b:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
  10:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
  15:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
  1a:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
  1f:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
  24:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOV [R14+16], RAX;
MOV [R14+24], RAX;
VMOVUPD YMM1, [R14];
VMOVUPD YMM0, [R14];
VCOMPRESSPD YMM1  {K1}, YMM0;
VCOMPRESSPD YMM0  {K1}, YMM1

Show nanoBench command
Results:
- Instructions retired: 8.0
- Core cycles: 10.75
- Reference cycles: 3.41
- UOPS_EXECUTED.THREAD: 9.0

Experiment 10 (source registers initialized by an instruction of the same kind, with dependency-breaking instructions)

Instruction: VCOMPRESSPD YMM1 {K1}, YMM0
Chain instructions: VSHUFPD YMM0, YMM1, YMM1, 0;VSHUFPD YMM0, YMM0, YMM0, 0;VSHUFPD YMM0, YMM0, YMM0, 0;VSHUFPD YMM0, YMM0, YMM0, 0;VSHUFPD YMM0, YMM0, YMM0, 0;VSHUFPD YMM0, YMM0, YMM0, 0;VSHUFPD YMM0, YMM0, YMM0, 0;;VMOVUPD YMM1, YMM15
Chain latency: 7

Code:

   0:	62 f2 fd 29 8a c1    	vcompresspd ymm1{k1},ymm0
   6:	c5 f5 c6 c1 00       	vshufpd ymm0,ymm1,ymm1,0x0
   b:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
  10:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
  15:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
  1a:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
  1f:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
  24:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
  29:	c5 7d 11 f9          	vmovupd ymm1,ymm15

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOV [R14+16], RAX;
MOV [R14+24], RAX;
VMOVUPD YMM1, [R14];
VMOVUPD YMM0, [R14];
VCOMPRESSPD YMM1  {K1}, YMM0;
VCOMPRESSPD YMM0  {K1}, YMM1

Show nanoBench command
Results:
- Instructions retired: 9.0
- Core cycles: 10.22
- Reference cycles: 3.26
- UOPS_EXECUTED.THREAD: 9.05

Experiment 11 (source registers initialized by an instruction of the same kind)

Instruction: VCOMPRESSPD YMM1 {K1}, YMM0
Chain instructions: VPAND YMM0, YMM1, YMM1;VPAND YMM0, YMM0, YMM0;VPAND YMM0, YMM0, YMM0;VPAND YMM0, YMM0, YMM0;VPAND YMM0, YMM0, YMM0;VPAND YMM0, YMM0, YMM0;VPAND YMM0, YMM0, YMM0
Chain latency: 7

Code:

   0:	62 f2 fd 29 8a c1    	vcompresspd ymm1{k1},ymm0
   6:	c5 f5 db c1          	vpand  ymm0,ymm1,ymm1
   a:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
   e:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
  12:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
  16:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
  1a:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
  1e:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOV [R14+16], RAX;
MOV [R14+24], RAX;
VMOVUPD YMM1, [R14];
VMOVUPD YMM0, [R14];
VCOMPRESSPD YMM1  {K1}, YMM0;
VCOMPRESSPD YMM0  {K1}, YMM1

Show nanoBench command
Results:
- Instructions retired: 8.0
- Core cycles: 10.58
- Reference cycles: 3.41
- UOPS_EXECUTED.THREAD: 9.0

Experiment 12 (source registers initialized by an instruction of the same kind, with dependency-breaking instructions)

Instruction: VCOMPRESSPD YMM1 {K1}, YMM0
Chain instructions: VPAND YMM0, YMM1, YMM1;VPAND YMM0, YMM0, YMM0;VPAND YMM0, YMM0, YMM0;VPAND YMM0, YMM0, YMM0;VPAND YMM0, YMM0, YMM0;VPAND YMM0, YMM0, YMM0;VPAND YMM0, YMM0, YMM0;;VMOVUPD YMM1, YMM15
Chain latency: 7

Code:

   0:	62 f2 fd 29 8a c1    	vcompresspd ymm1{k1},ymm0
   6:	c5 f5 db c1          	vpand  ymm0,ymm1,ymm1
   a:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
   e:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
  12:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
  16:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
  1a:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
  1e:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
  22:	c5 7d 11 f9          	vmovupd ymm1,ymm15

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOV [R14+16], RAX;
MOV [R14+24], RAX;
VMOVUPD YMM1, [R14];
VMOVUPD YMM0, [R14];
VCOMPRESSPD YMM1  {K1}, YMM0;
VCOMPRESSPD YMM0  {K1}, YMM1

Show nanoBench command
Results:
- Instructions retired: 9.0
- Core cycles: 10.71
- Reference cycles: 3.51
- UOPS_EXECUTED.THREAD: 9.05

VCOMPRESSPD (YMM, K, YMM) - Latency

Operands

Latency operand 1 → 1: 3

Latency operand 2 → 1: 6

Latency operand 3 → 1: 3

Latency operand 1 → 1: 3

Experiment 1

Experiment 2

Experiment 3

Experiment 4 (source registers initialized by an instruction of the same kind)

Experiment 5 (source registers initialized by an instruction of the same kind)

Experiment 6 (source registers initialized by an instruction of the same kind)

Latency operand 2 → 1: 6

Experiment 1

Experiment 2 (with dependency-breaking instructions)

Experiment 3

Experiment 4 (with dependency-breaking instructions)

Experiment 5 (source registers initialized by an instruction of the same kind)

Experiment 6 (source registers initialized by an instruction of the same kind, with dependency-breaking instructions)

Experiment 7 (source registers initialized by an instruction of the same kind)

Experiment 8 (source registers initialized by an instruction of the same kind, with dependency-breaking instructions)

Latency operand 3 → 1: 3

Experiment 1

Experiment 2 (with dependency-breaking instructions)

Experiment 3

Experiment 4 (with dependency-breaking instructions)

Experiment 5

Experiment 6 (with dependency-breaking instructions)

Experiment 7 (source registers initialized by an instruction of the same kind)

Experiment 8 (source registers initialized by an instruction of the same kind, with dependency-breaking instructions)

Experiment 9 (source registers initialized by an instruction of the same kind)

Experiment 10 (source registers initialized by an instruction of the same kind, with dependency-breaking instructions)

Experiment 11 (source registers initialized by an instruction of the same kind)

Experiment 12 (source registers initialized by an instruction of the same kind, with dependency-breaking instructions)