RCR (R32, I8)

Experiment 1

Instruction: RCR R8D, 2
Chain instructions: MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D
Chain latency: 15

Code:

   0:	41 c1 d8 02          	rcr    r8d,0x2
   4:	4d 63 c0             	movsxd r8,r8d
   7:	4d 63 c0             	movsxd r8,r8d
   a:	4d 63 c0             	movsxd r8,r8d
   d:	4d 63 c0             	movsxd r8,r8d
  10:	4d 63 c0             	movsxd r8,r8d
  13:	4d 63 c0             	movsxd r8,r8d
  16:	4d 63 c0             	movsxd r8,r8d
  19:	4d 63 c0             	movsxd r8,r8d
  1c:	4d 63 c0             	movsxd r8,r8d
  1f:	4d 63 c0             	movsxd r8,r8d
  22:	4d 63 c0             	movsxd r8,r8d
  25:	4d 63 c0             	movsxd r8,r8d
  28:	4d 63 c0             	movsxd r8,r8d
  2b:	4d 63 c0             	movsxd r8,r8d
  2e:	4d 63 c0             	movsxd r8,r8d

Show nanoBench command
Results:
- Instructions retired: 16.0
- Core cycles: 23.99
- Reference cycles: 15.6
- UOPS_RETIRED.ANY: 29.0

Experiment 2

Instruction: RCR R8D, 2

Code:

   0:	41 c1 d8 02          	rcr    r8d,0x2

Show nanoBench command
Results:
- Instructions retired: 1.0
- Core cycles: 11.99
- Reference cycles: 7.8
- UOPS_RETIRED.ANY: 14.0

Experiment 3 (with dependency-breaking instructions)

Instruction: RCR R8D, 2
Chain instruction: TEST R15, R15

Code:

   0:	41 c1 d8 02          	rcr    r8d,0x2
   4:	4d 85 ff             	test   r15,r15

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 13.0
- Reference cycles: 8.45
- UOPS_RETIRED.ANY: 15.0

Latency operand 1 → 3: 10

Experiment 1

Instruction: RCR R8D, 2
Chain instructions: CMOVC R15D, R15D;MOVSX R8, R15D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D
Chain latency: 17

Code:

   0:	41 c1 d8 02          	rcr    r8d,0x2
   4:	45 0f 42 ff          	cmovb  r15d,r15d
   8:	4d 63 c7             	movsxd r8,r15d
   b:	4d 63 c0             	movsxd r8,r8d
   e:	4d 63 c0             	movsxd r8,r8d
  11:	4d 63 c0             	movsxd r8,r8d
  14:	4d 63 c0             	movsxd r8,r8d
  17:	4d 63 c0             	movsxd r8,r8d
  1a:	4d 63 c0             	movsxd r8,r8d
  1d:	4d 63 c0             	movsxd r8,r8d
  20:	4d 63 c0             	movsxd r8,r8d
  23:	4d 63 c0             	movsxd r8,r8d
  26:	4d 63 c0             	movsxd r8,r8d
  29:	4d 63 c0             	movsxd r8,r8d
  2c:	4d 63 c0             	movsxd r8,r8d
  2f:	4d 63 c0             	movsxd r8,r8d
  32:	4d 63 c0             	movsxd r8,r8d

Show nanoBench command
Results:
- Instructions retired: 17.0
- Core cycles: 27.0
- Reference cycles: 17.81
- UOPS_RETIRED.ANY: 30.0

Latency operand 3 → 1: 9

Experiment 1

Instruction: RCR R8D, 2
Chain instructions: MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;TEST R8D, R8D
Chain latency: 15

Code:

   0:	41 c1 d8 02          	rcr    r8d,0x2
   4:	4d 63 c0             	movsxd r8,r8d
   7:	4d 63 c0             	movsxd r8,r8d
   a:	4d 63 c0             	movsxd r8,r8d
   d:	4d 63 c0             	movsxd r8,r8d
  10:	4d 63 c0             	movsxd r8,r8d
  13:	4d 63 c0             	movsxd r8,r8d
  16:	4d 63 c0             	movsxd r8,r8d
  19:	4d 63 c0             	movsxd r8,r8d
  1c:	4d 63 c0             	movsxd r8,r8d
  1f:	4d 63 c0             	movsxd r8,r8d
  22:	4d 63 c0             	movsxd r8,r8d
  25:	4d 63 c0             	movsxd r8,r8d
  28:	4d 63 c0             	movsxd r8,r8d
  2b:	4d 63 c0             	movsxd r8,r8d
  2e:	45 85 c0             	test   r8d,r8d

Show nanoBench command
Results:
- Instructions retired: 16.0
- Core cycles: 23.99
- Reference cycles: 15.47
- UOPS_RETIRED.ANY: 29.0

Experiment 2

Instruction: RCR R8D, 2
Chain instruction: TEST R8D, R8D
Chain latency: 1

Code:

   0:	41 c1 d8 02          	rcr    r8d,0x2
   4:	45 85 c0             	test   r8d,r8d

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 13.0
- Reference cycles: 8.32
- UOPS_RETIRED.ANY: 15.0

Experiment 3 (with dependency-breaking instructions)

Instruction: RCR R8D, 2
Chain instructions: TEST R8D, R8D;;MOV R8D, 0
Chain latency: 1

Code:

   0:	41 c1 d8 02          	rcr    r8d,0x2
   4:	45 85 c0             	test   r8d,r8d
   7:	41 b8 00 00 00 00    	mov    r8d,0x0

Show nanoBench command
Results:
- Instructions retired: 3.0
- Core cycles: 13.01
- Reference cycles: 8.45
- UOPS_RETIRED.ANY: 16.0

Latency operand 3 → 3: 8

Experiment 1

Instruction: RCR R8D, 2
Chain instructions: CMC;CMC;CMC;CMC;CMC;CMC;CMC;CMC;CMC;CMC;CMC;CMC;CMC;CMC
Chain latency: 14

Code:

   0:	41 c1 d8 02          	rcr    r8d,0x2
   4:	f5                   	cmc    
   5:	f5                   	cmc    
   6:	f5                   	cmc    
   7:	f5                   	cmc    
   8:	f5                   	cmc    
   9:	f5                   	cmc    
   a:	f5                   	cmc    
   b:	f5                   	cmc    
   c:	f5                   	cmc    
   d:	f5                   	cmc    
   e:	f5                   	cmc    
   f:	f5                   	cmc    
  10:	f5                   	cmc    
  11:	f5                   	cmc

Show nanoBench command
Results:
- Instructions retired: 15.0
- Core cycles: 22.01
- Reference cycles: 14.43
- UOPS_RETIRED.ANY: 28.0

Experiment 2

Instruction: RCR R8D, 2

Code:

   0:	41 c1 d8 02          	rcr    r8d,0x2

Show nanoBench command
Results:
- Instructions retired: 1.0
- Core cycles: 11.99
- Reference cycles: 7.8
- UOPS_RETIRED.ANY: 14.0

Experiment 3 (with dependency-breaking instructions)

Instruction: RCR R8D, 2
Chain instruction: MOV R8D, 0

Code:

   0:	41 c1 d8 02          	rcr    r8d,0x2
   4:	41 b8 00 00 00 00    	mov    r8d,0x0

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 13.0
- Reference cycles: 8.32
- UOPS_RETIRED.ANY: 15.0

RCR (R32, I8) - Latency

Operands

Latency operand 1 → 1: 9

Latency operand 1 → 3: 10

Latency operand 3 → 1: 9

Latency operand 3 → 3: 8

Latency operand 1 → 1: 9

Experiment 1

Experiment 2

Experiment 3 (with dependency-breaking instructions)

Latency operand 1 → 3: 10

Experiment 1

Latency operand 3 → 1: 9

Experiment 1

Experiment 2

Experiment 3 (with dependency-breaking instructions)

Latency operand 3 → 3: 8

Experiment 1

Experiment 2

Experiment 3 (with dependency-breaking instructions)