VPTERNLOGD (YMM, YMM, YMM, I8)

Experiment 1

Instruction: VPTERNLOGD YMM0, YMM1, YMM2, 2

Code:

   0:	62 f3 75 28 25 c2 02 	vpternlogd ymm0,ymm1,ymm2,0x2

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM0, YMM0, YMM0;
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM2, YMM2, YMM2

Show nanoBench command
Results:
- Instructions retired: 1.0
- Core cycles: 0.99
- Reference cycles: 0.46
- UOPS_EXECUTED.THREAD: 1.0

Experiment 2

Instruction: VPTERNLOGD YMM0, YMM1, YMM2, 2
Chain instructions: VSHUFPD YMM0, YMM0, YMM0, 0;VSHUFPD YMM0, YMM0, YMM0, 0;VSHUFPD YMM0, YMM0, YMM0, 0;VSHUFPD YMM0, YMM0, YMM0, 0;VSHUFPD YMM0, YMM0, YMM0, 0
Chain latency: 5

Code:

   0:	62 f3 75 28 25 c2 02 	vpternlogd ymm0,ymm1,ymm2,0x2
   7:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
   c:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
  11:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
  16:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
  1b:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM0, YMM0, YMM0;
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM2, YMM2, YMM2

Show nanoBench command
Results:
- Instructions retired: 6.0
- Core cycles: 6.0
- Reference cycles: 4.45
- UOPS_EXECUTED.THREAD: 6.0

Experiment 3

Instruction: VPTERNLOGD YMM0, YMM1, YMM2, 2
Chain instructions: VPAND YMM0, YMM0, YMM0;VPAND YMM0, YMM0, YMM0;VPAND YMM0, YMM0, YMM0;VPAND YMM0, YMM0, YMM0;VPAND YMM0, YMM0, YMM0
Chain latency: 5

Code:

   0:	62 f3 75 28 25 c2 02 	vpternlogd ymm0,ymm1,ymm2,0x2
   7:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
   b:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
   f:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
  13:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
  17:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM0, YMM0, YMM0;
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM2, YMM2, YMM2

Show nanoBench command
Results:
- Instructions retired: 6.0
- Core cycles: 5.99
- Reference cycles: 4.29
- UOPS_EXECUTED.THREAD: 6.0

Experiment 4 (source registers initialized by an instruction of the same kind)

Instruction: VPTERNLOGD YMM0, YMM1, YMM2, 2

Code:

   0:	62 f3 75 28 25 c2 02 	vpternlogd ymm0,ymm1,ymm2,0x2

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM0, YMM0, YMM0;
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM2, YMM2, YMM2;
VPTERNLOGD YMM0, YMM1, YMM2, 2;
VPTERNLOGD YMM1, YMM0, YMM2, 2;
VPTERNLOGD YMM2, YMM0, YMM1, 2

Show nanoBench command
Results:
- Instructions retired: 1.0
- Core cycles: 0.99
- Reference cycles: 0.61
- UOPS_EXECUTED.THREAD: 1.0

Experiment 5 (source registers initialized by an instruction of the same kind)

Instruction: VPTERNLOGD YMM0, YMM1, YMM2, 2
Chain instructions: VSHUFPD YMM0, YMM0, YMM0, 0;VSHUFPD YMM0, YMM0, YMM0, 0;VSHUFPD YMM0, YMM0, YMM0, 0;VSHUFPD YMM0, YMM0, YMM0, 0;VSHUFPD YMM0, YMM0, YMM0, 0
Chain latency: 5

Code:

   0:	62 f3 75 28 25 c2 02 	vpternlogd ymm0,ymm1,ymm2,0x2
   7:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
   c:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
  11:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
  16:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
  1b:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM0, YMM0, YMM0;
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM2, YMM2, YMM2;
VPTERNLOGD YMM0, YMM1, YMM2, 2;
VPTERNLOGD YMM1, YMM0, YMM2, 2;
VPTERNLOGD YMM2, YMM0, YMM1, 2

Show nanoBench command
Results:
- Instructions retired: 6.0
- Core cycles: 6.0
- Reference cycles: 4.29
- UOPS_EXECUTED.THREAD: 6.0

Experiment 6 (source registers initialized by an instruction of the same kind)

Instruction: VPTERNLOGD YMM0, YMM1, YMM2, 2
Chain instructions: VPAND YMM0, YMM0, YMM0;VPAND YMM0, YMM0, YMM0;VPAND YMM0, YMM0, YMM0;VPAND YMM0, YMM0, YMM0;VPAND YMM0, YMM0, YMM0
Chain latency: 5

Code:

   0:	62 f3 75 28 25 c2 02 	vpternlogd ymm0,ymm1,ymm2,0x2
   7:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
   b:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
   f:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
  13:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
  17:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM0, YMM0, YMM0;
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM2, YMM2, YMM2;
VPTERNLOGD YMM0, YMM1, YMM2, 2;
VPTERNLOGD YMM1, YMM0, YMM2, 2;
VPTERNLOGD YMM2, YMM0, YMM1, 2

Show nanoBench command
Results:
- Instructions retired: 6.0
- Core cycles: 5.99
- Reference cycles: 4.29
- UOPS_EXECUTED.THREAD: 6.0

Latency operand 2 → 1: 1

Experiment 1

Instruction: VPTERNLOGD YMM1, YMM0, YMM2, 2
Chain instructions: VSHUFPD YMM0, YMM1, YMM1, 0;VSHUFPD YMM0, YMM0, YMM0, 0;VSHUFPD YMM0, YMM0, YMM0, 0;VSHUFPD YMM0, YMM0, YMM0, 0;VSHUFPD YMM0, YMM0, YMM0, 0
Chain latency: 5

Code:

   0:	62 f3 7d 28 25 ca 02 	vpternlogd ymm1,ymm0,ymm2,0x2
   7:	c5 f5 c6 c1 00       	vshufpd ymm0,ymm1,ymm1,0x0
   c:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
  11:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
  16:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
  1b:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM0, YMM0, YMM0;
VXORPS YMM2, YMM2, YMM2

Show nanoBench command
Results:
- Instructions retired: 6.0
- Core cycles: 6.0
- Reference cycles: 4.6
- UOPS_EXECUTED.THREAD: 6.0

Experiment 2 (with dependency-breaking instructions)

Instruction: VPTERNLOGD YMM1, YMM0, YMM2, 2
Chain instructions: VSHUFPD YMM0, YMM1, YMM1, 0;VSHUFPD YMM0, YMM0, YMM0, 0;VSHUFPD YMM0, YMM0, YMM0, 0;VSHUFPD YMM0, YMM0, YMM0, 0;VSHUFPD YMM0, YMM0, YMM0, 0;;VXORPS YMM1, YMM1, YMM1
Chain latency: 5

Code:

   0:	62 f3 7d 28 25 ca 02 	vpternlogd ymm1,ymm0,ymm2,0x2
   7:	c5 f5 c6 c1 00       	vshufpd ymm0,ymm1,ymm1,0x0
   c:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
  11:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
  16:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
  1b:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
  20:	c5 f4 57 c9          	vxorps ymm1,ymm1,ymm1

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM0, YMM0, YMM0;
VXORPS YMM2, YMM2, YMM2

Show nanoBench command
Results:
- Instructions retired: 7.0
- Core cycles: 6.0
- Reference cycles: 4.45
- UOPS_EXECUTED.THREAD: 6.0

Experiment 3

Instruction: VPTERNLOGD YMM1, YMM0, YMM2, 2
Chain instructions: VPAND YMM0, YMM1, YMM1;VPAND YMM0, YMM0, YMM0;VPAND YMM0, YMM0, YMM0;VPAND YMM0, YMM0, YMM0;VPAND YMM0, YMM0, YMM0
Chain latency: 5

Code:

   0:	62 f3 7d 28 25 ca 02 	vpternlogd ymm1,ymm0,ymm2,0x2
   7:	c5 f5 db c1          	vpand  ymm0,ymm1,ymm1
   b:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
   f:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
  13:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
  17:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM0, YMM0, YMM0;
VXORPS YMM2, YMM2, YMM2

Show nanoBench command
Results:
- Instructions retired: 6.0
- Core cycles: 5.99
- Reference cycles: 4.45
- UOPS_EXECUTED.THREAD: 6.0

Experiment 4 (with dependency-breaking instructions)

Instruction: VPTERNLOGD YMM1, YMM0, YMM2, 2
Chain instructions: VPAND YMM0, YMM1, YMM1;VPAND YMM0, YMM0, YMM0;VPAND YMM0, YMM0, YMM0;VPAND YMM0, YMM0, YMM0;VPAND YMM0, YMM0, YMM0;;VXORPS YMM1, YMM1, YMM1
Chain latency: 5

Code:

   0:	62 f3 7d 28 25 ca 02 	vpternlogd ymm1,ymm0,ymm2,0x2
   7:	c5 f5 db c1          	vpand  ymm0,ymm1,ymm1
   b:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
   f:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
  13:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
  17:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
  1b:	c5 f4 57 c9          	vxorps ymm1,ymm1,ymm1

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM0, YMM0, YMM0;
VXORPS YMM2, YMM2, YMM2

Show nanoBench command
Results:
- Instructions retired: 7.0
- Core cycles: 6.0
- Reference cycles: 3.99
- UOPS_EXECUTED.THREAD: 6.0

Experiment 5 (source registers initialized by an instruction of the same kind)

Instruction: VPTERNLOGD YMM1, YMM0, YMM2, 2
Chain instructions: VSHUFPD YMM0, YMM1, YMM1, 0;VSHUFPD YMM0, YMM0, YMM0, 0;VSHUFPD YMM0, YMM0, YMM0, 0;VSHUFPD YMM0, YMM0, YMM0, 0;VSHUFPD YMM0, YMM0, YMM0, 0
Chain latency: 5

Code:

   0:	62 f3 7d 28 25 ca 02 	vpternlogd ymm1,ymm0,ymm2,0x2
   7:	c5 f5 c6 c1 00       	vshufpd ymm0,ymm1,ymm1,0x0
   c:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
  11:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
  16:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
  1b:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM0, YMM0, YMM0;
VXORPS YMM2, YMM2, YMM2;
VPTERNLOGD YMM1, YMM0, YMM2, 2;
VPTERNLOGD YMM0, YMM1, YMM2, 2;
VPTERNLOGD YMM2, YMM0, YMM1, 2

Show nanoBench command
Results:
- Instructions retired: 6.0
- Core cycles: 6.0
- Reference cycles: 4.29
- UOPS_EXECUTED.THREAD: 6.0

Experiment 6 (source registers initialized by an instruction of the same kind, with dependency-breaking instructions)

Instruction: VPTERNLOGD YMM1, YMM0, YMM2, 2
Chain instructions: VSHUFPD YMM0, YMM1, YMM1, 0;VSHUFPD YMM0, YMM0, YMM0, 0;VSHUFPD YMM0, YMM0, YMM0, 0;VSHUFPD YMM0, YMM0, YMM0, 0;VSHUFPD YMM0, YMM0, YMM0, 0;;VXORPS YMM1, YMM1, YMM1
Chain latency: 5

Code:

   0:	62 f3 7d 28 25 ca 02 	vpternlogd ymm1,ymm0,ymm2,0x2
   7:	c5 f5 c6 c1 00       	vshufpd ymm0,ymm1,ymm1,0x0
   c:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
  11:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
  16:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
  1b:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
  20:	c5 f4 57 c9          	vxorps ymm1,ymm1,ymm1

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM0, YMM0, YMM0;
VXORPS YMM2, YMM2, YMM2;
VPTERNLOGD YMM1, YMM0, YMM2, 2;
VPTERNLOGD YMM0, YMM1, YMM2, 2;
VPTERNLOGD YMM2, YMM0, YMM1, 2

Show nanoBench command
Results:
- Instructions retired: 7.0
- Core cycles: 6.0
- Reference cycles: 3.68
- UOPS_EXECUTED.THREAD: 6.0

Experiment 7 (source registers initialized by an instruction of the same kind)

Instruction: VPTERNLOGD YMM1, YMM0, YMM2, 2
Chain instructions: VPAND YMM0, YMM1, YMM1;VPAND YMM0, YMM0, YMM0;VPAND YMM0, YMM0, YMM0;VPAND YMM0, YMM0, YMM0;VPAND YMM0, YMM0, YMM0
Chain latency: 5

Code:

   0:	62 f3 7d 28 25 ca 02 	vpternlogd ymm1,ymm0,ymm2,0x2
   7:	c5 f5 db c1          	vpand  ymm0,ymm1,ymm1
   b:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
   f:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
  13:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
  17:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM0, YMM0, YMM0;
VXORPS YMM2, YMM2, YMM2;
VPTERNLOGD YMM1, YMM0, YMM2, 2;
VPTERNLOGD YMM0, YMM1, YMM2, 2;
VPTERNLOGD YMM2, YMM0, YMM1, 2

Show nanoBench command
Results:
- Instructions retired: 6.0
- Core cycles: 5.99
- Reference cycles: 4.6
- UOPS_EXECUTED.THREAD: 6.0

Experiment 8 (source registers initialized by an instruction of the same kind, with dependency-breaking instructions)

Instruction: VPTERNLOGD YMM1, YMM0, YMM2, 2
Chain instructions: VPAND YMM0, YMM1, YMM1;VPAND YMM0, YMM0, YMM0;VPAND YMM0, YMM0, YMM0;VPAND YMM0, YMM0, YMM0;VPAND YMM0, YMM0, YMM0;;VXORPS YMM1, YMM1, YMM1
Chain latency: 5

Code:

   0:	62 f3 7d 28 25 ca 02 	vpternlogd ymm1,ymm0,ymm2,0x2
   7:	c5 f5 db c1          	vpand  ymm0,ymm1,ymm1
   b:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
   f:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
  13:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
  17:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
  1b:	c5 f4 57 c9          	vxorps ymm1,ymm1,ymm1

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM0, YMM0, YMM0;
VXORPS YMM2, YMM2, YMM2;
VPTERNLOGD YMM1, YMM0, YMM2, 2;
VPTERNLOGD YMM0, YMM1, YMM2, 2;
VPTERNLOGD YMM2, YMM0, YMM1, 2

Show nanoBench command
Results:
- Instructions retired: 7.0
- Core cycles: 6.0
- Reference cycles: 4.14
- UOPS_EXECUTED.THREAD: 6.0

Latency operand 3 → 1: 1

Experiment 1

Instruction: VPTERNLOGD YMM1, YMM2, YMM0, 2
Chain instructions: VSHUFPD YMM0, YMM1, YMM1, 0;VSHUFPD YMM0, YMM0, YMM0, 0;VSHUFPD YMM0, YMM0, YMM0, 0;VSHUFPD YMM0, YMM0, YMM0, 0;VSHUFPD YMM0, YMM0, YMM0, 0
Chain latency: 5

Code:

   0:	62 f3 6d 28 25 c8 02 	vpternlogd ymm1,ymm2,ymm0,0x2
   7:	c5 f5 c6 c1 00       	vshufpd ymm0,ymm1,ymm1,0x0
   c:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
  11:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
  16:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
  1b:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM2, YMM2, YMM2;
VXORPS YMM0, YMM0, YMM0

Show nanoBench command
Results:
- Instructions retired: 6.0
- Core cycles: 6.0
- Reference cycles: 4.29
- UOPS_EXECUTED.THREAD: 6.0

Experiment 2 (with dependency-breaking instructions)

Instruction: VPTERNLOGD YMM1, YMM2, YMM0, 2
Chain instructions: VSHUFPD YMM0, YMM1, YMM1, 0;VSHUFPD YMM0, YMM0, YMM0, 0;VSHUFPD YMM0, YMM0, YMM0, 0;VSHUFPD YMM0, YMM0, YMM0, 0;VSHUFPD YMM0, YMM0, YMM0, 0;;VXORPS YMM1, YMM1, YMM1
Chain latency: 5

Code:

   0:	62 f3 6d 28 25 c8 02 	vpternlogd ymm1,ymm2,ymm0,0x2
   7:	c5 f5 c6 c1 00       	vshufpd ymm0,ymm1,ymm1,0x0
   c:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
  11:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
  16:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
  1b:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
  20:	c5 f4 57 c9          	vxorps ymm1,ymm1,ymm1

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM2, YMM2, YMM2;
VXORPS YMM0, YMM0, YMM0

Show nanoBench command
Results:
- Instructions retired: 7.0
- Core cycles: 6.0
- Reference cycles: 4.29
- UOPS_EXECUTED.THREAD: 6.0

Experiment 3

Instruction: VPTERNLOGD YMM1, YMM2, YMM0, 2
Chain instructions: VPAND YMM0, YMM1, YMM1;VPAND YMM0, YMM0, YMM0;VPAND YMM0, YMM0, YMM0;VPAND YMM0, YMM0, YMM0;VPAND YMM0, YMM0, YMM0
Chain latency: 5

Code:

   0:	62 f3 6d 28 25 c8 02 	vpternlogd ymm1,ymm2,ymm0,0x2
   7:	c5 f5 db c1          	vpand  ymm0,ymm1,ymm1
   b:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
   f:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
  13:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
  17:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM2, YMM2, YMM2;
VXORPS YMM0, YMM0, YMM0

Show nanoBench command
Results:
- Instructions retired: 6.0
- Core cycles: 5.99
- Reference cycles: 4.45
- UOPS_EXECUTED.THREAD: 6.0

Experiment 4 (with dependency-breaking instructions)

Instruction: VPTERNLOGD YMM1, YMM2, YMM0, 2
Chain instructions: VPAND YMM0, YMM1, YMM1;VPAND YMM0, YMM0, YMM0;VPAND YMM0, YMM0, YMM0;VPAND YMM0, YMM0, YMM0;VPAND YMM0, YMM0, YMM0;;VXORPS YMM1, YMM1, YMM1
Chain latency: 5

Code:

   0:	62 f3 6d 28 25 c8 02 	vpternlogd ymm1,ymm2,ymm0,0x2
   7:	c5 f5 db c1          	vpand  ymm0,ymm1,ymm1
   b:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
   f:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
  13:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
  17:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
  1b:	c5 f4 57 c9          	vxorps ymm1,ymm1,ymm1

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM2, YMM2, YMM2;
VXORPS YMM0, YMM0, YMM0

Show nanoBench command
Results:
- Instructions retired: 7.0
- Core cycles: 6.0
- Reference cycles: 4.6
- UOPS_EXECUTED.THREAD: 6.0

Experiment 5 (source registers initialized by an instruction of the same kind)

Instruction: VPTERNLOGD YMM1, YMM2, YMM0, 2
Chain instructions: VSHUFPD YMM0, YMM1, YMM1, 0;VSHUFPD YMM0, YMM0, YMM0, 0;VSHUFPD YMM0, YMM0, YMM0, 0;VSHUFPD YMM0, YMM0, YMM0, 0;VSHUFPD YMM0, YMM0, YMM0, 0
Chain latency: 5

Code:

   0:	62 f3 6d 28 25 c8 02 	vpternlogd ymm1,ymm2,ymm0,0x2
   7:	c5 f5 c6 c1 00       	vshufpd ymm0,ymm1,ymm1,0x0
   c:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
  11:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
  16:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
  1b:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM2, YMM2, YMM2;
VXORPS YMM0, YMM0, YMM0;
VPTERNLOGD YMM1, YMM0, YMM2, 2;
VPTERNLOGD YMM2, YMM0, YMM1, 2;
VPTERNLOGD YMM0, YMM1, YMM2, 2

Show nanoBench command
Results:
- Instructions retired: 6.0
- Core cycles: 6.0
- Reference cycles: 4.45
- UOPS_EXECUTED.THREAD: 6.0

Experiment 6 (source registers initialized by an instruction of the same kind, with dependency-breaking instructions)

Instruction: VPTERNLOGD YMM1, YMM2, YMM0, 2
Chain instructions: VSHUFPD YMM0, YMM1, YMM1, 0;VSHUFPD YMM0, YMM0, YMM0, 0;VSHUFPD YMM0, YMM0, YMM0, 0;VSHUFPD YMM0, YMM0, YMM0, 0;VSHUFPD YMM0, YMM0, YMM0, 0;;VXORPS YMM1, YMM1, YMM1
Chain latency: 5

Code:

   0:	62 f3 6d 28 25 c8 02 	vpternlogd ymm1,ymm2,ymm0,0x2
   7:	c5 f5 c6 c1 00       	vshufpd ymm0,ymm1,ymm1,0x0
   c:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
  11:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
  16:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
  1b:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
  20:	c5 f4 57 c9          	vxorps ymm1,ymm1,ymm1

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM2, YMM2, YMM2;
VXORPS YMM0, YMM0, YMM0;
VPTERNLOGD YMM1, YMM0, YMM2, 2;
VPTERNLOGD YMM2, YMM0, YMM1, 2;
VPTERNLOGD YMM0, YMM1, YMM2, 2

Show nanoBench command
Results:
- Instructions retired: 7.0
- Core cycles: 6.0
- Reference cycles: 4.14
- UOPS_EXECUTED.THREAD: 6.0

Experiment 7 (source registers initialized by an instruction of the same kind)

Instruction: VPTERNLOGD YMM1, YMM2, YMM0, 2
Chain instructions: VPAND YMM0, YMM1, YMM1;VPAND YMM0, YMM0, YMM0;VPAND YMM0, YMM0, YMM0;VPAND YMM0, YMM0, YMM0;VPAND YMM0, YMM0, YMM0
Chain latency: 5

Code:

   0:	62 f3 6d 28 25 c8 02 	vpternlogd ymm1,ymm2,ymm0,0x2
   7:	c5 f5 db c1          	vpand  ymm0,ymm1,ymm1
   b:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
   f:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
  13:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
  17:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM2, YMM2, YMM2;
VXORPS YMM0, YMM0, YMM0;
VPTERNLOGD YMM1, YMM0, YMM2, 2;
VPTERNLOGD YMM2, YMM0, YMM1, 2;
VPTERNLOGD YMM0, YMM1, YMM2, 2

Show nanoBench command
Results:
- Instructions retired: 6.0
- Core cycles: 5.99
- Reference cycles: 4.6
- UOPS_EXECUTED.THREAD: 6.0

Experiment 8 (source registers initialized by an instruction of the same kind, with dependency-breaking instructions)

Instruction: VPTERNLOGD YMM1, YMM2, YMM0, 2
Chain instructions: VPAND YMM0, YMM1, YMM1;VPAND YMM0, YMM0, YMM0;VPAND YMM0, YMM0, YMM0;VPAND YMM0, YMM0, YMM0;VPAND YMM0, YMM0, YMM0;;VXORPS YMM1, YMM1, YMM1
Chain latency: 5

Code:

   0:	62 f3 6d 28 25 c8 02 	vpternlogd ymm1,ymm2,ymm0,0x2
   7:	c5 f5 db c1          	vpand  ymm0,ymm1,ymm1
   b:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
   f:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
  13:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
  17:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
  1b:	c5 f4 57 c9          	vxorps ymm1,ymm1,ymm1

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM2, YMM2, YMM2;
VXORPS YMM0, YMM0, YMM0;
VPTERNLOGD YMM1, YMM0, YMM2, 2;
VPTERNLOGD YMM2, YMM0, YMM1, 2;
VPTERNLOGD YMM0, YMM1, YMM2, 2

Show nanoBench command
Results:
- Instructions retired: 7.0
- Core cycles: 6.0
- Reference cycles: 4.29
- UOPS_EXECUTED.THREAD: 6.0

VPTERNLOGD (YMM, YMM, YMM, I8) - Latency

Operands

Latency operand 1 → 1: 1

Latency operand 2 → 1: 1

Latency operand 3 → 1: 1

Latency operand 1 → 1: 1

Experiment 1

Experiment 2

Experiment 3

Experiment 4 (source registers initialized by an instruction of the same kind)

Experiment 5 (source registers initialized by an instruction of the same kind)

Experiment 6 (source registers initialized by an instruction of the same kind)

Latency operand 2 → 1: 1

Experiment 1

Experiment 2 (with dependency-breaking instructions)

Experiment 3

Experiment 4 (with dependency-breaking instructions)

Experiment 5 (source registers initialized by an instruction of the same kind)

Experiment 6 (source registers initialized by an instruction of the same kind, with dependency-breaking instructions)

Experiment 7 (source registers initialized by an instruction of the same kind)

Experiment 8 (source registers initialized by an instruction of the same kind, with dependency-breaking instructions)

Latency operand 3 → 1: 1

Experiment 1

Experiment 2 (with dependency-breaking instructions)

Experiment 3

Experiment 4 (with dependency-breaking instructions)

Experiment 5 (source registers initialized by an instruction of the same kind)

Experiment 6 (source registers initialized by an instruction of the same kind, with dependency-breaking instructions)

Experiment 7 (source registers initialized by an instruction of the same kind)

Experiment 8 (source registers initialized by an instruction of the same kind, with dependency-breaking instructions)