DIVSD (XMM, XMM)

Experiment 1

Instruction: DIVSD XMM3, XMM4
Chain instructions: ORPD XMM3, XMM1; ANDPD XMM3, XMM1; ORPD XMM3, XMM3;ORPD XMM3, XMM3;ORPD XMM3, XMM3;ORPD XMM3, XMM3;ORPD XMM3, XMM3;ORPD XMM3, XMM3;ORPD XMM3, XMM3;ORPD XMM3, XMM3
Chain latency: ≥10

Code:

   0:	f2 0f 5e dc          	divsd  xmm3,xmm4
   4:	66 0f 56 d9          	orpd   xmm3,xmm1
   8:	66 0f 54 d9          	andpd  xmm3,xmm1
   c:	66 0f 56 db          	orpd   xmm3,xmm3
  10:	66 0f 56 db          	orpd   xmm3,xmm3
  14:	66 0f 56 db          	orpd   xmm3,xmm3
  18:	66 0f 56 db          	orpd   xmm3,xmm3
  1c:	66 0f 56 db          	orpd   xmm3,xmm3
  20:	66 0f 56 db          	orpd   xmm3,xmm3
  24:	66 0f 56 db          	orpd   xmm3,xmm3
  28:	66 0f 56 db          	orpd   xmm3,xmm3

Init:

VZEROALL;
MOV RAX, 0x429da724b687da66;
MOV RBX, 0x3ff33e97f934078b;
MOV [R14+0], RBX;
MOV [R14+8], RBX;
MOV [R14+64], RAX;
MOV [R14+72], RAX;
MOVUPD XMM1, [R14+64];
MOVUPD XMM2, [R14];
MOVUPD XMM3, [R14+64];
MOVUPD XMM4, [R14]

Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 25.09
- Reference cycles: 16.25
- UOPS_EXECUTED.THREAD: 11.0

Experiment 2

Instruction: DIVSD XMM3, XMM3

Code:

   0:	f2 0f 5e db          	divsd  xmm3,xmm3

Init:

VZEROALL;
MOV RAX, 0x3ff0000000000000;
MOV RBX, 0x3ff0000000000000;
MOV [R14+0], RBX;
MOV [R14+8], RBX;
MOV [R14+64], RAX;
MOV [R14+72], RAX;
MOVUPD XMM1, [R14+64];
MOVUPD XMM2, [R14];
MOVUPD XMM3, [R14+64];
MOVUPD XMM4, [R14]

Show nanoBench command
Results:
- Instructions retired: 1.0
- Core cycles: 13.0
- Reference cycles: 8.54
- UOPS_EXECUTED.THREAD: 1.0

Experiment 3

Instruction: DIVSD XMM3, XMM4
Chain instructions: ORPD XMM3, XMM3;ORPD XMM3, XMM3;ORPD XMM3, XMM3;ORPD XMM3, XMM3;ORPD XMM3, XMM3;ORPD XMM3, XMM3;ORPD XMM3, XMM3;ORPD XMM3, XMM3
Chain latency: ≥8

Code:

   0:	f2 0f 5e dc          	divsd  xmm3,xmm4
   4:	66 0f 56 db          	orpd   xmm3,xmm3
   8:	66 0f 56 db          	orpd   xmm3,xmm3
   c:	66 0f 56 db          	orpd   xmm3,xmm3
  10:	66 0f 56 db          	orpd   xmm3,xmm3
  14:	66 0f 56 db          	orpd   xmm3,xmm3
  18:	66 0f 56 db          	orpd   xmm3,xmm3
  1c:	66 0f 56 db          	orpd   xmm3,xmm3
  20:	66 0f 56 db          	orpd   xmm3,xmm3

Init:

VZEROALL;
MOV RAX, 0x3ff0000000000000;
MOV RBX, 0x3ff0000000000000;
MOV [R14+0], RBX;
MOV [R14+8], RBX;
MOV [R14+64], RAX;
MOV [R14+72], RAX;
MOVUPD XMM1, [R14+64];
MOVUPD XMM2, [R14];
MOVUPD XMM3, [R14+64];
MOVUPD XMM4, [R14]

Show nanoBench command
Results:
- Instructions retired: 9.0
- Core cycles: 22.35
- Reference cycles: 15.0
- UOPS_EXECUTED.THREAD: 9.0

Experiment 1

Instruction: DIVSD XMM3, XMM4
Chain instructions: ANDPD XMM4, XMM3; MOVUPD XMM3, XMM1; ANDPD XMM4, XMM2; ORPD XMM4, XMM2; ORPD XMM4, XMM4; ORPD XMM4, XMM4; ORPD XMM4, XMM4; ORPD XMM4, XMM4; ORPD XMM4, XMM4; ORPD XMM4, XMM4; ORPD XMM4, XMM4; ORPD XMM4, XMM4;
Chain latency: ≥11

Code:

   0:	f2 0f 5e dc          	divsd  xmm3,xmm4
   4:	66 0f 54 e3          	andpd  xmm4,xmm3
   8:	66 0f 10 d9          	movupd xmm3,xmm1
   c:	66 0f 54 e2          	andpd  xmm4,xmm2
  10:	66 0f 56 e2          	orpd   xmm4,xmm2
  14:	66 0f 56 e4          	orpd   xmm4,xmm4
  18:	66 0f 56 e4          	orpd   xmm4,xmm4
  1c:	66 0f 56 e4          	orpd   xmm4,xmm4
  20:	66 0f 56 e4          	orpd   xmm4,xmm4
  24:	66 0f 56 e4          	orpd   xmm4,xmm4
  28:	66 0f 56 e4          	orpd   xmm4,xmm4
  2c:	66 0f 56 e4          	orpd   xmm4,xmm4
  30:	66 0f 56 e4          	orpd   xmm4,xmm4

Init:

VZEROALL;
MOV RAX, 0x429da724b687da66;
MOV RBX, 0x3ff33e97f934078b;
MOV [R14+0], RBX;
MOV [R14+8], RBX;
MOV [R14+64], RAX;
MOV [R14+72], RAX;
MOVUPD XMM1, [R14+64];
MOVUPD XMM2, [R14];
MOVUPD XMM3, [R14+64];
MOVUPD XMM4, [R14]

Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 26.23
- Reference cycles: 16.67
- UOPS_EXECUTED.THREAD: 12.0

Experiment 2

Instruction: DIVSD XMM3, XMM3

Code:

   0:	f2 0f 5e db          	divsd  xmm3,xmm3

Init:

VZEROALL;
MOV RAX, 0x3ff0000000000000;
MOV RBX, 0x3ff0000000000000;
MOV [R14+0], RBX;
MOV [R14+8], RBX;
MOV [R14+64], RAX;
MOV [R14+72], RAX;
MOVUPD XMM1, [R14+64];
MOVUPD XMM2, [R14];
MOVUPD XMM3, [R14+64];
MOVUPD XMM4, [R14]

Show nanoBench command
Results:
- Instructions retired: 1.0
- Core cycles: 13.0
- Reference cycles: 8.54
- UOPS_EXECUTED.THREAD: 1.0

Experiment 3

Instruction: DIVSD XMM3, XMM4
Chain instructions: ANDPD XMM4, XMM3; ANDPD XMM4, XMM2; ORPD XMM4, XMM2; ORPD XMM4, XMM4; ORPD XMM4, XMM4; ORPD XMM4, XMM4; ORPD XMM4, XMM4; ORPD XMM4, XMM4; ORPD XMM4, XMM4; ORPD XMM4, XMM4; ORPD XMM4, XMM4;
Chain latency: ≥11

Code:

   0:	f2 0f 5e dc          	divsd  xmm3,xmm4
   4:	66 0f 54 e3          	andpd  xmm4,xmm3
   8:	66 0f 54 e2          	andpd  xmm4,xmm2
   c:	66 0f 56 e2          	orpd   xmm4,xmm2
  10:	66 0f 56 e4          	orpd   xmm4,xmm4
  14:	66 0f 56 e4          	orpd   xmm4,xmm4
  18:	66 0f 56 e4          	orpd   xmm4,xmm4
  1c:	66 0f 56 e4          	orpd   xmm4,xmm4
  20:	66 0f 56 e4          	orpd   xmm4,xmm4
  24:	66 0f 56 e4          	orpd   xmm4,xmm4
  28:	66 0f 56 e4          	orpd   xmm4,xmm4
  2c:	66 0f 56 e4          	orpd   xmm4,xmm4

Init:

VZEROALL;
MOV RAX, 0x3ff0000000000000;
MOV RBX, 0x3ff0000000000000;
MOV [R14+0], RBX;
MOV [R14+8], RBX;
MOV [R14+64], RAX;
MOV [R14+72], RAX;
MOVUPD XMM1, [R14+64];
MOVUPD XMM2, [R14];
MOVUPD XMM3, [R14+64];
MOVUPD XMM4, [R14]

Show nanoBench command
Results:
- Instructions retired: 12.0
- Core cycles: 25.46
- Reference cycles: 16.25
- UOPS_EXECUTED.THREAD: 12.0

DIVSD (XMM, XMM) - Latency

Operands

Latency operand 1 → 1: ≤13

Latency operand 2 → 1: ≤13

Latency operand 1 → 1: ≤13

Experiment 1

Experiment 2

Experiment 3

Latency operand 2 → 1: ≤13

Experiment 1

Experiment 2

Experiment 3