IMUL (R32, R32)

Experiment 1 (with R9D=0)

Instruction: IMUL R8D, R9D

Code:

   0:	45 0f af c1          	imul   r8d,r9d

Init:
```
MOV R9D, 0
```
Show nanoBench command
Results:
- Instructions retired: 1.0
- Core cycles: 5.0
- Reference cycles: 4.98
- UOPS_RETIRED.ANY: 1.0

Experiment 2 (with R9D=1)

Instruction: IMUL R8D, R9D

Code:

   0:	45 0f af c1          	imul   r8d,r9d

Init:
```
MOV R9D, 1
```
Show nanoBench command
Results:
- Instructions retired: 1.0
- Core cycles: 5.0
- Reference cycles: 4.98
- UOPS_RETIRED.ANY: 1.0

Experiment 3 (with R9D=2)

Instruction: IMUL R8D, R9D

Code:

   0:	45 0f af c1          	imul   r8d,r9d

Init:
```
MOV R9D, 2
```
Show nanoBench command
Results:
- Instructions retired: 1.0
- Core cycles: 5.0
- Reference cycles: 4.97
- UOPS_RETIRED.ANY: 1.0

Experiment 4 (with R9D=0)

Instruction: IMUL R8D, R9D
Chain instructions: MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D
Chain latency: 9

Code:

   0:	45 0f af c1          	imul   r8d,r9d
   4:	4d 63 c0             	movsxd r8,r8d
   7:	4d 63 c0             	movsxd r8,r8d
   a:	4d 63 c0             	movsxd r8,r8d
   d:	4d 63 c0             	movsxd r8,r8d
  10:	4d 63 c0             	movsxd r8,r8d
  13:	4d 63 c0             	movsxd r8,r8d
  16:	4d 63 c0             	movsxd r8,r8d
  19:	4d 63 c0             	movsxd r8,r8d
  1c:	4d 63 c0             	movsxd r8,r8d

Init:
```
MOV R9D, 0
```
Show nanoBench command
Results:
- Instructions retired: 10.0
- Core cycles: 14.0
- Reference cycles: 13.98
- UOPS_RETIRED.ANY: 10.0

Experiment 5 (with R9D=1)

Instruction: IMUL R8D, R9D
Chain instructions: MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D
Chain latency: 9

Code:

   0:	45 0f af c1          	imul   r8d,r9d
   4:	4d 63 c0             	movsxd r8,r8d
   7:	4d 63 c0             	movsxd r8,r8d
   a:	4d 63 c0             	movsxd r8,r8d
   d:	4d 63 c0             	movsxd r8,r8d
  10:	4d 63 c0             	movsxd r8,r8d
  13:	4d 63 c0             	movsxd r8,r8d
  16:	4d 63 c0             	movsxd r8,r8d
  19:	4d 63 c0             	movsxd r8,r8d
  1c:	4d 63 c0             	movsxd r8,r8d

Init:
```
MOV R9D, 1
```
Show nanoBench command
Results:
- Instructions retired: 10.0
- Core cycles: 14.0
- Reference cycles: 13.98
- UOPS_RETIRED.ANY: 10.0

Experiment 6 (with R9D=2)

Instruction: IMUL R8D, R9D
Chain instructions: MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D
Chain latency: 9

Code:

   0:	45 0f af c1          	imul   r8d,r9d
   4:	4d 63 c0             	movsxd r8,r8d
   7:	4d 63 c0             	movsxd r8,r8d
   a:	4d 63 c0             	movsxd r8,r8d
   d:	4d 63 c0             	movsxd r8,r8d
  10:	4d 63 c0             	movsxd r8,r8d
  13:	4d 63 c0             	movsxd r8,r8d
  16:	4d 63 c0             	movsxd r8,r8d
  19:	4d 63 c0             	movsxd r8,r8d
  1c:	4d 63 c0             	movsxd r8,r8d

Init:
```
MOV R9D, 2
```
Show nanoBench command
Results:
- Instructions retired: 10.0
- Core cycles: 14.0
- Reference cycles: 13.98
- UOPS_RETIRED.ANY: 10.0

Latency operand 1 → 3: 5

Experiment 1 (with R9D=0)

Instruction: IMUL R8D, R9D
Chain instructions: CMOVO R15D, R15D;MOVSX R8, R15D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D
Chain latency: 11

Code:

   0:	45 0f af c1          	imul   r8d,r9d
   4:	45 0f 40 ff          	cmovo  r15d,r15d
   8:	4d 63 c7             	movsxd r8,r15d
   b:	4d 63 c0             	movsxd r8,r8d
   e:	4d 63 c0             	movsxd r8,r8d
  11:	4d 63 c0             	movsxd r8,r8d
  14:	4d 63 c0             	movsxd r8,r8d
  17:	4d 63 c0             	movsxd r8,r8d
  1a:	4d 63 c0             	movsxd r8,r8d
  1d:	4d 63 c0             	movsxd r8,r8d
  20:	4d 63 c0             	movsxd r8,r8d

Init:
```
MOV R9D, 0
```
Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 16.0
- Reference cycles: 16.02
- UOPS_RETIRED.ANY: 11.0

Experiment 2 (with R9D=1)

Instruction: IMUL R8D, R9D
Chain instructions: CMOVO R15D, R15D;MOVSX R8, R15D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D
Chain latency: 11

Code:

   0:	45 0f af c1          	imul   r8d,r9d
   4:	45 0f 40 ff          	cmovo  r15d,r15d
   8:	4d 63 c7             	movsxd r8,r15d
   b:	4d 63 c0             	movsxd r8,r8d
   e:	4d 63 c0             	movsxd r8,r8d
  11:	4d 63 c0             	movsxd r8,r8d
  14:	4d 63 c0             	movsxd r8,r8d
  17:	4d 63 c0             	movsxd r8,r8d
  1a:	4d 63 c0             	movsxd r8,r8d
  1d:	4d 63 c0             	movsxd r8,r8d
  20:	4d 63 c0             	movsxd r8,r8d

Init:
```
MOV R9D, 1
```
Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 16.0
- Reference cycles: 16.02
- UOPS_RETIRED.ANY: 11.0

Experiment 3 (with R9D=2)

Instruction: IMUL R8D, R9D
Chain instructions: CMOVO R15D, R15D;MOVSX R8, R15D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D
Chain latency: 11

Code:

   0:	45 0f af c1          	imul   r8d,r9d
   4:	45 0f 40 ff          	cmovo  r15d,r15d
   8:	4d 63 c7             	movsxd r8,r15d
   b:	4d 63 c0             	movsxd r8,r8d
   e:	4d 63 c0             	movsxd r8,r8d
  11:	4d 63 c0             	movsxd r8,r8d
  14:	4d 63 c0             	movsxd r8,r8d
  17:	4d 63 c0             	movsxd r8,r8d
  1a:	4d 63 c0             	movsxd r8,r8d
  1d:	4d 63 c0             	movsxd r8,r8d
  20:	4d 63 c0             	movsxd r8,r8d

Init:
```
MOV R9D, 2
```
Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 16.0
- Reference cycles: 16.02
- UOPS_RETIRED.ANY: 11.0

Experiment 4 (with R9D=0)

Instruction: IMUL R8D, R9D
Chain instructions: CMOVC R15D, R15D;MOVSX R8, R15D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D
Chain latency: 11

Code:

   0:	45 0f af c1          	imul   r8d,r9d
   4:	45 0f 42 ff          	cmovb  r15d,r15d
   8:	4d 63 c7             	movsxd r8,r15d
   b:	4d 63 c0             	movsxd r8,r8d
   e:	4d 63 c0             	movsxd r8,r8d
  11:	4d 63 c0             	movsxd r8,r8d
  14:	4d 63 c0             	movsxd r8,r8d
  17:	4d 63 c0             	movsxd r8,r8d
  1a:	4d 63 c0             	movsxd r8,r8d
  1d:	4d 63 c0             	movsxd r8,r8d
  20:	4d 63 c0             	movsxd r8,r8d

Init:
```
MOV R9D, 0
```
Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 16.0
- Reference cycles: 16.02
- UOPS_RETIRED.ANY: 11.0

Experiment 5 (with R9D=1)

Instruction: IMUL R8D, R9D
Chain instructions: CMOVC R15D, R15D;MOVSX R8, R15D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D
Chain latency: 11

Code:

   0:	45 0f af c1          	imul   r8d,r9d
   4:	45 0f 42 ff          	cmovb  r15d,r15d
   8:	4d 63 c7             	movsxd r8,r15d
   b:	4d 63 c0             	movsxd r8,r8d
   e:	4d 63 c0             	movsxd r8,r8d
  11:	4d 63 c0             	movsxd r8,r8d
  14:	4d 63 c0             	movsxd r8,r8d
  17:	4d 63 c0             	movsxd r8,r8d
  1a:	4d 63 c0             	movsxd r8,r8d
  1d:	4d 63 c0             	movsxd r8,r8d
  20:	4d 63 c0             	movsxd r8,r8d

Init:
```
MOV R9D, 1
```
Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 16.0
- Reference cycles: 16.02
- UOPS_RETIRED.ANY: 11.0

Experiment 6 (with R9D=2)

Instruction: IMUL R8D, R9D
Chain instructions: CMOVC R15D, R15D;MOVSX R8, R15D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D
Chain latency: 11

Code:

   0:	45 0f af c1          	imul   r8d,r9d
   4:	45 0f 42 ff          	cmovb  r15d,r15d
   8:	4d 63 c7             	movsxd r8,r15d
   b:	4d 63 c0             	movsxd r8,r8d
   e:	4d 63 c0             	movsxd r8,r8d
  11:	4d 63 c0             	movsxd r8,r8d
  14:	4d 63 c0             	movsxd r8,r8d
  17:	4d 63 c0             	movsxd r8,r8d
  1a:	4d 63 c0             	movsxd r8,r8d
  1d:	4d 63 c0             	movsxd r8,r8d
  20:	4d 63 c0             	movsxd r8,r8d

Init:
```
MOV R9D, 2
```
Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 16.0
- Reference cycles: 16.02
- UOPS_RETIRED.ANY: 11.0

Latency operand 2 → 1: 5

Latency operand 2 → 3: 5

Experiment 1

Instruction: IMUL R9D, R8D
Chain instructions: CMOVO R15D, R15D;MOVSX R8, R15D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D
Chain latency: 11

Code:

   0:	45 0f af c8          	imul   r9d,r8d
   4:	45 0f 40 ff          	cmovo  r15d,r15d
   8:	4d 63 c7             	movsxd r8,r15d
   b:	4d 63 c0             	movsxd r8,r8d
   e:	4d 63 c0             	movsxd r8,r8d
  11:	4d 63 c0             	movsxd r8,r8d
  14:	4d 63 c0             	movsxd r8,r8d
  17:	4d 63 c0             	movsxd r8,r8d
  1a:	4d 63 c0             	movsxd r8,r8d
  1d:	4d 63 c0             	movsxd r8,r8d
  20:	4d 63 c0             	movsxd r8,r8d

Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 16.0
- Reference cycles: 16.02
- UOPS_RETIRED.ANY: 11.0

Experiment 2

Instruction: IMUL R9D, R8D
Chain instructions: CMOVC R15D, R15D;MOVSX R8, R15D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D
Chain latency: 11

Code:

   0:	45 0f af c8          	imul   r9d,r8d
   4:	45 0f 42 ff          	cmovb  r15d,r15d
   8:	4d 63 c7             	movsxd r8,r15d
   b:	4d 63 c0             	movsxd r8,r8d
   e:	4d 63 c0             	movsxd r8,r8d
  11:	4d 63 c0             	movsxd r8,r8d
  14:	4d 63 c0             	movsxd r8,r8d
  17:	4d 63 c0             	movsxd r8,r8d
  1a:	4d 63 c0             	movsxd r8,r8d
  1d:	4d 63 c0             	movsxd r8,r8d
  20:	4d 63 c0             	movsxd r8,r8d

Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 16.0
- Reference cycles: 16.02
- UOPS_RETIRED.ANY: 11.0

IMUL (R32, R32) - Latency

Operands

Latency operand 1 → 1: 5

Latency operand 1 → 3: 5

Latency operand 2 → 1: 5

Latency operand 2 → 3: 5

Latency operand 1 → 1: 5

Experiment 1 (with R9D=0)

Experiment 2 (with R9D=1)

Experiment 3 (with R9D=2)

Experiment 4 (with R9D=0)

Experiment 5 (with R9D=1)

Experiment 6 (with R9D=2)

Latency operand 1 → 3: 5

Experiment 1 (with R9D=0)

Experiment 2 (with R9D=1)

Experiment 3 (with R9D=2)

Experiment 4 (with R9D=0)

Experiment 5 (with R9D=1)

Experiment 6 (with R9D=2)

Latency operand 2 → 1: 5

Experiment 1

Latency operand 2 → 3: 5

Experiment 1

Experiment 2