ADC (AL, 0)

Experiment 1

Instruction: ADC AL, 0
Chain instructions: MOVSX RAX, AL;MOVSX RAX, EAX;MOVSX RAX, EAX;MOVSX RAX, EAX;MOVSX RAX, EAX
Chain latency: 5

Code:

   0:	14 00                	adc    al,0x0
   2:	48 0f be c0          	movsx  rax,al
   6:	48 63 c0             	movsxd rax,eax
   9:	48 63 c0             	movsxd rax,eax
   c:	48 63 c0             	movsxd rax,eax
   f:	48 63 c0             	movsxd rax,eax

Show nanoBench command
Results:
- Instructions retired: 6.0
- Core cycles: 7.0
- Reference cycles: 7.4
- UOPS_EXECUTED.THREAD: 7.0

Experiment 2

Instruction: ADC AL, 0

Code:

   0:	14 00                	adc    al,0x0

Show nanoBench command
Results:
- Instructions retired: 1.0
- Core cycles: 2.0
- Reference cycles: 2.03
- UOPS_EXECUTED.THREAD: 2.0

Experiment 3 (with dependency-breaking instructions)

Instruction: ADC AL, 0
Chain instruction: TEST R15, R15

Code:

   0:	14 00                	adc    al,0x0
   2:	4d 85 ff             	test   r15,r15

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 2.0
- Reference cycles: 2.0
- UOPS_EXECUTED.THREAD: 3.0

Latency operand 1 → 3: 2

Experiment 1

Instruction: ADC AL, 0
Chain instructions: SETS AL;MOVSX RAX, AL;MOVSX RAX, AL;MOVSX RAX, AL;MOVSX RAX, AL
Chain latency: 5

Code:

   0:	14 00                	adc    al,0x0
   2:	0f 98 c0             	sets   al
   5:	48 0f be c0          	movsx  rax,al
   9:	48 0f be c0          	movsx  rax,al
   d:	48 0f be c0          	movsx  rax,al
  11:	48 0f be c0          	movsx  rax,al

Show nanoBench command
Results:
- Instructions retired: 6.0
- Core cycles: 7.0
- Reference cycles: 7.4
- UOPS_EXECUTED.THREAD: 7.0

Experiment 2

Instruction: ADC AL, 0
Chain instructions: SETC AL;MOVSX RAX, AL;MOVSX RAX, AL;MOVSX RAX, AL;MOVSX RAX, AL
Chain latency: 5

Code:

   0:	14 00                	adc    al,0x0
   2:	0f 92 c0             	setb   al
   5:	48 0f be c0          	movsx  rax,al
   9:	48 0f be c0          	movsx  rax,al
   d:	48 0f be c0          	movsx  rax,al
  11:	48 0f be c0          	movsx  rax,al

Show nanoBench command
Results:
- Instructions retired: 6.0
- Core cycles: 7.0
- Reference cycles: 7.4
- UOPS_EXECUTED.THREAD: 7.0

Experiment 3

Instruction: ADC AL, 0
Chain instructions: SETO AL;MOVSX RAX, AL;MOVSX RAX, AL;MOVSX RAX, AL;MOVSX RAX, AL
Chain latency: 5

Code:

   0:	14 00                	adc    al,0x0
   2:	0f 90 c0             	seto   al
   5:	48 0f be c0          	movsx  rax,al
   9:	48 0f be c0          	movsx  rax,al
   d:	48 0f be c0          	movsx  rax,al
  11:	48 0f be c0          	movsx  rax,al

Show nanoBench command
Results:
- Instructions retired: 6.0
- Core cycles: 7.0
- Reference cycles: 7.4
- UOPS_EXECUTED.THREAD: 7.0

Experiment 4

Instruction: ADC AL, 0
Chain instructions: SETP AL;MOVSX RAX, AL;MOVSX RAX, AL;MOVSX RAX, AL;MOVSX RAX, AL
Chain latency: 5

Code:

   0:	14 00                	adc    al,0x0
   2:	0f 9a c0             	setp   al
   5:	48 0f be c0          	movsx  rax,al
   9:	48 0f be c0          	movsx  rax,al
   d:	48 0f be c0          	movsx  rax,al
  11:	48 0f be c0          	movsx  rax,al

Show nanoBench command
Results:
- Instructions retired: 6.0
- Core cycles: 7.0
- Reference cycles: 7.4
- UOPS_EXECUTED.THREAD: 7.0

Experiment 5

Instruction: ADC AL, 0
Chain instructions: SETZ AL;MOVSX RAX, AL;MOVSX RAX, AL;MOVSX RAX, AL;MOVSX RAX, AL
Chain latency: 5

Code:

   0:	14 00                	adc    al,0x0
   2:	0f 94 c0             	sete   al
   5:	48 0f be c0          	movsx  rax,al
   9:	48 0f be c0          	movsx  rax,al
   d:	48 0f be c0          	movsx  rax,al
  11:	48 0f be c0          	movsx  rax,al

Show nanoBench command
Results:
- Instructions retired: 6.0
- Core cycles: 7.0
- Reference cycles: 7.4
- UOPS_EXECUTED.THREAD: 7.0

Latency operand 3 → 1: 1

Experiment 1

Instruction: ADC AL, 0
Chain instructions: MOVSX RAX, AL;MOVSX RAX, AL;MOVSX RAX, AL;MOVSX RAX, AL;TEST AL, AL
Chain latency: 5

Code:

   0:	14 00                	adc    al,0x0
   2:	48 0f be c0          	movsx  rax,al
   6:	48 0f be c0          	movsx  rax,al
   a:	48 0f be c0          	movsx  rax,al
   e:	48 0f be c0          	movsx  rax,al
  12:	84 c0                	test   al,al

Show nanoBench command
Results:
- Instructions retired: 6.0
- Core cycles: 6.02
- Reference cycles: 6.4
- UOPS_EXECUTED.THREAD: 7.0

Experiment 2

Instruction: ADC AL, 0
Chain instruction: TEST AL, AL
Chain latency: 1

Code:

   0:	14 00                	adc    al,0x0
   2:	84 c0                	test   al,al

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 2.02
- Reference cycles: 2.13
- UOPS_EXECUTED.THREAD: 3.0

Experiment 3 (with dependency-breaking instructions)

Instruction: ADC AL, 0
Chain instructions: TEST AL, AL;;MOV AL, 0
Chain latency: 1

Code:

   0:	14 00                	adc    al,0x0
   2:	84 c0                	test   al,al
   4:	b0 00                	mov    al,0x0

Show nanoBench command
Results:
- Instructions retired: 3.0
- Core cycles: 3.09
- Reference cycles: 3.27
- UOPS_EXECUTED.THREAD: 4.0

Latency operand 3 → 3: 1

Experiment 1

Instruction: ADC AL, 0
Chain instructions: CMC;CMC;CMC;CMC
Chain latency: 4

Code:

   0:	14 00                	adc    al,0x0
   2:	f5                   	cmc    
   3:	f5                   	cmc    
   4:	f5                   	cmc    
   5:	f5                   	cmc

Show nanoBench command
Results:
- Instructions retired: 5.0
- Core cycles: 5.0
- Reference cycles: 5.27
- UOPS_EXECUTED.THREAD: 6.0

Experiment 2

Instruction: ADC AL, 0

Code:

   0:	14 00                	adc    al,0x0

Show nanoBench command
Results:
- Instructions retired: 1.0
- Core cycles: 2.0
- Reference cycles: 2.17
- UOPS_EXECUTED.THREAD: 2.0

Experiment 3 (with dependency-breaking instructions)

Instruction: ADC AL, 0
Chain instruction: MOV AL, 0

Code:

   0:	14 00                	adc    al,0x0
   2:	b0 00                	mov    al,0x0

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 3.0
- Reference cycles: 3.2
- UOPS_EXECUTED.THREAD: 3.0

ADC (AL, 0) - Latency

Operands

Latency operand 1 → 1: 2

Latency operand 1 → 3: 2

Latency operand 3 → 1: 1

Latency operand 3 → 3: 1

Latency operand 1 → 1: 2

Experiment 1

Experiment 2

Experiment 3 (with dependency-breaking instructions)

Latency operand 1 → 3: 2

Experiment 1

Experiment 2

Experiment 3

Experiment 4

Experiment 5

Latency operand 3 → 1: 1

Experiment 1

Experiment 2

Experiment 3 (with dependency-breaking instructions)

Latency operand 3 → 3: 1

Experiment 1

Experiment 2

Experiment 3 (with dependency-breaking instructions)