LEA_B_I_D32 (R32) - Latency

Operands

Operand 1 (w): Register (EAX, ECX, EDX, EBX, ESP, EBP, ESI, EDI, R8D, R9D, R10D, R11D, R12D, R13D, R14D, R15D)
Operand 2 (r):

Latency operand 2 → 1 (address, base register): 2

Latency operand 2 → 1 (address, index register): 2

Latency operand 2 → 1 (address, base register): 2

Experiment 1

Instruction: LEA R8D, [R14+1*R13+128]
Chain instructions: MOVSX R8, R8D;XOR R14, R8;XOR R14, R8;XOR R14, R8;XOR R14, R8
Chain latency: 5

Code:

   0:	47 8d 84 2e 80 00 00 	lea    r8d,[r14+r13*1+0x80]
   7:	00 
   8:	4d 63 c0             	movsxd r8,r8d
   b:	4d 31 c6             	xor    r14,r8
   e:	4d 31 c6             	xor    r14,r8
  11:	4d 31 c6             	xor    r14,r8
  14:	4d 31 c6             	xor    r14,r8

Show nanoBench command
Results:
- Instructions retired: 6.0
- Core cycles: 6.99
- Reference cycles: 3.51
- UOPS_RETIRED.ALL: 6.0

Latency operand 2 → 1 (address, index register): 2

Experiment 1

Instruction: LEA R8D, [R14+1*R13+128]
Chain instructions: MOVSX R8, R8D;XOR R13, R8;XOR R13, R8;XOR R13, R8;XOR R13, R8
Chain latency: 5

Code:

   0:	47 8d 84 2e 80 00 00 	lea    r8d,[r14+r13*1+0x80]
   7:	00 
   8:	4d 63 c0             	movsxd r8,r8d
   b:	4d 31 c5             	xor    r13,r8
   e:	4d 31 c5             	xor    r13,r8
  11:	4d 31 c5             	xor    r13,r8
  14:	4d 31 c5             	xor    r13,r8

Show nanoBench command
Results:
- Instructions retired: 6.0
- Core cycles: 6.99
- Reference cycles: 3.49
- UOPS_RETIRED.ALL: 6.0