SHLX (R64, R64, R64) - Latency

Operands

Operand 1 (w): Register (RAX, RCX, RDX, RBX, RSP, RBP, RSI, RDI, R8, R9, R10, R11, R12, R13, R14, R15)
Operand 2 (r): Register (RAX, RCX, RDX, RBX, RSP, RBP, RSI, RDI, R8, R9, R10, R11, R12, R13, R14, R15)
Operand 3 (r): Register (RAX, RCX, RDX, RBX, RSP, RBP, RSI, RDI, R8, R9, R10, R11, R12, R13, R14, R15)

Latency operand 2 → 1: 3

Latency operand 3 → 1: 3

Latency operand 2 → 1: 3

Experiment 1

Instruction: SHLX R9, R8, R10
Chain instructions: MOVSX R8, R9D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D
Chain latency: 5

Code:

   0:	c4 42 a9 f7 c8       	shlx   r9,r8,r10
   5:	4d 63 c1             	movsxd r8,r9d
   8:	4d 63 c0             	movsxd r8,r8d
   b:	4d 63 c0             	movsxd r8,r8d
   e:	4d 63 c0             	movsxd r8,r8d
  11:	4d 63 c0             	movsxd r8,r8d

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL

Show nanoBench command
Results:
- Instructions retired: 6.0
- Core cycles: 8.01
- Reference cycles: 6.24
- UOPS_EXECUTED.THREAD: 6.01

Latency operand 3 → 1: 3

Experiment 1

Instruction: SHLX R9, R10, R8
Chain instructions: MOVSX R8, R9D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D;MOVSX R8, R8D
Chain latency: 5

Code:

   0:	c4 42 b9 f7 ca       	shlx   r9,r10,r8
   5:	4d 63 c1             	movsxd r8,r9d
   8:	4d 63 c0             	movsxd r8,r8d
   b:	4d 63 c0             	movsxd r8,r8d
   e:	4d 63 c0             	movsxd r8,r8d
  11:	4d 63 c0             	movsxd r8,r8d

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL

Show nanoBench command
Results:
- Instructions retired: 6.0
- Core cycles: 8.01
- Reference cycles: 5.92
- UOPS_EXECUTED.THREAD: 5.98