VSQRTPS (XMM, XMM)

Experiment 1

Instruction: VSQRTPS XMM0, XMM2
Chain instructions: VORPS XMM2, XMM0, XMM0; VORPS XMM2, XMM2, XMM1; VANDPS XMM2, XMM2, XMM1; VORPS XMM2, XMM2, XMM2; VORPS XMM2, XMM2, XMM2; VORPS XMM2, XMM2, XMM2; VORPS XMM2, XMM2, XMM2; VORPS XMM2, XMM2, XMM2; VORPS XMM2, XMM2, XMM2; VORPS XMM2, XMM2, XMM2; VORPS XMM2, XMM2, XMM2; VORPS XMM2, XMM2, XMM2; VORPS XMM2, XMM2, XMM2; VORPS XMM2, XMM2, XMM2; VORPS XMM2, XMM2, XMM2; VORPS XMM2, XMM2, XMM2; VORPS XMM2, XMM2, XMM2;
Chain latency: ≥17

Code:

   0:	c5 f8 51 c2          	vsqrtps xmm0,xmm2
   4:	c5 f8 56 d0          	vorps  xmm2,xmm0,xmm0
   8:	c5 e8 56 d1          	vorps  xmm2,xmm2,xmm1
   c:	c5 e8 54 d1          	vandps xmm2,xmm2,xmm1
  10:	c5 e8 56 d2          	vorps  xmm2,xmm2,xmm2
  14:	c5 e8 56 d2          	vorps  xmm2,xmm2,xmm2
  18:	c5 e8 56 d2          	vorps  xmm2,xmm2,xmm2
  1c:	c5 e8 56 d2          	vorps  xmm2,xmm2,xmm2
  20:	c5 e8 56 d2          	vorps  xmm2,xmm2,xmm2
  24:	c5 e8 56 d2          	vorps  xmm2,xmm2,xmm2
  28:	c5 e8 56 d2          	vorps  xmm2,xmm2,xmm2
  2c:	c5 e8 56 d2          	vorps  xmm2,xmm2,xmm2
  30:	c5 e8 56 d2          	vorps  xmm2,xmm2,xmm2
  34:	c5 e8 56 d2          	vorps  xmm2,xmm2,xmm2
  38:	c5 e8 56 d2          	vorps  xmm2,xmm2,xmm2
  3c:	c5 e8 56 d2          	vorps  xmm2,xmm2,xmm2
  40:	c5 e8 56 d2          	vorps  xmm2,xmm2,xmm2
  44:	c5 e8 56 d2          	vorps  xmm2,xmm2,xmm2

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x72d30ff172d30ff1;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
VMOVUPS XMM2, [R14];
VMOVUPS XMM1, [R14]

Show nanoBench command
Results:
- Instructions retired: 18.0
- Core cycles: 36.0
- Reference cycles: 36.64
- UOPS_RETIRED.ALL: 18.0

Experiment 2

Instruction: VSQRTPS XMM2, XMM2

Code:

   0:	c5 f8 51 d2          	vsqrtps xmm2,xmm2

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x3f8000003f800000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
VMOVUPS XMM2, [R14];
VMOVUPS XMM1, [R14]

Show nanoBench command
Results:
- Instructions retired: 1.0
- Core cycles: 17.0
- Reference cycles: 16.8
- UOPS_RETIRED.ALL: 1.0

Experiment 3

Instruction: VSQRTPS XMM0, XMM2
Chain instructions: VORPS XMM2, XMM0, XMM0; VORPS XMM2, XMM2, XMM1; VANDPS XMM2, XMM2, XMM1; VORPS XMM2, XMM2, XMM2; VORPS XMM2, XMM2, XMM2; VORPS XMM2, XMM2, XMM2; VORPS XMM2, XMM2, XMM2; VORPS XMM2, XMM2, XMM2; VORPS XMM2, XMM2, XMM2; VORPS XMM2, XMM2, XMM2; VORPS XMM2, XMM2, XMM2; VORPS XMM2, XMM2, XMM2; VORPS XMM2, XMM2, XMM2; VORPS XMM2, XMM2, XMM2; VORPS XMM2, XMM2, XMM2; VORPS XMM2, XMM2, XMM2; VORPS XMM2, XMM2, XMM2;
Chain latency: ≥17

Code:

   0:	c5 f8 51 c2          	vsqrtps xmm0,xmm2
   4:	c5 f8 56 d0          	vorps  xmm2,xmm0,xmm0
   8:	c5 e8 56 d1          	vorps  xmm2,xmm2,xmm1
   c:	c5 e8 54 d1          	vandps xmm2,xmm2,xmm1
  10:	c5 e8 56 d2          	vorps  xmm2,xmm2,xmm2
  14:	c5 e8 56 d2          	vorps  xmm2,xmm2,xmm2
  18:	c5 e8 56 d2          	vorps  xmm2,xmm2,xmm2
  1c:	c5 e8 56 d2          	vorps  xmm2,xmm2,xmm2
  20:	c5 e8 56 d2          	vorps  xmm2,xmm2,xmm2
  24:	c5 e8 56 d2          	vorps  xmm2,xmm2,xmm2
  28:	c5 e8 56 d2          	vorps  xmm2,xmm2,xmm2
  2c:	c5 e8 56 d2          	vorps  xmm2,xmm2,xmm2
  30:	c5 e8 56 d2          	vorps  xmm2,xmm2,xmm2
  34:	c5 e8 56 d2          	vorps  xmm2,xmm2,xmm2
  38:	c5 e8 56 d2          	vorps  xmm2,xmm2,xmm2
  3c:	c5 e8 56 d2          	vorps  xmm2,xmm2,xmm2
  40:	c5 e8 56 d2          	vorps  xmm2,xmm2,xmm2
  44:	c5 e8 56 d2          	vorps  xmm2,xmm2,xmm2

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x3f8000003f800000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
VMOVUPS XMM2, [R14];
VMOVUPS XMM1, [R14]

Show nanoBench command
Results:
- Instructions retired: 18.0
- Core cycles: 36.0
- Reference cycles: 36.8
- UOPS_RETIRED.ALL: 18.0

VSQRTPS (XMM, XMM) - Latency

Operands

Latency operand 2 → 1: ≤17

Latency operand 2 → 1: ≤17

Experiment 1

Experiment 2

Experiment 3