VPCONFLICTQ (ZMM, ZMM)

Summary:	"Detect Conflicts Within a Vector of Packed Dword/Qword Values into Dense Memory/ Register"
Reference:	https://www.felixcloutier.com/x86/VPCONFLICTD:VPCONFLICTQ.html
Extension:	AVX512EVEX
Category:	CONFLICT
ISA-Set:	AVX512CD_512
CPL:	3
iform:	VPCONFLICTQ_ZMMu64_MASKmskw_ZMMu64_AVX512CD
iclass:	VPCONFLICTQ
ASM:	VPCONFLICTQ

Operands

Operand 1 (w): Register (ZMM0, ZMM1, ZMM2, ZMM3, ZMM4, ZMM5, ZMM6, ZMM7, ZMM8, ZMM9, ZMM10, ZMM11, ZMM12, ZMM13, ZMM14, ZMM15, ZMM16, ZMM17, ZMM18, ZMM19, ZMM20, ZMM21, ZMM22, ZMM23, ZMM24, ZMM25, ZMM26, ZMM27, ZMM28, ZMM29, ZMM30, ZMM31)
Operand 2 (r): Register (ZMM0, ZMM1, ZMM2, ZMM3, ZMM4, ZMM5, ZMM6, ZMM7, ZMM8, ZMM9, ZMM10, ZMM11, ZMM12, ZMM13, ZMM14, ZMM15, ZMM16, ZMM17, ZMM18, ZMM19, ZMM20, ZMM21, ZMM22, ZMM23, ZMM24, ZMM25, ZMM26, ZMM27, ZMM28, ZMM29, ZMM30, ZMM31)

Latencies
- Latency operand 2 → 1: 17
Throughput
- Computed from the port usage: 11.00
- Measured (loop): 11.12
- Measured (unrolled): 11.12
Number of μops
- Executed: 22
- Retire slots: 22
- Decoded (MITE): 3
- Microcode Sequencer (MS): 19
- Requires the complex decoder (no other instruction can be decoded with simple decoders in the same cycle)
Port usage: 7*p0+6*p05+9*p5

Latencies
- Latency operand 2 → 1: 17
Throughput
- Computed from the port usage: 11.00
- Measured (loop): 11.23
- Measured (unrolled): 11.22
Number of μops
- Executed: 22
- Retire slots: 22
- Decoded (MITE): 3
- Microcode Sequencer (MS): 19
- Requires the complex decoder (no other instruction can be decoded with simple decoders in the same cycle)
Port usage: 7*p0+6*p05+9*p5

Latencies
- Latency operand 2 → 1: 17
Throughput
- Computed from the port usage: 11.00
- Measured (loop): 11.23
- Measured (unrolled): 11.23
Number of μops
- Executed: 22
- Retire slots: 22
- Decoded (MITE): 3
- Microcode Sequencer (MS): 19
- Requires the complex decoder (no other instruction can be decoded with simple decoders in the same cycle)
Port usage: 7*p0+6*p05+9*p5

Latencies
- Latency operand 2 → 1: 17
Throughput
- Computed from the port usage: 11.00
- Measured (loop): 11.23
- Measured (unrolled): 11.23
Number of μops
- Executed: 22
- Retire slots: 22
- Decoded (MITE): 3
- Microcode Sequencer (MS): 19
- Requires the complex decoder (no other instruction can be decoded with simple decoders in the same cycle)
Port usage: 7*p0+6*p05+9*p5

Latencies
- Latency operand 2 → 1: 17
Throughput
- Computed from the port usage: 11.00
- Measured (loop): 11.56
- Measured (unrolled): 11.25
Number of μops
- Executed: 22
- Retire slots: 22
- Decoded (MITE): 3
- Microcode Sequencer (MS): 19
- Requires the complex decoder (no other instruction can be decoded with simple decoders in the same cycle)
Port usage: 7*p0+5*p05+10*p5

Latencies
- Latency operand 2 → 1: 17
Throughput
- Computed from the port usage: 11.00
- Measured (loop): 11.23
- Measured (unrolled): 11.00
Number of μops
- Executed: 22
- Retire slots: 22
- Decoded (MITE): 3
- Microcode Sequencer (MS): 19
- Requires the complex decoder (no other instruction can be decoded with simple decoders in the same cycle)
Port usage: 7*p0+6*p05+9*p5

Latencies
- Latency operand 2 → 1: 17
Throughput
- Computed from the port usage: 11.00
- Measured (loop): 11.55
- Measured (unrolled): 11.33
Number of μops
- Executed: 22
- Retire slots: 22
- Decoded (MITE): 3
- Microcode Sequencer (MS): 19
- Requires the complex decoder (no other instruction can be decoded with simple decoders in the same cycle)
Port usage: 7*p0+5*p05+10*p5

Latencies
- Latency operand 2 → 1: 7
Throughput
- Computed from the port usage: 0.67
- Measured (loop): 1.33
- Measured (unrolled): 1.33
Number of μops
- Executed: 2
Port usage: 1*FP01+1*FP12