VPBROADCASTW (ZMM, K, R32)

Summary:	"Load with Broadcast Integer Data from General Purpose Register"
Reference:	https://www.felixcloutier.com/x86/VPBROADCASTB:VPBROADCASTW:VPBROADCASTD:VPBROADCASTQ.html
Extension:	AVX512EVEX
Category:	BROADCAST
ISA-Set:	AVX512BW_512
CPL:	3
iform:	VPBROADCASTW_ZMMu16_MASKmskw_GPR32u16_AVX512
iclass:	VPBROADCASTW
ASM:	VPBROADCASTW

Operands

Operand 1 (r/w): Register (ZMM0, ZMM1, ZMM2, ZMM3, ZMM4, ZMM5, ZMM6, ZMM7, ZMM8, ZMM9, ZMM10, ZMM11, ZMM12, ZMM13, ZMM14, ZMM15, ZMM16, ZMM17, ZMM18, ZMM19, ZMM20, ZMM21, ZMM22, ZMM23, ZMM24, ZMM25, ZMM26, ZMM27, ZMM28, ZMM29, ZMM30, ZMM31)
Operand 2 (r): Register (K1, K2, K3, K4, K5, K6, K7)
Operand 3 (r): Register (EAX, ECX, EDX, EBX, ESP, EBP, ESI, EDI, R8D, R9D, R10D, R11D, R12D, R13D, R14D, R15D)

Available performance data

Alder Lake-P
Rocket Lake
Tiger Lake
Ice Lake
Cascade Lake
Cannon Lake
Skylake-X
AMD Zen 4

Alder Lake-P

Measurements

Latencies
- Latency operand 1 → 1: 5
- Latency operand 2 → 1: 5
- Latency operand 3 → 1: ≤5
Throughput
- Computed from the port usage: 1.00
- Measured (loop): 1.00
- Measured (unrolled): 1.00
Number of μops
- Executed: 1
- Retire slots: 1
- Decoded (MITE): 1
- Microcode Sequencer (MS): 0
Port usage: 1*p5

Rocket Lake

Measurements

Latencies
- Latency operand 1 → 1: 3
- Latency operand 2 → 1: 3
- Latency operand 3 → 1: ≤5
Throughput
- Computed from the port usage: 1.00
- Measured (loop): 1.00
- Measured (unrolled): 1.00
Number of μops
- Executed: 1
- Retire slots: 1
- Decoded (MITE): 1
- Microcode Sequencer (MS): 0
Port usage: 1*p5

Tiger Lake

Measurements

Latencies
- Latency operand 1 → 1: 3
- Latency operand 2 → 1: 3
- Latency operand 3 → 1: ≤5
Throughput
- Computed from the port usage: 1.00
- Measured (loop): 1.00
- Measured (unrolled): 1.00
Number of μops
- Executed: 1
- Retire slots: 1
- Decoded (MITE): 1
- Microcode Sequencer (MS): 0
Port usage: 1*p5

Ice Lake

Measurements

Latencies
- Latency operand 1 → 1: 3
- Latency operand 2 → 1: 3
- Latency operand 3 → 1: ≤5
Throughput
- Computed from the port usage: 1.00
- Measured (loop): 1.00
- Measured (unrolled): 1.00
Number of μops
- Executed: 1
- Retire slots: 1
- Decoded (MITE): 1
- Microcode Sequencer (MS): 0
Port usage: 1*p5

Cascade Lake

Measurements

Latencies
- Latency operand 1 → 1: 3
- Latency operand 2 → 1: 3
- Latency operand 3 → 1: ≤5
Throughput
- Computed from the port usage: 1.00
- Measured (loop): 1.00
- Measured (unrolled): 1.00
Number of μops
- Executed: 1
- Retire slots: 1
- Decoded (MITE): 1
- Microcode Sequencer (MS): 0
Port usage: 1*p5

Cannon Lake

Measurements

Latencies
- Latency operand 1 → 1: 3
- Latency operand 2 → 1: 3
- Latency operand 3 → 1: ≤5
Throughput
- Computed from the port usage: 1.00
- Measured (loop): 1.00
- Measured (unrolled): 1.00
Number of μops
- Executed: 1
- Retire slots: 1
- Decoded (MITE): 1
- Microcode Sequencer (MS): 0
Port usage: 1*p5

Skylake-X

Measurements

Latencies
- Latency operand 1 → 1: 3
- Latency operand 2 → 1: 3
- Latency operand 3 → 1: ≤5
Throughput
- Computed from the port usage: 1.00
- Measured (loop): 1.00
- Measured (unrolled): 1.00
Number of μops
- Executed: 1
- Retire slots: 1
- Decoded (MITE): 1
- Microcode Sequencer (MS): 0
Port usage: 1*p5

IACA 2.3

Throughput
- Computed from the port usage: 1.00
- IACA: 1.00
Number of μops: 1
Port usage: 1*p5

IACA 3.0

Throughput
- Computed from the port usage: 1.00
- IACA: 1.00
Number of μops: 1
Port usage: 1*p5

AMD Zen 4

Measurements

Latencies
- Latency operand 1 → 1: 1
- Latency operand 2 → 1: 1
- Latency operand 3 → 1: ≤6
Throughput
- Computed from the port usage: 0.50
- Measured (loop): 1.04
- Measured (unrolled): 1.00
Number of μops
- Executed: 2
Port usage: 1*FP12