LEA_B_IS (R64)
Summary:
"Load Effective Address"
Reference:
https://www.felixcloutier.com/x86/LEA.html
Extension:
BASE
Category:
MISC
ISA-Set:
I86
CPL:
3
iform:
LEA_GPRv_AGEN
iclass:
LEA
ASM:
LEA
Operands
Operand 1 (w): Register (RAX, RCX, RDX, RBX, RSP, RBP, RSI, RDI, R8, R9, R10, R11, R12, R13, R14, R15)
Operand 2 (r):
Available performance data
Alder Lake-P
Alder Lake-E
Rocket Lake
Tiger Lake
Ice Lake
Cascade Lake
Cannon Lake
Skylake-X
Coffee Lake
Kaby Lake
Skylake
Broadwell
Haswell
Ivy Bridge
Sandy Bridge
Westmere
Nehalem
Wolfdale
Conroe
Tremont
Goldmont Plus
Goldmont
Airmont
Bonnell
AMD Zen 4
AMD Zen 3
AMD Zen 2
AMD Zen+
Alder Lake-P
Measurements
Latencies
Latency operand 2 → 1 (address, base register):
2
Latency operand 2 → 1 (address, index register):
2
Throughput
Computed from the port usage: 0.33
Measured (loop):
0.33
Measured (unrolled):
0.33
Number of μops
Executed: 1
Retire slots: 1
Decoded (MITE): 1
Microcode Sequencer (MS): 0
Port usage:
1*p056
Alder Lake-E
Measurements
Latencies
Latency operand 2 → 1 (address, base register):
1
Latency operand 2 → 1 (address, index register):
1
Throughput
Measured (loop):
1.00
Measured (unrolled):
1.00
Number of μops
Executed: 1
Microcode Sequencer (MS): 0
Rocket Lake
Measurements
Latencies
Latency operand 2 → 1 (address, base register):
1
Latency operand 2 → 1 (address, index register):
1
Throughput
Computed from the port usage: 0.50
Measured (loop):
0.50
Measured (unrolled):
0.50
Number of μops
Executed: 1
Retire slots: 1
Decoded (MITE): 1
Microcode Sequencer (MS): 0
Port usage:
1*p15
Tiger Lake
Measurements
Latencies
Latency operand 2 → 1 (address, base register):
1
Latency operand 2 → 1 (address, index register):
1
Throughput
Computed from the port usage: 0.50
Measured (loop):
0.50
Measured (unrolled):
0.50
Number of μops
Executed: 1
Retire slots: 1
Decoded (MITE): 1
Microcode Sequencer (MS): 0
Port usage:
1*p15
Ice Lake
Measurements
Latencies
Latency operand 2 → 1 (address, base register):
1
Latency operand 2 → 1 (address, index register):
1
Throughput
Computed from the port usage: 0.50
Measured (loop):
0.50
Measured (unrolled):
0.50
Number of μops
Executed: 1
Retire slots: 1
Decoded (MITE): 1
Microcode Sequencer (MS): 0
Port usage:
1*p15
Cascade Lake
Measurements
Latencies
Latency operand 2 → 1 (address, base register):
1
Latency operand 2 → 1 (address, index register):
1
Throughput
Computed from the port usage: 0.50
Measured (loop):
0.50
Measured (unrolled):
0.50
Number of μops
Executed: 1
Retire slots: 1
Decoded (MITE): 1
Microcode Sequencer (MS): 0
Port usage:
1*p15
Cannon Lake
Measurements
Latencies
Latency operand 2 → 1 (address, base register):
1
Latency operand 2 → 1 (address, index register):
1
Throughput
Computed from the port usage: 0.50
Measured (loop):
0.50
Measured (unrolled):
0.50
Number of μops
Executed: 1
Retire slots: 1
Decoded (MITE): 1
Microcode Sequencer (MS): 0
Port usage:
1*p15
Skylake-X
Measurements
Latencies
Latency operand 2 → 1 (address, base register):
1
Latency operand 2 → 1 (address, index register):
1
Throughput
Computed from the port usage: 0.50
Measured (loop):
0.50
Measured (unrolled):
0.50
Number of μops
Executed: 1
Retire slots: 1
Decoded (MITE): 1
Microcode Sequencer (MS): 0
Port usage:
1*p15
IACA 2.3
Throughput
Computed from the port usage: 0.50
IACA:
0.50
Number of μops:
1
Port usage:
1*p15
IACA 3.0
Throughput
Computed from the port usage: 0.50
IACA:
0.49
Number of μops:
1
Port usage:
1*p15
Coffee Lake
Measurements
Latencies
Latency operand 2 → 1 (address, base register):
1
Latency operand 2 → 1 (address, index register):
1
Throughput
Computed from the port usage: 0.50
Measured (loop):
0.50
Measured (unrolled):
0.50
Number of μops
Executed: 1
Retire slots: 1
Decoded (MITE): 1
Microcode Sequencer (MS): 0
Port usage:
1*p15
Kaby Lake
Measurements
Latencies
Latency operand 2 → 1 (address, base register):
1
Latency operand 2 → 1 (address, index register):
1
Throughput
Computed from the port usage: 0.50
Measured (loop):
0.50
Measured (unrolled):
0.50
Number of μops
Executed: 1
Retire slots: 1
Decoded (MITE): 1
Microcode Sequencer (MS): 0
Port usage:
1*p15
Skylake
Measurements
Latencies
Latency operand 2 → 1 (address, base register):
1
Latency operand 2 → 1 (address, index register):
1
Throughput
Computed from the port usage: 0.50
Measured (loop):
0.50
Measured (unrolled):
0.50
Number of μops
Executed: 1
Retire slots: 1
Decoded (MITE): 1
Microcode Sequencer (MS): 0
Port usage:
1*p15
IACA 2.3
Throughput
Computed from the port usage: 0.50
IACA:
0.50
Number of μops:
1
Port usage:
1*p15
IACA 3.0
Throughput
Computed from the port usage: 0.50
IACA:
0.49
Number of μops:
1
Port usage:
1*p15
Broadwell
Measurements
Latencies
Latency operand 2 → 1 (address, base register):
1
Latency operand 2 → 1 (address, index register):
1
Throughput
Computed from the port usage: 0.50
Measured (loop):
0.50
Measured (unrolled):
0.50
Number of μops
Executed: 1
Retire slots: 1
Decoded (MITE): 1
Microcode Sequencer (MS): 0
Port usage:
1*p15
IACA 2.2
Throughput
Computed from the port usage: 0.50
IACA:
0.50 (with the -no_interiteration flag: 0.50)
Number of μops:
1
Port usage:
1*p15
IACA 2.3
Throughput
Computed from the port usage: 0.50
IACA:
0.50
Number of μops:
1
Port usage:
1*p15
IACA 3.0
Throughput
Computed from the port usage: 0.50
IACA:
0.49
Number of μops:
1
Port usage:
1*p15
Haswell
Measurements
Latencies
Latency operand 2 → 1 (address, base register):
1
Latency operand 2 → 1 (address, index register):
1
Throughput
Computed from the port usage: 0.50
Measured (loop):
0.50
Measured (unrolled):
0.50
Number of μops
Executed: 1
Retire slots: 1
Decoded (MITE): 1
Microcode Sequencer (MS): 0
Port usage:
1*p15
IACA 2.1
Latency:
1
Throughput
Computed from the port usage: 0.50
IACA:
0.50 (with the -no_interiteration flag: 0.50)
Number of μops:
1
Port usage:
1*p15
IACA 2.2
Throughput
Computed from the port usage: 0.50
IACA:
0.50 (with the -no_interiteration flag: 0.50)
Number of μops:
1
Port usage:
1*p15
IACA 2.3
Throughput
Computed from the port usage: 0.50
IACA:
0.50
Number of μops:
1
Port usage:
1*p15
IACA 3.0
Throughput
Computed from the port usage: 0.50
IACA:
0.49
Number of μops:
1
Port usage:
1*p15
Ivy Bridge
Measurements
Latencies
Latency operand 2 → 1 (address, base register):
1
Latency operand 2 → 1 (address, index register):
1
Throughput
Computed from the port usage: 0.50
Measured (loop):
0.50
Measured (unrolled):
0.50
Number of μops
Executed: 1
Retire slots: 1
Decoded (MITE): 1
Microcode Sequencer (MS): 0
Port usage:
1*p01
IACA 2.1
Latency:
1
Throughput
Computed from the port usage: 0.50
IACA:
0.50 (with the -no_interiteration flag: 0.50)
Number of μops:
1
Port usage:
1*p01
IACA 2.2
Throughput
Computed from the port usage: 0.50
IACA:
0.50 (with the -no_interiteration flag: 0.50)
Number of μops:
1
Port usage:
1*p01
IACA 2.3
Throughput
Computed from the port usage: 0.50
IACA:
0.50
Number of μops:
1
Port usage:
1*p01
Sandy Bridge
Measurements
Latencies
Latency operand 2 → 1 (address, base register):
1
Latency operand 2 → 1 (address, index register):
1
Throughput
Computed from the port usage: 0.50
Measured (loop):
0.50
Measured (unrolled):
0.50
Number of μops
Executed: 1
Retire slots: 1
Decoded (MITE): 1
Microcode Sequencer (MS): 0
Port usage:
1*p01
IACA 2.1
Latency:
1
Throughput
Computed from the port usage: 0.50
IACA:
0.50 (with the -no_interiteration flag: 0.50)
Number of μops:
1
Port usage:
1*p01
IACA 2.2
Throughput
Computed from the port usage: 0.50
IACA:
0.50 (with the -no_interiteration flag: 0.50)
Number of μops:
1
Port usage:
1*p01
IACA 2.3
Throughput
Computed from the port usage: 0.50
IACA:
0.50
Number of μops:
1
Port usage:
1*p01
Westmere
Measurements
Latencies
Latency operand 2 → 1 (address, base register):
1
Latency operand 2 → 1 (address, index register):
1
Throughput
Computed from the port usage: 1.00
Measured (loop):
1.00
Measured (unrolled):
1.00
Number of μops
Executed: 1
Retire slots: 1
Microcode Sequencer (MS): 0
Port usage:
1*p1
IACA 2.1
Latency:
1
Throughput
Computed from the port usage: 1.00
IACA:
1.00 (with the -no_interiteration flag: 1.00)
Number of μops:
1
Port usage:
1*p1
IACA 2.2
Throughput
Computed from the port usage: 1.00
IACA:
1.00 (with the -no_interiteration flag: 1.00)
Number of μops:
1
Port usage:
1*p1
Nehalem
Measurements
Latencies
Latency operand 2 → 1 (address, base register):
1
Latency operand 2 → 1 (address, index register):
1
Throughput
Computed from the port usage: 1.00
Measured (loop):
1.00
Measured (unrolled):
1.00
Number of μops
Executed: 1
Retire slots: 1
Microcode Sequencer (MS): 0
Port usage:
1*p1
IACA 2.1
Latency:
1
Throughput
Computed from the port usage: 1.00
IACA:
1.00 (with the -no_interiteration flag: 1.00)
Number of μops:
1
Port usage:
1*p1
IACA 2.2
Throughput
Computed from the port usage: 1.00
IACA:
1.00 (with the -no_interiteration flag: 1.00)
Number of μops:
1
Port usage:
1*p1
Wolfdale
Measurements
Latencies
Latency operand 2 → 1 (address, base register):
1
Latency operand 2 → 1 (address, index register):
1
Throughput
Computed from the port usage: 1.00
Measured (loop):
1.00
Measured (unrolled):
1.00
Number of μops
Executed: 1
Port usage:
1*p0
Conroe
Measurements
Latencies
Latency operand 2 → 1 (address, base register):
1
Latency operand 2 → 1 (address, index register):
1
Throughput
Computed from the port usage: 1.00
Measured (loop):
1.00
Measured (unrolled):
1.00
Number of μops
Executed: 1
Port usage:
1*p0
Tremont
Measurements
Latencies
Latency operand 2 → 1 (address, base register):
1
Latency operand 2 → 1 (address, index register):
1
Throughput
Measured (loop):
1.00
Measured (unrolled):
1.00
Number of μops
Executed: 1
Microcode Sequencer (MS): 0
Goldmont Plus
Measurements
Latencies
Latency operand 2 → 1 (address, base register):
1
Latency operand 2 → 1 (address, index register):
1
Throughput
Measured (loop):
1.00
Measured (unrolled):
1.00
Number of μops
Executed: 1
Microcode Sequencer (MS): 0
Goldmont
Measurements
Latencies
Latency operand 2 → 1 (address, base register):
1
Latency operand 2 → 1 (address, index register):
1
Throughput
Measured (loop):
1.00
Measured (unrolled):
1.00
Number of μops
Executed: 1
Microcode Sequencer (MS): 0
Airmont
Measurements
Latencies
Latency operand 2 → 1 (address, base register):
1
Latency operand 2 → 1 (address, index register):
1
Throughput
Measured (loop):
1.02
Measured (unrolled):
1.00
Number of μops
Executed: 1
Microcode Sequencer (MS): 0
Bonnell
Measurements
Latencies
Latency operand 2 → 1 (address, base register):
4
Latency operand 2 → 1 (address, index register):
4
Throughput
Measured (loop):
1.00
Measured (unrolled):
1.00
Number of μops
Executed: 1
Microcode Sequencer (MS): 0
AMD Zen 4
Measurements
Latencies
Latency operand 2 → 1 (address, base register):
1
Latency operand 2 → 1 (address, index register):
1
Throughput
Measured (loop):
0.25
Measured (unrolled):
0.25
Number of μops
Executed: 1
AMD Zen 3
Measurements
Latencies
Latency operand 2 → 1 (address, base register):
1
Latency operand 2 → 1 (address, index register):
1
Throughput
Measured (loop):
0.25
Measured (unrolled):
0.25
Number of μops
Executed: 1
Documentation
Latency: 2
Throughput: 0.50
Number of μops: 1
Port usage: ALU2/3
AMD Zen 2
Measurements
Latencies
Latency operand 2 → 1 (address, base register):
2
Latency operand 2 → 1 (address, index register):
2
Throughput
Measured (loop):
0.50
Measured (unrolled):
0.50
Number of μops
Executed: 1
Documentation
Latency: 2
Throughput: 0.50
Number of μops: 1
Port usage: ALU2/ALU3
AMD Zen+
Measurements
Latencies
Latency operand 2 → 1 (address, base register):
2
Latency operand 2 → 1 (address, index register):
2
Throughput
Measured (loop):
0.57
Measured (unrolled):
0.54
Number of μops
Executed: 1
Documentation
Latency: 1
Throughput: 0.25
Number of μops: 1
Port usage: ALU